x86: let 32bit use apic_ops too - fix

fix for pv - clean up the namespace there too.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Yinghai Lu 2008-07-13 22:19:35 -07:00 committed by Ingo Molnar
parent f910a9dc7c
commit 94a8c3c243
4 changed files with 57 additions and 47 deletions

View File

@ -360,11 +360,6 @@ struct pv_cpu_ops pv_cpu_ops = {
struct pv_apic_ops pv_apic_ops = {
#ifdef CONFIG_X86_LOCAL_APIC
#ifndef CONFIG_X86_64
.apic_write = native_apic_mem_write,
.apic_write_atomic = native_apic_mem_write_atomic,
.apic_read = native_apic_mem_read,
#endif
.setup_boot_clock = setup_boot_APIC_clock,
.setup_secondary_clock = setup_secondary_APIC_clock,
.startup_ipi_hook = paravirt_nop,

View File

@ -676,6 +676,50 @@ static inline int __init probe_vmi_rom(void)
return 0;
}
#ifdef CONFIG_X86_LOCAL_APIC
static u32 vmi_apic_read(u32 reg)
{
return 0;
}
static void vmi_apic_write(u32 reg, u32 val)
{
/* Warn to see if there's any stray references */
WARN_ON(1);
}
static u64 vmi_apic_icr_read(void)
{
return 0;
}
static void vmi_apic_icr_write(u32 low, u32 id)
{
/* Warn to see if there's any stray references */
WARN_ON(1);
}
static void vmi_apic_wait_icr_idle(void)
{
return;
}
static u32 vmi_safe_apic_wait_icr_idle(void)
{
return 0;
}
static struct apic_ops vmi_basic_apic_ops = {
.read = vmi_apic_read,
.write = vmi_apic_write,
.write_atomic = vmi_apic_write,
.icr_read = vmi_apic_icr_read,
.icr_write = vmi_apic_icr_write,
.wait_icr_idle = vmi_apic_wait_icr_idle,
.safe_wait_icr_idle = vmi_safe_apic_wait_icr_idle,
};
#endif
/*
* VMI setup common to all processors
*/
@ -904,9 +948,10 @@ static inline int __init activate_vmi(void)
#endif
#ifdef CONFIG_X86_LOCAL_APIC
para_fill(pv_apic_ops.apic_read, APICRead);
para_fill(pv_apic_ops.apic_write, APICWrite);
para_fill(pv_apic_ops.apic_write_atomic, APICWrite);
para_fill(vmi_basic_apic_ops.read, APICRead);
para_fill(vmi_basic_apic_ops.write, APICWrite);
para_fill(vmi_basic_apic_ops.write_atomic, APICWrite);
apic_ops = &vmi_basic_apic_ops;
#endif
/*

View File

@ -559,7 +559,6 @@ static void xen_apic_write(u32 reg, u32 val)
WARN_ON(1);
}
#ifdef CONFIG_X86_64
static u64 xen_apic_icr_read(void)
{
return 0;
@ -576,6 +575,11 @@ static void xen_apic_wait_icr_idle(void)
return;
}
static u32 xen_safe_apic_wait_icr_idle(void)
{
return 0;
}
static struct apic_ops xen_basic_apic_ops = {
.read = xen_apic_read,
.write = xen_apic_write,
@ -583,9 +587,8 @@ static struct apic_ops xen_basic_apic_ops = {
.icr_read = xen_apic_icr_read,
.icr_write = xen_apic_icr_write,
.wait_icr_idle = xen_apic_wait_icr_idle,
.safe_wait_icr_idle = xen_apic_wait_icr_idle,
.safe_wait_icr_idle = xen_safe_apic_wait_icr_idle,
};
#endif
#endif
@ -1159,11 +1162,6 @@ static const struct pv_irq_ops xen_irq_ops __initdata = {
static const struct pv_apic_ops xen_apic_ops __initdata = {
#ifdef CONFIG_X86_LOCAL_APIC
#ifndef CONFIG_X86_64
.apic_write = xen_apic_write,
.apic_write_atomic = xen_apic_write,
.apic_read = xen_apic_read,
#endif
.setup_boot_clock = paravirt_nop,
.setup_secondary_clock = paravirt_nop,
.startup_ipi_hook = paravirt_nop,
@ -1322,9 +1320,10 @@ asmlinkage void __init xen_start_kernel(void)
pv_irq_ops = xen_irq_ops;
pv_apic_ops = xen_apic_ops;
pv_mmu_ops = xen_mmu_ops;
#ifdef CONFIG_X86_64
#ifdef CONFIG_X86_LOCAL_APIC
/*
* for 64bit, set up the basic apic ops aswell.
* set up the basic apic ops.
*/
apic_ops = &xen_basic_apic_ops;
#endif

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@ -200,15 +200,6 @@ struct pv_irq_ops {
struct pv_apic_ops {
#ifdef CONFIG_X86_LOCAL_APIC
#ifndef CONFIG_X86_64
/*
* Direct APIC operations, principally for VMI. Ideally
* these shouldn't be in this interface.
*/
void (*apic_write)(u32 reg, u32 v);
void (*apic_write_atomic)(u32 reg, u32 v);
u32 (*apic_read)(u32 reg);
#endif
void (*setup_boot_clock)(void);
void (*setup_secondary_clock)(void);
@ -890,26 +881,6 @@ static inline void slow_down_io(void)
}
#ifdef CONFIG_X86_LOCAL_APIC
/*
* Basic functions accessing APICs.
*/
#ifndef CONFIG_X86_64
static inline void apic_write(u32 reg, u32 v)
{
PVOP_VCALL2(pv_apic_ops.apic_write, reg, v);
}
static inline void apic_write_atomic(u32 reg, u32 v)
{
PVOP_VCALL2(pv_apic_ops.apic_write_atomic, reg, v);
}
static inline u32 apic_read(u32 reg)
{
return PVOP_CALL1(unsigned long, pv_apic_ops.apic_read, reg);
}
#endif
static inline void setup_boot_clock(void)
{
PVOP_VCALL0(pv_apic_ops.setup_boot_clock);