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mfd: asic3: enable DS1WM cell
This enables the ASIC3's DS1WM MFD cell, supported by the ds1wm driver. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
parent
1b89040c3a
commit
9461f65a85
@ -30,6 +30,7 @@ config MFD_SM501_GPIO
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config MFD_ASIC3
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bool "Support for Compaq ASIC3"
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depends on GENERIC_HARDIRQS && GPIOLIB && ARM
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select MFD_CORE
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---help---
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This driver supports the ASIC3 multifunction chip found on many
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PDAs (mainly iPAQ and HTC based ones)
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@ -17,6 +17,7 @@
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*/
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/gpio.h>
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#include <linux/io.h>
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@ -24,6 +25,8 @@
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#include <linux/platform_device.h>
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#include <linux/mfd/asic3.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/ds1wm.h>
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enum {
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ASIC3_CLOCK_SPI,
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@ -616,6 +619,98 @@ static void asic3_clk_disable(struct asic3 *asic, struct asic3_clk *clk)
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spin_unlock_irqrestore(&asic->lock, flags);
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}
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/* MFD cells (SPI, PWM, LED, DS1WM, MMC) */
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static struct ds1wm_driver_data ds1wm_pdata = {
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.active_high = 1,
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};
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static struct resource ds1wm_resources[] = {
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{
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.start = ASIC3_OWM_BASE,
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.end = ASIC3_OWM_BASE + 0x13,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = ASIC3_IRQ_OWM,
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.start = ASIC3_IRQ_OWM,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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},
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};
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static int ds1wm_enable(struct platform_device *pdev)
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{
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struct asic3 *asic = dev_get_drvdata(pdev->dev.parent);
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/* Turn on external clocks and the OWM clock */
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asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX0]);
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asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_EX1]);
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asic3_clk_enable(asic, &asic->clocks[ASIC3_CLOCK_OWM]);
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msleep(1);
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/* Reset and enable DS1WM */
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asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET),
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ASIC3_EXTCF_OWM_RESET, 1);
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msleep(1);
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asic3_set_register(asic, ASIC3_OFFSET(EXTCF, RESET),
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ASIC3_EXTCF_OWM_RESET, 0);
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msleep(1);
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asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT),
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ASIC3_EXTCF_OWM_EN, 1);
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msleep(1);
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return 0;
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}
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static int ds1wm_disable(struct platform_device *pdev)
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{
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struct asic3 *asic = dev_get_drvdata(pdev->dev.parent);
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asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT),
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ASIC3_EXTCF_OWM_EN, 0);
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asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_OWM]);
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asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX0]);
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asic3_clk_disable(asic, &asic->clocks[ASIC3_CLOCK_EX1]);
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return 0;
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}
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static struct mfd_cell asic3_cell_ds1wm = {
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.name = "ds1wm",
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.enable = ds1wm_enable,
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.disable = ds1wm_disable,
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.driver_data = &ds1wm_pdata,
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.num_resources = ARRAY_SIZE(ds1wm_resources),
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.resources = ds1wm_resources,
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};
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static int __init asic3_mfd_probe(struct platform_device *pdev,
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struct resource *mem)
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{
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struct asic3 *asic = platform_get_drvdata(pdev);
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int ret;
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/* DS1WM */
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asic3_set_register(asic, ASIC3_OFFSET(EXTCF, SELECT),
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ASIC3_EXTCF_OWM_SMB, 0);
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ds1wm_resources[0].start >>= asic->bus_shift;
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ds1wm_resources[0].end >>= asic->bus_shift;
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asic3_cell_ds1wm.platform_data = &asic3_cell_ds1wm;
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asic3_cell_ds1wm.data_size = sizeof(asic3_cell_ds1wm);
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ret = mfd_add_devices(&pdev->dev, pdev->id,
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&asic3_cell_ds1wm, 1, mem, asic->irq_base);
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return ret;
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}
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static void asic3_mfd_remove(struct platform_device *pdev)
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{
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mfd_remove_devices(&pdev->dev);
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}
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/* Core */
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static int __init asic3_probe(struct platform_device *pdev)
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{
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@ -683,6 +778,8 @@ static int __init asic3_probe(struct platform_device *pdev)
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*/
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memcpy(asic->clocks, asic3_clk_init, sizeof(asic3_clk_init));
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asic3_mfd_probe(pdev, mem);
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dev_info(asic->dev, "ASIC3 Core driver\n");
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return 0;
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@ -704,6 +801,8 @@ static int asic3_remove(struct platform_device *pdev)
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int ret;
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struct asic3 *asic = platform_get_drvdata(pdev);
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asic3_mfd_remove(pdev);
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ret = asic3_gpio_remove(pdev);
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if (ret < 0)
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return ret;
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