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cxgb3 - Add iscsi support
Add iSCSI (S3xx) support. Signed-off-by: Karen Xie <kxie@chelsio.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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@ -110,10 +110,7 @@ struct ulp_iscsi_info {
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unsigned int llimit;
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unsigned int ulimit;
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unsigned int tagmask;
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unsigned int pgsz3;
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unsigned int pgsz2;
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unsigned int pgsz1;
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unsigned int pgsz0;
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u8 pgsz_factor[4];
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unsigned int max_rxsz;
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unsigned int max_txsz;
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struct pci_dev *pdev;
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@ -207,6 +207,17 @@ static int cxgb_ulp_iscsi_ctl(struct adapter *adapter, unsigned int req,
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break;
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case ULP_ISCSI_SET_PARAMS:
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t3_write_reg(adapter, A_ULPRX_ISCSI_TAGMASK, uiip->tagmask);
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/* set MaxRxData and MaxCoalesceSize to 16224 */
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t3_write_reg(adapter, A_TP_PARA_REG2, 0x3f603f60);
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/* program the ddp page sizes */
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{
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int i;
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unsigned int val = 0;
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for (i = 0; i < 4; i++)
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val |= (uiip->pgsz_factor[i] & 0xF) << (8 * i);
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if (val)
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t3_write_reg(adapter, A_ULPRX_ISCSI_PSZ, val);
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}
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break;
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default:
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ret = -EOPNOTSUPP;
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@ -1517,16 +1517,18 @@
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#define A_ULPRX_ISCSI_TAGMASK 0x514
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#define S_HPZ0 0
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#define M_HPZ0 0xf
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#define V_HPZ0(x) ((x) << S_HPZ0)
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#define G_HPZ0(x) (((x) >> S_HPZ0) & M_HPZ0)
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#define A_ULPRX_ISCSI_PSZ 0x518
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#define A_ULPRX_TDDP_LLIMIT 0x51c
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#define A_ULPRX_TDDP_ULIMIT 0x520
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#define A_ULPRX_TDDP_PSZ 0x528
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#define S_HPZ0 0
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#define M_HPZ0 0xf
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#define V_HPZ0(x) ((x) << S_HPZ0)
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#define G_HPZ0(x) (((x) >> S_HPZ0) & M_HPZ0)
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#define A_ULPRX_STAG_LLIMIT 0x52c
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#define A_ULPRX_STAG_ULIMIT 0x530
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@ -191,6 +191,9 @@ union opcode_tid {
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#define G_OPCODE(x) (((x) >> S_OPCODE) & 0xFF)
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#define G_TID(x) ((x) & 0xFFFFFF)
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#define S_QNUM 0
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#define G_QNUM(x) (((x) >> S_QNUM) & 0xFFFF)
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#define S_HASHTYPE 22
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#define M_HASHTYPE 0x3
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#define G_HASHTYPE(x) (((x) >> S_HASHTYPE) & M_HASHTYPE)
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@ -779,6 +782,12 @@ struct tx_data_wr {
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__be32 param;
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};
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/* tx_data_wr.flags fields */
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#define S_TX_ACK_PAGES 21
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#define M_TX_ACK_PAGES 0x7
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#define V_TX_ACK_PAGES(x) ((x) << S_TX_ACK_PAGES)
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#define G_TX_ACK_PAGES(x) (((x) >> S_TX_ACK_PAGES) & M_TX_ACK_PAGES)
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/* tx_data_wr.param fields */
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#define S_TX_PORT 0
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#define M_TX_PORT 0x7
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@ -1452,4 +1461,35 @@ struct cpl_rdma_terminate {
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#define M_TERM_TID 0xFFFFF
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#define V_TERM_TID(x) ((x) << S_TERM_TID)
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#define G_TERM_TID(x) (((x) >> S_TERM_TID) & M_TERM_TID)
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/* ULP_TX opcodes */
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enum { ULP_MEM_READ = 2, ULP_MEM_WRITE = 3, ULP_TXPKT = 4 };
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#define S_ULPTX_CMD 28
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#define M_ULPTX_CMD 0xF
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#define V_ULPTX_CMD(x) ((x) << S_ULPTX_CMD)
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#define S_ULPTX_NFLITS 0
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#define M_ULPTX_NFLITS 0xFF
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#define V_ULPTX_NFLITS(x) ((x) << S_ULPTX_NFLITS)
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struct ulp_mem_io {
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WR_HDR;
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__be32 cmd_lock_addr;
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__be32 len;
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};
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/* ulp_mem_io.cmd_lock_addr fields */
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#define S_ULP_MEMIO_ADDR 0
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#define M_ULP_MEMIO_ADDR 0x7FFFFFF
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#define V_ULP_MEMIO_ADDR(x) ((x) << S_ULP_MEMIO_ADDR)
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#define S_ULP_MEMIO_LOCK 27
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#define V_ULP_MEMIO_LOCK(x) ((x) << S_ULP_MEMIO_LOCK)
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#define F_ULP_MEMIO_LOCK V_ULP_MEMIO_LOCK(1U)
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/* ulp_mem_io.len fields */
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#define S_ULP_MEMIO_DATA_LEN 28
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#define M_ULP_MEMIO_DATA_LEN 0xF
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#define V_ULP_MEMIO_DATA_LEN(x) ((x) << S_ULP_MEMIO_DATA_LEN)
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#endif /* T3_CPL_H */
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@ -64,6 +64,7 @@ struct t3cdev {
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void *l3opt; /* optional layer 3 data */
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void *l4opt; /* optional layer 4 data */
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void *ulp; /* ulp stuff */
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void *ulp_iscsi; /* ulp iscsi */
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};
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#endif /* _T3CDEV_H_ */
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