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drm/amdgpu: update documentation for amdgpu_irq.c v3
Add/update function level documentation and add reference to amdgpu_irq.c in amdgpu.rst v2: Added DOC comment Added more explanations for amdgpu_hotplug_work_func Properly formatted unused parameters Properly formatted return values Fixed usage of acronyms More consistent styling v3: Removed duplicate "not" Using '&' to refer to functions and types Signed-off-by: Slava Abramov <slava.abramov@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Slava Abramov
Alex Deucher
parent
7fc48e5912
commit
923ff76eb0
@ -52,4 +52,12 @@ AMDGPU Virtual Memory
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:doc: GPUVM
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.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
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Interrupt Handling
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------------------
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.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
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:doc: Interrupt Handling
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.. kernel-doc:: drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
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:internal:
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@ -25,6 +25,23 @@
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* Alex Deucher
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* Jerome Glisse
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*/
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/**
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* DOC: Interrupt Handling
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*
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* Interrupts generated within GPU hardware raise interrupt requests that are
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* passed to amdgpu IRQ handler which is responsible for detecting source and
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* type of the interrupt and dispatching matching handlers. If handling an
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* interrupt requires calling kernel functions that may sleep processing is
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* dispatched to work handlers.
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*
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* If MSI functionality is not disabled by module parameter then MSI
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* support will be enabled.
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*
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* For GPU interrupt sources that may be driven by another driver, IRQ domain
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* support is used (with mapping between virtual and hardware IRQs).
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*/
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#include <linux/irq.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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@ -43,19 +60,21 @@
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#define AMDGPU_WAIT_IDLE_TIMEOUT 200
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/*
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* Handle hotplug events outside the interrupt handler proper.
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*/
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/**
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* amdgpu_hotplug_work_func - display hotplug work handler
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* amdgpu_hotplug_work_func - work handler for display hotplug event
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*
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* @work: work struct
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* @work: work struct pointer
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*
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* This is the hot plug event work handler (all asics).
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* The work gets scheduled from the irq handler if there
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* was a hot plug interrupt. It walks the connector table
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* and calls the hotplug handler for each one, then sends
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* a drm hotplug event to alert userspace.
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* This is the hotplug event work handler (all ASICs).
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* The work gets scheduled from the IRQ handler if there
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* was a hotplug interrupt. It walks through the connector table
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* and calls hotplug handler for each connector. After this, it sends
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* a DRM hotplug event to alert userspace.
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*
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* This design approach is required in order to defer hotplug event handling
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* from the IRQ handler to a work handler because hotplug handler has to use
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* mutexes which cannot be locked in an IRQ handler (since &mutex_lock may
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* sleep).
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*/
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static void amdgpu_hotplug_work_func(struct work_struct *work)
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{
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@ -74,13 +93,12 @@ static void amdgpu_hotplug_work_func(struct work_struct *work)
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}
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/**
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* amdgpu_irq_reset_work_func - execute gpu reset
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* amdgpu_irq_reset_work_func - execute GPU reset
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*
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* @work: work struct
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* @work: work struct pointer
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*
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* Execute scheduled gpu reset (cayman+).
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* This function is called when the irq handler
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* thinks we need a gpu reset.
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* Execute scheduled GPU reset (Cayman+).
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* This function is called when the IRQ handler thinks we need a GPU reset.
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*/
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static void amdgpu_irq_reset_work_func(struct work_struct *work)
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{
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@ -91,7 +109,13 @@ static void amdgpu_irq_reset_work_func(struct work_struct *work)
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amdgpu_device_gpu_recover(adev, NULL, false);
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}
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/* Disable *all* interrupts */
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/**
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* amdgpu_irq_disable_all - disable *all* interrupts
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*
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* @adev: amdgpu device pointer
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*
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* Disable all types of interrupts from all sources.
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*/
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void amdgpu_irq_disable_all(struct amdgpu_device *adev)
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{
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unsigned long irqflags;
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@ -123,11 +147,15 @@ void amdgpu_irq_disable_all(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_irq_handler - irq handler
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* amdgpu_irq_handler - IRQ handler
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*
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* @int irq, void *arg: args
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* @irq: IRQ number (unused)
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* @arg: pointer to DRM device
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*
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* This is the irq handler for the amdgpu driver (all asics).
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* IRQ handler for amdgpu driver (all ASICs).
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*
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* Returns:
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* result of handling the IRQ, as defined by &irqreturn_t
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*/
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irqreturn_t amdgpu_irq_handler(int irq, void *arg)
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{
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@ -142,18 +170,18 @@ irqreturn_t amdgpu_irq_handler(int irq, void *arg)
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}
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/**
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* amdgpu_msi_ok - asic specific msi checks
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* amdgpu_msi_ok - check whether MSI functionality is enabled
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*
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* @adev: amdgpu device pointer
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* @adev: amdgpu device pointer (unused)
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*
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* Handles asic specific MSI checks to determine if
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* MSIs should be enabled on a particular chip (all asics).
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* Returns true if MSIs should be enabled, false if MSIs
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* should not be enabled.
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* Checks whether MSI functionality has been disabled via module parameter
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* (all ASICs).
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*
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* Returns:
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* *true* if MSIs are allowed to be enabled or *false* otherwise
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*/
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static bool amdgpu_msi_ok(struct amdgpu_device *adev)
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{
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/* force MSI on */
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if (amdgpu_msi == 1)
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return true;
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else if (amdgpu_msi == 0)
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@ -163,12 +191,15 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_irq_init - init driver interrupt info
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* amdgpu_irq_init - initialize interrupt handling
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*
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* @adev: amdgpu device pointer
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*
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* Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
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* Returns 0 for success, error for failure.
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* Sets up work functions for hotplug and reset interrupts, enables MSI
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* functionality, initializes vblank, hotplug and reset interrupt handling.
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*
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* Returns:
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* 0 on success or error code on failure
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*/
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int amdgpu_irq_init(struct amdgpu_device *adev)
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{
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@ -176,7 +207,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
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spin_lock_init(&adev->irq.lock);
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/* enable msi */
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/* Enable MSI if not disabled by module parameter */
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adev->irq.msi_enabled = false;
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if (amdgpu_msi_ok(adev)) {
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@ -189,7 +220,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
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if (!amdgpu_device_has_dc_support(adev)) {
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if (!adev->enable_virtual_display)
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/* Disable vblank irqs aggressively for power-saving */
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/* Disable vblank IRQs aggressively for power-saving */
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/* XXX: can this be enabled for DC? */
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adev->ddev->vblank_disable_immediate = true;
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@ -197,7 +228,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
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if (r)
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return r;
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/* pre DCE11 */
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/* Pre-DCE11 */
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INIT_WORK(&adev->hotplug_work,
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amdgpu_hotplug_work_func);
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}
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@ -220,11 +251,13 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_irq_fini - tear down driver interrupt info
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* amdgpu_irq_fini - shut down interrupt handling
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*
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* @adev: amdgpu device pointer
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*
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* Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
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* Tears down work functions for hotplug and reset interrupts, disables MSI
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* functionality, shuts down vblank, hotplug and reset interrupt handling,
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* turns off interrupts from all sources (all ASICs).
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*/
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void amdgpu_irq_fini(struct amdgpu_device *adev)
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{
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@ -264,12 +297,17 @@ void amdgpu_irq_fini(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_irq_add_id - register irq source
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* amdgpu_irq_add_id - register IRQ source
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*
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* @adev: amdgpu device pointer
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* @src_id: source id for this source
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* @source: irq source
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* @client_id: client id
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* @src_id: source id
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* @source: IRQ source pointer
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*
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* Registers IRQ source on a client.
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*
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* Returns:
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* 0 on success or error code otherwise
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*/
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int amdgpu_irq_add_id(struct amdgpu_device *adev,
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unsigned client_id, unsigned src_id,
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@ -312,12 +350,12 @@ int amdgpu_irq_add_id(struct amdgpu_device *adev,
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}
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/**
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* amdgpu_irq_dispatch - dispatch irq to IP blocks
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* amdgpu_irq_dispatch - dispatch IRQ to IP blocks
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*
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* @adev: amdgpu device pointer
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* @entry: interrupt vector
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* @entry: interrupt vector pointer
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*
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* Dispatches the irq to the different IP blocks
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* Dispatches IRQ to IP blocks.
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*/
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void amdgpu_irq_dispatch(struct amdgpu_device *adev,
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struct amdgpu_iv_entry *entry)
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@ -361,13 +399,13 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
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}
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/**
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* amdgpu_irq_update - update hw interrupt state
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* amdgpu_irq_update - update hardware interrupt state
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*
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* @adev: amdgpu device pointer
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* @src: interrupt src you want to enable
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* @type: type of interrupt you want to update
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* @src: interrupt source pointer
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* @type: type of interrupt
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*
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* Updates the interrupt state for a specific src (all asics).
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* Updates interrupt state for the specific source (all ASICs).
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*/
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int amdgpu_irq_update(struct amdgpu_device *adev,
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struct amdgpu_irq_src *src, unsigned type)
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@ -378,7 +416,7 @@ int amdgpu_irq_update(struct amdgpu_device *adev,
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spin_lock_irqsave(&adev->irq.lock, irqflags);
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/* we need to determine after taking the lock, otherwise
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/* We need to determine after taking the lock, otherwise
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we might disable just enabled interrupts again */
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if (amdgpu_irq_enabled(adev, src, type))
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state = AMDGPU_IRQ_STATE_ENABLE;
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@ -390,6 +428,14 @@ int amdgpu_irq_update(struct amdgpu_device *adev,
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return r;
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}
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/**
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* amdgpu_irq_gpu_reset_resume_helper - update interrupt states on all sources
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*
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* @adev: amdgpu device pointer
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*
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* Updates state of all types of interrupts on all sources on resume after
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* reset.
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*/
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void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
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{
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int i, j, k;
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@ -413,10 +459,13 @@ void amdgpu_irq_gpu_reset_resume_helper(struct amdgpu_device *adev)
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* amdgpu_irq_get - enable interrupt
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*
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* @adev: amdgpu device pointer
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* @src: interrupt src you want to enable
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* @type: type of interrupt you want to enable
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* @src: interrupt source pointer
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* @type: type of interrupt
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*
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* Enables the interrupt type for a specific src (all asics).
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* Enables specified type of interrupt on the specified source (all ASICs).
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*
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* Returns:
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* 0 on success or error code otherwise
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*/
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int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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unsigned type)
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@ -440,10 +489,13 @@ int amdgpu_irq_get(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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* amdgpu_irq_put - disable interrupt
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*
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* @adev: amdgpu device pointer
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* @src: interrupt src you want to disable
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* @type: type of interrupt you want to disable
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* @src: interrupt source pointer
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* @type: type of interrupt
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*
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* Disables the interrupt type for a specific src (all asics).
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* Enables specified type of interrupt on the specified source (all ASICs).
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*
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* Returns:
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* 0 on success or error code otherwise
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*/
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int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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unsigned type)
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@ -464,12 +516,17 @@ int amdgpu_irq_put(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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}
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/**
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* amdgpu_irq_enabled - test if irq is enabled or not
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* amdgpu_irq_enabled - check whether interrupt is enabled or not
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*
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* @adev: amdgpu device pointer
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* @idx: interrupt src you want to test
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* @src: interrupt source pointer
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* @type: type of interrupt
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*
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* Tests if the given interrupt source is enabled or not
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* Checks whether the given type of interrupt is enabled on the given source.
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*
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* Returns:
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* *true* if interrupt is enabled, *false* if interrupt is disabled or on
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* invalid parameters
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*/
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bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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unsigned type)
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@ -486,7 +543,7 @@ bool amdgpu_irq_enabled(struct amdgpu_device *adev, struct amdgpu_irq_src *src,
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return !!atomic_read(&src->enabled_types[type]);
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}
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/* gen irq */
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/* XXX: Generic IRQ handling */
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static void amdgpu_irq_mask(struct irq_data *irqd)
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{
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/* XXX */
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@ -497,12 +554,26 @@ static void amdgpu_irq_unmask(struct irq_data *irqd)
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/* XXX */
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}
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/* amdgpu hardware interrupt chip descriptor */
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static struct irq_chip amdgpu_irq_chip = {
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.name = "amdgpu-ih",
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.irq_mask = amdgpu_irq_mask,
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.irq_unmask = amdgpu_irq_unmask,
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};
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/**
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* amdgpu_irqdomain_map - create mapping between virtual and hardware IRQ numbers
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*
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* @d: amdgpu IRQ domain pointer (unused)
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* @irq: virtual IRQ number
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* @hwirq: hardware irq number
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*
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* Current implementation assigns simple interrupt handler to the given virtual
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* IRQ.
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*
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* Returns:
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* 0 on success or error code otherwise
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*/
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static int amdgpu_irqdomain_map(struct irq_domain *d,
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unsigned int irq, irq_hw_number_t hwirq)
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{
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@ -514,17 +585,21 @@ static int amdgpu_irqdomain_map(struct irq_domain *d,
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return 0;
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}
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/* Implementation of methods for amdgpu IRQ domain */
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static const struct irq_domain_ops amdgpu_hw_irqdomain_ops = {
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.map = amdgpu_irqdomain_map,
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};
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/**
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* amdgpu_irq_add_domain - create a linear irq domain
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* amdgpu_irq_add_domain - create a linear IRQ domain
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*
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* @adev: amdgpu device pointer
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*
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* Create an irq domain for GPU interrupt sources
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* Creates an IRQ domain for GPU interrupt sources
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* that may be driven by another driver (e.g., ACP).
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*
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* Returns:
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* 0 on success or error code otherwise
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*/
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int amdgpu_irq_add_domain(struct amdgpu_device *adev)
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{
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@ -539,11 +614,11 @@ int amdgpu_irq_add_domain(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_irq_remove_domain - remove the irq domain
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* amdgpu_irq_remove_domain - remove the IRQ domain
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*
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* @adev: amdgpu device pointer
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*
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* Remove the irq domain for GPU interrupt sources
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* Removes the IRQ domain for GPU interrupt sources
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* that may be driven by another driver (e.g., ACP).
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*/
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void amdgpu_irq_remove_domain(struct amdgpu_device *adev)
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@ -555,16 +630,17 @@ void amdgpu_irq_remove_domain(struct amdgpu_device *adev)
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}
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/**
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* amdgpu_irq_create_mapping - create a mapping between a domain irq and a
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* Linux irq
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* amdgpu_irq_create_mapping - create mapping between domain Linux IRQs
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*
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* @adev: amdgpu device pointer
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* @src_id: IH source id
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*
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* Create a mapping between a domain irq (GPU IH src id) and a Linux irq
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* Creates mapping between a domain IRQ (GPU IH src id) and a Linux IRQ
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* Use this for components that generate a GPU interrupt, but are driven
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* by a different driver (e.g., ACP).
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* Returns the Linux irq.
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*
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* Returns:
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* Linux IRQ
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*/
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unsigned amdgpu_irq_create_mapping(struct amdgpu_device *adev, unsigned src_id)
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{
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