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ARM: OMAP4: clock data: fix mult and div mask for USB_DPLL
According to OMAP4 TRM Table 3-1183, CM_CLKSEL_DPLL_USB register defines following fields for multiplication and division factors: DPLL_MULT (bits 19:8) DPLL multiplier factor (2 to 4095) DPLL_DIV (bits 7:0) DPLL divider factor (0 to 255) Acked-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Ameya Palande <ameya.palande@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -957,8 +957,8 @@ static struct dpll_data dpll_usb_dd = {
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.modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
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.autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_USB,
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.idlest_reg = OMAP4430_CM_IDLEST_DPLL_USB,
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.mult_mask = OMAP4430_DPLL_MULT_MASK,
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.div1_mask = OMAP4430_DPLL_DIV_MASK,
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.mult_mask = OMAP4430_DPLL_MULT_USB_MASK,
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.div1_mask = OMAP4430_DPLL_DIV_0_7_MASK,
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.enable_mask = OMAP4430_DPLL_EN_MASK,
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.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
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.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
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