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ARM: kprobes: Remove now unused code
Signed-off-by: Jon Medhurst <tixy@yxit.co.uk> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
This commit is contained in:
Jon Medhurst
Tixy
parent
0239269db6
commit
8f2ffa00fb
@ -74,300 +74,6 @@
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"mov pc, "reg" \n\t"
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#endif
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#define is_r15(insn, bitpos) (((insn) & (0xf << bitpos)) == (0xf << bitpos))
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#define PSR_fs (PSR_f|PSR_s)
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#define KPROBE_RETURN_INSTRUCTION 0xe1a0f00e /* mov pc, lr */
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typedef long (insn_0arg_fn_t)(void);
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typedef long (insn_1arg_fn_t)(long);
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typedef long (insn_2arg_fn_t)(long, long);
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typedef long (insn_3arg_fn_t)(long, long, long);
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typedef long (insn_4arg_fn_t)(long, long, long, long);
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typedef long long (insn_llret_0arg_fn_t)(void);
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typedef long long (insn_llret_3arg_fn_t)(long, long, long);
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typedef long long (insn_llret_4arg_fn_t)(long, long, long, long);
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union reg_pair {
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long long dr;
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#ifdef __LITTLE_ENDIAN
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struct { long r0, r1; };
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#else
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struct { long r1, r0; };
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#endif
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};
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/*
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* The insnslot_?arg_r[w]flags() functions below are to keep the
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* msr -> *fn -> mrs instruction sequences indivisible so that
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* the state of the CPSR flags aren't inadvertently modified
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* just before or just after the call.
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*/
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static inline long __kprobes
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insnslot_0arg_rflags(long cpsr, insn_0arg_fn_t *fn)
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{
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register long ret asm("r0");
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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: "=r" (ret)
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: [cpsr] "r" (cpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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return ret;
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}
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static inline long long __kprobes
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insnslot_llret_0arg_rflags(long cpsr, insn_llret_0arg_fn_t *fn)
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{
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register long ret0 asm("r0");
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register long ret1 asm("r1");
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union reg_pair fnr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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: "=r" (ret0), "=r" (ret1)
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: [cpsr] "r" (cpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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fnr.r0 = ret0;
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fnr.r1 = ret1;
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return fnr.dr;
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}
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static inline long __kprobes
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insnslot_1arg_rflags(long r0, long cpsr, insn_1arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long ret asm("r0");
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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: "=r" (ret)
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: "0" (rr0), [cpsr] "r" (cpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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return ret;
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}
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static inline long __kprobes
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insnslot_2arg_rflags(long r0, long r1, long cpsr, insn_2arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long rr1 asm("r1") = r1;
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register long ret asm("r0");
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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: "=r" (ret)
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: "0" (rr0), "r" (rr1),
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[cpsr] "r" (cpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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return ret;
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}
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static inline long __kprobes
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insnslot_3arg_rflags(long r0, long r1, long r2, long cpsr, insn_3arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long rr1 asm("r1") = r1;
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register long rr2 asm("r2") = r2;
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register long ret asm("r0");
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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: "=r" (ret)
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: "0" (rr0), "r" (rr1), "r" (rr2),
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[cpsr] "r" (cpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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return ret;
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}
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static inline long long __kprobes
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insnslot_llret_3arg_rflags(long r0, long r1, long r2, long cpsr,
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insn_llret_3arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long rr1 asm("r1") = r1;
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register long rr2 asm("r2") = r2;
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register long ret0 asm("r0");
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register long ret1 asm("r1");
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union reg_pair fnr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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: "=r" (ret0), "=r" (ret1)
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: "0" (rr0), "r" (rr1), "r" (rr2),
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[cpsr] "r" (cpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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fnr.r0 = ret0;
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fnr.r1 = ret1;
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return fnr.dr;
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}
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static inline long __kprobes
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insnslot_4arg_rflags(long r0, long r1, long r2, long r3, long cpsr,
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insn_4arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long rr1 asm("r1") = r1;
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register long rr2 asm("r2") = r2;
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register long rr3 asm("r3") = r3;
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register long ret asm("r0");
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__asm__ __volatile__ (
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"msr cpsr_fs, %[cpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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: "=r" (ret)
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: "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
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[cpsr] "r" (cpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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return ret;
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}
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static inline long __kprobes
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insnslot_1arg_rwflags(long r0, long *cpsr, insn_1arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long ret asm("r0");
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long oldcpsr = *cpsr;
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long newcpsr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[oldcpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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"mrs %[newcpsr], cpsr \n\t"
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: "=r" (ret), [newcpsr] "=r" (newcpsr)
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: "0" (rr0), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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*cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
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return ret;
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}
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static inline long __kprobes
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insnslot_2arg_rwflags(long r0, long r1, long *cpsr, insn_2arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long rr1 asm("r1") = r1;
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register long ret asm("r0");
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long oldcpsr = *cpsr;
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long newcpsr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[oldcpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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"mrs %[newcpsr], cpsr \n\t"
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: "=r" (ret), [newcpsr] "=r" (newcpsr)
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: "0" (rr0), "r" (rr1), [oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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*cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
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return ret;
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}
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static inline long __kprobes
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insnslot_3arg_rwflags(long r0, long r1, long r2, long *cpsr,
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insn_3arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long rr1 asm("r1") = r1;
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register long rr2 asm("r2") = r2;
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register long ret asm("r0");
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long oldcpsr = *cpsr;
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long newcpsr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[oldcpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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"mrs %[newcpsr], cpsr \n\t"
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: "=r" (ret), [newcpsr] "=r" (newcpsr)
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: "0" (rr0), "r" (rr1), "r" (rr2),
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[oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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*cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
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return ret;
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}
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static inline long __kprobes
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insnslot_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr,
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insn_4arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long rr1 asm("r1") = r1;
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register long rr2 asm("r2") = r2;
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register long rr3 asm("r3") = r3;
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register long ret asm("r0");
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long oldcpsr = *cpsr;
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long newcpsr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[oldcpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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"mrs %[newcpsr], cpsr \n\t"
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: "=r" (ret), [newcpsr] "=r" (newcpsr)
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: "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
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[oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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*cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
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return ret;
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}
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static inline long long __kprobes
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insnslot_llret_4arg_rwflags(long r0, long r1, long r2, long r3, long *cpsr,
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insn_llret_4arg_fn_t *fn)
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{
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register long rr0 asm("r0") = r0;
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register long rr1 asm("r1") = r1;
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register long rr2 asm("r2") = r2;
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register long rr3 asm("r3") = r3;
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register long ret0 asm("r0");
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register long ret1 asm("r1");
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long oldcpsr = *cpsr;
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long newcpsr;
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union reg_pair fnr;
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__asm__ __volatile__ (
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"msr cpsr_fs, %[oldcpsr] \n\t"
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"mov lr, pc \n\t"
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"mov pc, %[fn] \n\t"
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"mrs %[newcpsr], cpsr \n\t"
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: "=r" (ret0), "=r" (ret1), [newcpsr] "=r" (newcpsr)
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: "0" (rr0), "r" (rr1), "r" (rr2), "r" (rr3),
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[oldcpsr] "r" (oldcpsr), [fn] "r" (fn)
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: "lr", "cc"
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);
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*cpsr = (oldcpsr & ~PSR_fs) | (newcpsr & PSR_fs);
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fnr.r0 = ret0;
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fnr.r1 = ret1;
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return fnr.dr;
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}
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/*
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* To avoid the complications of mimicing single-stepping on a
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* processor without a Next-PC or a single-step mode, and to
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@ -449,450 +155,6 @@ static void __kprobes simulate_mov_ipsp(struct kprobe *p, struct pt_regs *regs)
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regs->uregs[12] = regs->uregs[13];
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}
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static void __kprobes emulate_ldrd(struct kprobe *p, struct pt_regs *regs)
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{
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insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
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kprobe_opcode_t insn = p->opcode;
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long ppc = (long)p->addr + 8;
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int rd = (insn >> 12) & 0xf;
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int rn = (insn >> 16) & 0xf;
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int rm = insn & 0xf; /* rm may be invalid, don't care. */
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long rmv = (rm == 15) ? ppc : regs->uregs[rm];
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long rnv = (rn == 15) ? ppc : regs->uregs[rn];
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/* Not following the C calling convention here, so need asm(). */
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__asm__ __volatile__ (
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"ldr r0, %[rn] \n\t"
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"ldr r1, %[rm] \n\t"
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"msr cpsr_fs, %[cpsr]\n\t"
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"mov lr, pc \n\t"
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"mov pc, %[i_fn] \n\t"
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"str r0, %[rn] \n\t" /* in case of writeback */
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"str r2, %[rd0] \n\t"
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"str r3, %[rd1] \n\t"
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: [rn] "+m" (rnv),
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[rd0] "=m" (regs->uregs[rd]),
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[rd1] "=m" (regs->uregs[rd+1])
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: [rm] "m" (rmv),
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[cpsr] "r" (regs->ARM_cpsr),
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[i_fn] "r" (i_fn)
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: "r0", "r1", "r2", "r3", "lr", "cc"
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);
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if (is_writeback(insn))
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regs->uregs[rn] = rnv;
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}
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static void __kprobes emulate_strd(struct kprobe *p, struct pt_regs *regs)
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{
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insn_4arg_fn_t *i_fn = (insn_4arg_fn_t *)&p->ainsn.insn[0];
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kprobe_opcode_t insn = p->opcode;
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long ppc = (long)p->addr + 8;
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int rd = (insn >> 12) & 0xf;
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int rn = (insn >> 16) & 0xf;
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int rm = insn & 0xf;
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long rnv = (rn == 15) ? ppc : regs->uregs[rn];
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/* rm/rmv may be invalid, don't care. */
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long rmv = (rm == 15) ? ppc : regs->uregs[rm];
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long rnv_wb;
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rnv_wb = insnslot_4arg_rflags(rnv, rmv, regs->uregs[rd],
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regs->uregs[rd+1],
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regs->ARM_cpsr, i_fn);
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if (is_writeback(insn))
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regs->uregs[rn] = rnv_wb;
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}
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static void __kprobes emulate_ldr_old(struct kprobe *p, struct pt_regs *regs)
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{
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insn_llret_3arg_fn_t *i_fn = (insn_llret_3arg_fn_t *)&p->ainsn.insn[0];
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kprobe_opcode_t insn = p->opcode;
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long ppc = (long)p->addr + 8;
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union reg_pair fnr;
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int rd = (insn >> 12) & 0xf;
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int rn = (insn >> 16) & 0xf;
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int rm = insn & 0xf;
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long rdv;
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long rnv = (rn == 15) ? ppc : regs->uregs[rn];
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long rmv = (rm == 15) ? ppc : regs->uregs[rm];
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long cpsr = regs->ARM_cpsr;
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fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn);
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if (rn != 15)
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regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */
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rdv = fnr.r1;
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if (rd == 15) {
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#if __LINUX_ARM_ARCH__ >= 5
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cpsr &= ~PSR_T_BIT;
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if (rdv & 0x1)
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cpsr |= PSR_T_BIT;
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regs->ARM_cpsr = cpsr;
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rdv &= ~0x1;
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#else
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rdv &= ~0x2;
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#endif
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}
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regs->uregs[rd] = rdv;
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}
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static void __kprobes emulate_str_old(struct kprobe *p, struct pt_regs *regs)
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{
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insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
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kprobe_opcode_t insn = p->opcode;
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long iaddr = (long)p->addr;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rn = (insn >> 16) & 0xf;
|
||||
int rm = insn & 0xf;
|
||||
long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd];
|
||||
long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn];
|
||||
long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */
|
||||
long rnv_wb;
|
||||
|
||||
rnv_wb = insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn);
|
||||
if (rn != 15)
|
||||
regs->uregs[rn] = rnv_wb; /* Save Rn in case of writeback. */
|
||||
}
|
||||
|
||||
static void __kprobes emulate_sat(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rm = insn & 0xf;
|
||||
long rmv = regs->uregs[rm];
|
||||
|
||||
/* Writes Q flag */
|
||||
regs->uregs[rd] = insnslot_1arg_rwflags(rmv, ®s->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes emulate_sel(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rn = (insn >> 16) & 0xf;
|
||||
int rm = insn & 0xf;
|
||||
long rnv = regs->uregs[rn];
|
||||
long rmv = regs->uregs[rm];
|
||||
|
||||
/* Reads GE bits */
|
||||
regs->uregs[rd] = insnslot_2arg_rflags(rnv, rmv, regs->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes emulate_none(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_0arg_fn_t *i_fn = (insn_0arg_fn_t *)&p->ainsn.insn[0];
|
||||
|
||||
insnslot_0arg_rflags(regs->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes emulate_nop(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_rd12_modify(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
long rdv = regs->uregs[rd];
|
||||
|
||||
regs->uregs[rd] = insnslot_1arg_rflags(rdv, regs->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_rd12rn0_modify(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rn = insn & 0xf;
|
||||
long rdv = regs->uregs[rd];
|
||||
long rnv = regs->uregs[rn];
|
||||
|
||||
regs->uregs[rd] = insnslot_2arg_rflags(rdv, rnv, regs->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes emulate_rd12rm0(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rm = insn & 0xf;
|
||||
long rmv = regs->uregs[rm];
|
||||
|
||||
regs->uregs[rd] = insnslot_1arg_rflags(rmv, regs->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_rd12rn16rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rn = (insn >> 16) & 0xf;
|
||||
int rm = insn & 0xf;
|
||||
long rnv = regs->uregs[rn];
|
||||
long rmv = regs->uregs[rm];
|
||||
|
||||
regs->uregs[rd] =
|
||||
insnslot_2arg_rwflags(rnv, rmv, ®s->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_rd16rn12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 16) & 0xf;
|
||||
int rn = (insn >> 12) & 0xf;
|
||||
int rs = (insn >> 8) & 0xf;
|
||||
int rm = insn & 0xf;
|
||||
long rnv = regs->uregs[rn];
|
||||
long rsv = regs->uregs[rs];
|
||||
long rmv = regs->uregs[rm];
|
||||
|
||||
regs->uregs[rd] =
|
||||
insnslot_3arg_rwflags(rnv, rsv, rmv, ®s->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_rd16rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_2arg_fn_t *i_fn = (insn_2arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 16) & 0xf;
|
||||
int rs = (insn >> 8) & 0xf;
|
||||
int rm = insn & 0xf;
|
||||
long rsv = regs->uregs[rs];
|
||||
long rmv = regs->uregs[rm];
|
||||
|
||||
regs->uregs[rd] =
|
||||
insnslot_2arg_rwflags(rsv, rmv, ®s->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_rdhi16rdlo12rs8rm0_rwflags(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_llret_4arg_fn_t *i_fn = (insn_llret_4arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
union reg_pair fnr;
|
||||
int rdhi = (insn >> 16) & 0xf;
|
||||
int rdlo = (insn >> 12) & 0xf;
|
||||
int rs = (insn >> 8) & 0xf;
|
||||
int rm = insn & 0xf;
|
||||
long rsv = regs->uregs[rs];
|
||||
long rmv = regs->uregs[rm];
|
||||
|
||||
fnr.dr = insnslot_llret_4arg_rwflags(regs->uregs[rdhi],
|
||||
regs->uregs[rdlo], rsv, rmv,
|
||||
®s->ARM_cpsr, i_fn);
|
||||
regs->uregs[rdhi] = fnr.r0;
|
||||
regs->uregs[rdlo] = fnr.r1;
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_alu_imm_rflags(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rn = (insn >> 16) & 0xf;
|
||||
long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
|
||||
|
||||
regs->uregs[rd] = insnslot_1arg_rflags(rnv, regs->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_alu_imm_rwflags(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rn = (insn >> 16) & 0xf;
|
||||
long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
|
||||
|
||||
regs->uregs[rd] = insnslot_1arg_rwflags(rnv, ®s->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_alu_tests_imm(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_1arg_fn_t *i_fn = (insn_1arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
int rn = (insn >> 16) & 0xf;
|
||||
long rnv = (rn == 15) ? (long)p->addr + 8 : regs->uregs[rn];
|
||||
|
||||
insnslot_1arg_rwflags(rnv, ®s->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_alu_rflags(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
long ppc = (long)p->addr + 8;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rn = (insn >> 16) & 0xf; /* rn/rnv/rs/rsv may be */
|
||||
int rs = (insn >> 8) & 0xf; /* invalid, don't care. */
|
||||
int rm = insn & 0xf;
|
||||
long rnv = (rn == 15) ? ppc : regs->uregs[rn];
|
||||
long rmv = (rm == 15) ? ppc : regs->uregs[rm];
|
||||
long rsv = regs->uregs[rs];
|
||||
|
||||
regs->uregs[rd] =
|
||||
insnslot_3arg_rflags(rnv, rmv, rsv, regs->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_alu_rwflags(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
long ppc = (long)p->addr + 8;
|
||||
int rd = (insn >> 12) & 0xf;
|
||||
int rn = (insn >> 16) & 0xf; /* rn/rnv/rs/rsv may be */
|
||||
int rs = (insn >> 8) & 0xf; /* invalid, don't care. */
|
||||
int rm = insn & 0xf;
|
||||
long rnv = (rn == 15) ? ppc : regs->uregs[rn];
|
||||
long rmv = (rm == 15) ? ppc : regs->uregs[rm];
|
||||
long rsv = regs->uregs[rs];
|
||||
|
||||
regs->uregs[rd] =
|
||||
insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_alu_tests(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
insn_3arg_fn_t *i_fn = (insn_3arg_fn_t *)&p->ainsn.insn[0];
|
||||
kprobe_opcode_t insn = p->opcode;
|
||||
long ppc = (long)p->addr + 8;
|
||||
int rn = (insn >> 16) & 0xf;
|
||||
int rs = (insn >> 8) & 0xf; /* rs/rsv may be invalid, don't care. */
|
||||
int rm = insn & 0xf;
|
||||
long rnv = (rn == 15) ? ppc : regs->uregs[rn];
|
||||
long rmv = (rm == 15) ? ppc : regs->uregs[rm];
|
||||
long rsv = regs->uregs[rs];
|
||||
|
||||
insnslot_3arg_rwflags(rnv, rmv, rsv, ®s->ARM_cpsr, i_fn);
|
||||
}
|
||||
|
||||
static enum kprobe_insn __kprobes
|
||||
prep_emulate_ldr_str(kprobe_opcode_t insn, struct arch_specific_insn *asi)
|
||||
{
|
||||
int not_imm = (insn & (1 << 26)) ? (insn & (1 << 25))
|
||||
: (~insn & (1 << 22));
|
||||
|
||||
if (is_writeback(insn) && is_r15(insn, 16))
|
||||
return INSN_REJECTED; /* Writeback to PC */
|
||||
|
||||
insn &= 0xfff00fff;
|
||||
insn |= 0x00001000; /* Rn = r0, Rd = r1 */
|
||||
if (not_imm) {
|
||||
insn &= ~0xf;
|
||||
insn |= 2; /* Rm = r2 */
|
||||
}
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = (insn & (1 << 20)) ? emulate_ldr_old : emulate_str_old;
|
||||
return INSN_GOOD;
|
||||
}
|
||||
|
||||
static enum kprobe_insn __kprobes
|
||||
prep_emulate_rd12_modify(kprobe_opcode_t insn, struct arch_specific_insn *asi)
|
||||
{
|
||||
if (is_r15(insn, 12))
|
||||
return INSN_REJECTED; /* Rd is PC */
|
||||
|
||||
insn &= 0xffff0fff; /* Rd = r0 */
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = emulate_rd12_modify;
|
||||
return INSN_GOOD;
|
||||
}
|
||||
|
||||
static enum kprobe_insn __kprobes
|
||||
prep_emulate_rd12rn0_modify(kprobe_opcode_t insn,
|
||||
struct arch_specific_insn *asi)
|
||||
{
|
||||
if (is_r15(insn, 12))
|
||||
return INSN_REJECTED; /* Rd is PC */
|
||||
|
||||
insn &= 0xffff0ff0; /* Rd = r0 */
|
||||
insn |= 0x00000001; /* Rn = r1 */
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = emulate_rd12rn0_modify;
|
||||
return INSN_GOOD;
|
||||
}
|
||||
|
||||
static enum kprobe_insn __kprobes
|
||||
prep_emulate_rd12rm0(kprobe_opcode_t insn, struct arch_specific_insn *asi)
|
||||
{
|
||||
if (is_r15(insn, 12))
|
||||
return INSN_REJECTED; /* Rd is PC */
|
||||
|
||||
insn &= 0xffff0ff0; /* Rd = r0, Rm = r0 */
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = emulate_rd12rm0;
|
||||
return INSN_GOOD;
|
||||
}
|
||||
|
||||
static enum kprobe_insn __kprobes
|
||||
prep_emulate_rd12rn16rm0_wflags(kprobe_opcode_t insn,
|
||||
struct arch_specific_insn *asi)
|
||||
{
|
||||
if (is_r15(insn, 12))
|
||||
return INSN_REJECTED; /* Rd is PC */
|
||||
|
||||
insn &= 0xfff00ff0; /* Rd = r0, Rn = r0 */
|
||||
insn |= 0x00000001; /* Rm = r1 */
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = emulate_rd12rn16rm0_rwflags;
|
||||
return INSN_GOOD;
|
||||
}
|
||||
|
||||
static enum kprobe_insn __kprobes
|
||||
prep_emulate_rd16rs8rm0_wflags(kprobe_opcode_t insn,
|
||||
struct arch_specific_insn *asi)
|
||||
{
|
||||
if (is_r15(insn, 16))
|
||||
return INSN_REJECTED; /* Rd is PC */
|
||||
|
||||
insn &= 0xfff0f0f0; /* Rd = r0, Rs = r0 */
|
||||
insn |= 0x00000001; /* Rm = r1 */
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = emulate_rd16rs8rm0_rwflags;
|
||||
return INSN_GOOD;
|
||||
}
|
||||
|
||||
static enum kprobe_insn __kprobes
|
||||
prep_emulate_rd16rn12rs8rm0_wflags(kprobe_opcode_t insn,
|
||||
struct arch_specific_insn *asi)
|
||||
{
|
||||
if (is_r15(insn, 16))
|
||||
return INSN_REJECTED; /* Rd is PC */
|
||||
|
||||
insn &= 0xfff000f0; /* Rd = r0, Rn = r0 */
|
||||
insn |= 0x00000102; /* Rs = r1, Rm = r2 */
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = emulate_rd16rn12rs8rm0_rwflags;
|
||||
return INSN_GOOD;
|
||||
}
|
||||
|
||||
static enum kprobe_insn __kprobes
|
||||
prep_emulate_rdhi16rdlo12rs8rm0_wflags(kprobe_opcode_t insn,
|
||||
struct arch_specific_insn *asi)
|
||||
{
|
||||
if (is_r15(insn, 16) || is_r15(insn, 12))
|
||||
return INSN_REJECTED; /* RdHi or RdLo is PC */
|
||||
|
||||
insn &= 0xfff000f0; /* RdHi = r0, RdLo = r1 */
|
||||
insn |= 0x00001203; /* Rs = r2, Rm = r3 */
|
||||
asi->insn[0] = insn;
|
||||
asi->insn_handler = emulate_rdhi16rdlo12rs8rm0_rwflags;
|
||||
return INSN_GOOD;
|
||||
}
|
||||
|
||||
static void __kprobes
|
||||
emulate_ldrdstrd(struct kprobe *p, struct pt_regs *regs)
|
||||
{
|
||||
|
||||
Loading…
Reference in New Issue
Block a user