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x86: ordering functions in io_apic_64.c
try to make functions have the same order between 32-bit and 64-bit. Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -409,40 +409,6 @@ static bool io_apic_level_ack_pending(unsigned int irq)
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return false;
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}
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/*
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* Synchronize the IO-APIC and the CPU by doing
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* a dummy read from the IO-APIC
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*/
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static inline void io_apic_sync(unsigned int apic)
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{
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struct io_apic __iomem *io_apic = io_apic_base(apic);
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readl(&io_apic->data);
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}
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#define __DO_ACTION(R, ACTION, FINAL) \
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\
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{ \
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int pin; \
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struct irq_cfg *cfg; \
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struct irq_pin_list *entry; \
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\
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cfg = irq_cfg(irq); \
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entry = cfg->irq_2_pin; \
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for (;;) { \
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unsigned int reg; \
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if (!entry) \
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break; \
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pin = entry->pin; \
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reg = io_apic_read(entry->apic, 0x10 + R + pin*2); \
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reg ACTION; \
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io_apic_modify(entry->apic, reg); \
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FINAL; \
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if (!entry->next) \
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break; \
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entry = entry->next; \
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} \
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}
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union entry_union {
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struct { u32 w1, w2; };
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struct IO_APIC_route_entry entry;
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@ -627,6 +593,39 @@ static void __init replace_pin_at_irq(unsigned int irq,
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add_pin_to_irq(irq, newapic, newpin);
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}
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/*
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* Synchronize the IO-APIC and the CPU by doing
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* a dummy read from the IO-APIC
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*/
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static inline void io_apic_sync(unsigned int apic)
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{
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struct io_apic __iomem *io_apic = io_apic_base(apic);
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readl(&io_apic->data);
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}
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#define __DO_ACTION(R, ACTION, FINAL) \
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\
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{ \
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int pin; \
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struct irq_cfg *cfg; \
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struct irq_pin_list *entry; \
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\
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cfg = irq_cfg(irq); \
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entry = cfg->irq_2_pin; \
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for (;;) { \
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unsigned int reg; \
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if (!entry) \
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break; \
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pin = entry->pin; \
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reg = io_apic_read(entry->apic, 0x10 + R + pin*2); \
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reg ACTION; \
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io_apic_modify(entry->apic, reg); \
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FINAL; \
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if (!entry->next) \
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break; \
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entry = entry->next; \
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} \
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}
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#define DO_ACTION(name,R,ACTION, FINAL) \
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\
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