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x86/platform/intel-mid: Add Intel Penwell to ID table
Commit:ca22312dc8
("x86/platform/intel-mid: Extend PWRMU to support Penwell") ... enabled the PWRMU driver on platforms based on Intel Penwell, but unfortunately this is not enough. Add Intel Penwell ID to pci-mid.c driver as well. To avoid confusion in the future add a comment to both drivers. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Fixes:ca22312dc8
("x86/platform/intel-mid: Extend PWRMU to support Penwell") Link: http://lkml.kernel.org/r/20160908103232.137587-1-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -427,6 +427,7 @@ static const struct mid_pwr_device_info mid_info = {
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.set_initial_state = mid_set_initial_state,
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};
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/* This table should be in sync with the one in drivers/pci/pci-mid.c */
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static const struct pci_device_id mid_pwr_pci_ids[] = {
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_PENWELL), (kernel_ulong_t)&mid_info },
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{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_TANGIER), (kernel_ulong_t)&mid_info },
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@ -60,7 +60,12 @@ static struct pci_platform_pm_ops mid_pci_platform_pm = {
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#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
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/*
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* This table should be in sync with the one in
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* arch/x86/platform/intel-mid/pwr.c.
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*/
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static const struct x86_cpu_id lpss_cpu_ids[] = {
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ICPU(INTEL_FAM6_ATOM_PENWELL),
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ICPU(INTEL_FAM6_ATOM_MERRIFIELD),
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{}
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};
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