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drm/amd/display: Disable plane right after disconnected

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HDR display playing video underflow is observed when switching
to full screen due to program a lower watermark right after unlock otg.

Instead of disable plane in next flip coming, if there is a
plane disconnected, after otg unlock wait for mpcc idle and disable
the plane, then program watermark. So there is enough warter mark to make
sure current frame data pass through.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yongqiang Sun 2017-11-17 10:44:15 -05:00 committed by Alex Deucher
parent 9168a586e8
commit 8e504bccc1
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
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@ -2297,7 +2297,7 @@ static void dcn10_apply_ctx_for_surface(
pipe_ctx->plane_state->update_flags.bits.full_update)
program_water_mark = true;
if (removed_pipe[i] && num_planes == 0)
if (removed_pipe[i])
dcn10_disable_plane(dc, old_pipe_ctx);
}
@ -2306,6 +2306,7 @@ static void dcn10_apply_ctx_for_surface(
/* pstate stuck check after watermark update */
dcn10_verify_allow_pstate_change_high(dc);
}
/* watermark is for all pipes */
hubbub1_program_watermarks(dc->res_pool->hubbub,
&context->bw.dcn.watermarks, ref_clk_mhz);