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csky: Cleanup asm/spinlock.h
There are two implementation of spinlock in arch/csky: - simple one (NR_CPU = 1,2) - tick's one (NR_CPU = 3,4) Remove the simple one. There is already smp_mb in spinlock, so remove the definition of smp_mb__after_spinlock. Link: https://lore.kernel.org/linux-csky/20200807081253.GD2674@hirez.programming.kicks-ass.net/#t Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Cc: Peter Zijlstra <peterz@infradead.org>k Cc: Arnd Bergmann <arnd@arndb.de>
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c38425df20
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@ -7,7 +7,7 @@ config CSKY
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_USE_BUILTIN_BSWAP
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select ARCH_USE_QUEUED_RWLOCKS if NR_CPUS>2
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_WANT_FRAME_POINTERS if !CPU_CK610
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select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
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select COMMON_CLK
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@ -6,8 +6,6 @@
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#include <linux/spinlock_types.h>
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#include <asm/barrier.h>
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#ifdef CONFIG_QUEUED_RWLOCKS
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/*
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* Ticket-based spin-locking.
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*/
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@ -88,169 +86,4 @@ static inline int arch_spin_is_contended(arch_spinlock_t *lock)
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#include <asm/qrwlock.h>
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/* See include/linux/spinlock.h */
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#define smp_mb__after_spinlock() smp_mb()
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#else /* CONFIG_QUEUED_RWLOCKS */
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/*
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* Test-and-set spin-locking.
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*/
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static inline void arch_spin_lock(arch_spinlock_t *lock)
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{
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u32 *p = &lock->lock;
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u32 tmp;
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asm volatile (
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"1: ldex.w %0, (%1) \n"
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" bnez %0, 1b \n"
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" movi %0, 1 \n"
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" stex.w %0, (%1) \n"
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" bez %0, 1b \n"
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: "=&r" (tmp)
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: "r"(p)
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: "cc");
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smp_mb();
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}
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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{
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smp_mb();
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WRITE_ONCE(lock->lock, 0);
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}
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static inline int arch_spin_trylock(arch_spinlock_t *lock)
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{
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u32 *p = &lock->lock;
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u32 tmp;
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asm volatile (
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"1: ldex.w %0, (%1) \n"
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" bnez %0, 2f \n"
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" movi %0, 1 \n"
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" stex.w %0, (%1) \n"
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" bez %0, 1b \n"
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" movi %0, 0 \n"
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"2: \n"
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: "=&r" (tmp)
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: "r"(p)
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: "cc");
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if (!tmp)
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smp_mb();
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return !tmp;
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}
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#define arch_spin_is_locked(x) (READ_ONCE((x)->lock) != 0)
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/*
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* read lock/unlock/trylock
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*/
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static inline void arch_read_lock(arch_rwlock_t *lock)
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{
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u32 *p = &lock->lock;
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u32 tmp;
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asm volatile (
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"1: ldex.w %0, (%1) \n"
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" blz %0, 1b \n"
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" addi %0, 1 \n"
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" stex.w %0, (%1) \n"
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" bez %0, 1b \n"
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: "=&r" (tmp)
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: "r"(p)
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: "cc");
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smp_mb();
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}
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static inline void arch_read_unlock(arch_rwlock_t *lock)
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{
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u32 *p = &lock->lock;
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u32 tmp;
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smp_mb();
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asm volatile (
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"1: ldex.w %0, (%1) \n"
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" subi %0, 1 \n"
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" stex.w %0, (%1) \n"
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" bez %0, 1b \n"
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: "=&r" (tmp)
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: "r"(p)
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: "cc");
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}
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static inline int arch_read_trylock(arch_rwlock_t *lock)
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{
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u32 *p = &lock->lock;
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u32 tmp;
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asm volatile (
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"1: ldex.w %0, (%1) \n"
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" blz %0, 2f \n"
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" addi %0, 1 \n"
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" stex.w %0, (%1) \n"
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" bez %0, 1b \n"
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" movi %0, 0 \n"
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"2: \n"
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: "=&r" (tmp)
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: "r"(p)
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: "cc");
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if (!tmp)
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smp_mb();
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return !tmp;
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}
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/*
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* write lock/unlock/trylock
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*/
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static inline void arch_write_lock(arch_rwlock_t *lock)
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{
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u32 *p = &lock->lock;
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u32 tmp;
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asm volatile (
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"1: ldex.w %0, (%1) \n"
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" bnez %0, 1b \n"
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" subi %0, 1 \n"
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" stex.w %0, (%1) \n"
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" bez %0, 1b \n"
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: "=&r" (tmp)
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: "r"(p)
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: "cc");
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smp_mb();
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}
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static inline void arch_write_unlock(arch_rwlock_t *lock)
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{
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smp_mb();
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WRITE_ONCE(lock->lock, 0);
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}
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static inline int arch_write_trylock(arch_rwlock_t *lock)
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{
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u32 *p = &lock->lock;
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u32 tmp;
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asm volatile (
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"1: ldex.w %0, (%1) \n"
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" bnez %0, 2f \n"
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" subi %0, 1 \n"
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" stex.w %0, (%1) \n"
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" bez %0, 1b \n"
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" movi %0, 0 \n"
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"2: \n"
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: "=&r" (tmp)
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: "r"(p)
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: "cc");
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if (!tmp)
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smp_mb();
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return !tmp;
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}
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#endif /* CONFIG_QUEUED_RWLOCKS */
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#endif /* __ASM_CSKY_SPINLOCK_H */
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@ -22,16 +22,6 @@ typedef struct {
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#define __ARCH_SPIN_LOCK_UNLOCKED { { 0 } }
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#ifdef CONFIG_QUEUED_RWLOCKS
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#include <asm-generic/qrwlock_types.h>
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#else /* CONFIG_NR_CPUS > 2 */
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typedef struct {
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u32 lock;
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} arch_rwlock_t;
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#define __ARCH_RW_LOCK_UNLOCKED { 0 }
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#endif /* CONFIG_QUEUED_RWLOCKS */
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#endif /* __ASM_CSKY_SPINLOCK_TYPES_H */
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