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pinctrl: nomadik: move platform data handling into driver
This decomissions the platform data header (which is no longer in use after the systems using this driver were switched to a pure device-tree config path) and merges the result into the driver file or local driver header. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Linus Walleij
parent
01e9da7d75
commit
8d99339710
@ -33,7 +33,6 @@
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#include <linux/pinctrl/pinconf.h>
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/* Since we request GPIOs from ourself */
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_data/pinctrl-nomadik.h>
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#include "pinctrl-nomadik.h"
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#include "core.h"
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@ -45,6 +44,221 @@
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* Symbols in this file are called "nmk_gpio" for "nomadik gpio"
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*/
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/*
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* pin configurations are represented by 32-bit integers:
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*
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* bit 0.. 8 - Pin Number (512 Pins Maximum)
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* bit 9..10 - Alternate Function Selection
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* bit 11..12 - Pull up/down state
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* bit 13 - Sleep mode behaviour
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* bit 14 - Direction
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* bit 15 - Value (if output)
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* bit 16..18 - SLPM pull up/down state
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* bit 19..20 - SLPM direction
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* bit 21..22 - SLPM Value (if output)
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* bit 23..25 - PDIS value (if input)
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* bit 26 - Gpio mode
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* bit 27 - Sleep mode
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*
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* to facilitate the definition, the following macros are provided
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*
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* PIN_CFG_DEFAULT - default config (0):
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* pull up/down = disabled
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* sleep mode = input/wakeup
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* direction = input
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* value = low
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* SLPM direction = same as normal
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* SLPM pull = same as normal
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* SLPM value = same as normal
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*
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* PIN_CFG - default config with alternate function
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*/
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typedef unsigned long pin_cfg_t;
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#define PIN_NUM_MASK 0x1ff
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#define PIN_NUM(x) ((x) & PIN_NUM_MASK)
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#define PIN_ALT_SHIFT 9
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#define PIN_ALT_MASK (0x3 << PIN_ALT_SHIFT)
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#define PIN_ALT(x) (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
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#define PIN_GPIO (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
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#define PIN_ALT_A (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
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#define PIN_ALT_B (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
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#define PIN_ALT_C (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
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#define PIN_PULL_SHIFT 11
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#define PIN_PULL_MASK (0x3 << PIN_PULL_SHIFT)
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#define PIN_PULL(x) (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
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#define PIN_PULL_NONE (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
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#define PIN_PULL_UP (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
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#define PIN_PULL_DOWN (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
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#define PIN_SLPM_SHIFT 13
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#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT)
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#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
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#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
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#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
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/* These two replace the above in DB8500v2+ */
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#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
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#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
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#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
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#define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
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#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
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#define PIN_DIR_SHIFT 14
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#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT)
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#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
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#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT)
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#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT)
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#define PIN_VAL_SHIFT 15
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#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT)
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#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
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#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT)
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#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT)
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#define PIN_SLPM_PULL_SHIFT 16
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#define PIN_SLPM_PULL_MASK (0x7 << PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_PULL(x) \
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(((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_PULL_NONE \
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((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_PULL_UP \
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((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_PULL_DOWN \
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((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_DIR_SHIFT 19
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#define PIN_SLPM_DIR_MASK (0x3 << PIN_SLPM_DIR_SHIFT)
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#define PIN_SLPM_DIR(x) \
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(((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
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#define PIN_SLPM_DIR_INPUT ((1 + 0) << PIN_SLPM_DIR_SHIFT)
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#define PIN_SLPM_DIR_OUTPUT ((1 + 1) << PIN_SLPM_DIR_SHIFT)
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#define PIN_SLPM_VAL_SHIFT 21
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#define PIN_SLPM_VAL_MASK (0x3 << PIN_SLPM_VAL_SHIFT)
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#define PIN_SLPM_VAL(x) \
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(((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
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#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT)
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#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT)
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#define PIN_SLPM_PDIS_SHIFT 23
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#define PIN_SLPM_PDIS_MASK (0x3 << PIN_SLPM_PDIS_SHIFT)
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#define PIN_SLPM_PDIS(x) \
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(((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
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#define PIN_SLPM_PDIS_NO_CHANGE (0 << PIN_SLPM_PDIS_SHIFT)
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#define PIN_SLPM_PDIS_DISABLED (1 << PIN_SLPM_PDIS_SHIFT)
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#define PIN_SLPM_PDIS_ENABLED (2 << PIN_SLPM_PDIS_SHIFT)
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#define PIN_LOWEMI_SHIFT 25
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#define PIN_LOWEMI_MASK (0x1 << PIN_LOWEMI_SHIFT)
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#define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
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#define PIN_LOWEMI_DISABLED (0 << PIN_LOWEMI_SHIFT)
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#define PIN_LOWEMI_ENABLED (1 << PIN_LOWEMI_SHIFT)
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#define PIN_GPIOMODE_SHIFT 26
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#define PIN_GPIOMODE_MASK (0x1 << PIN_GPIOMODE_SHIFT)
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#define PIN_GPIOMODE(x) (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
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#define PIN_GPIOMODE_DISABLED (0 << PIN_GPIOMODE_SHIFT)
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#define PIN_GPIOMODE_ENABLED (1 << PIN_GPIOMODE_SHIFT)
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#define PIN_SLEEPMODE_SHIFT 27
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#define PIN_SLEEPMODE_MASK (0x1 << PIN_SLEEPMODE_SHIFT)
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#define PIN_SLEEPMODE(x) (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
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#define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT)
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#define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT)
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/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */
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#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN)
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#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP)
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#define PIN_INPUT_NOPULL (PIN_DIR_INPUT | PIN_PULL_NONE)
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#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW)
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#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
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#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
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#define PIN_SLPM_INPUT_PULLUP (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
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#define PIN_SLPM_INPUT_NOPULL (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
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#define PIN_SLPM_OUTPUT_LOW (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
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#define PIN_SLPM_OUTPUT_HIGH (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
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#define PIN_CFG_DEFAULT (0)
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#define PIN_CFG(num, alt) \
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(PIN_CFG_DEFAULT |\
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(PIN_NUM(num) | PIN_##alt))
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#define PIN_CFG_INPUT(num, alt, pull) \
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(PIN_CFG_DEFAULT |\
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(PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
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#define PIN_CFG_OUTPUT(num, alt, val) \
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(PIN_CFG_DEFAULT |\
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(PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
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/*
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* "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
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* the "gpio" namespace for generic and cross-machine functions
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*/
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#define GPIO_BLOCK_SHIFT 5
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#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT)
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/* Register in the logic block */
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#define NMK_GPIO_DAT 0x00
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#define NMK_GPIO_DATS 0x04
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#define NMK_GPIO_DATC 0x08
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#define NMK_GPIO_PDIS 0x0c
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#define NMK_GPIO_DIR 0x10
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#define NMK_GPIO_DIRS 0x14
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#define NMK_GPIO_DIRC 0x18
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#define NMK_GPIO_SLPC 0x1c
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#define NMK_GPIO_AFSLA 0x20
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#define NMK_GPIO_AFSLB 0x24
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#define NMK_GPIO_LOWEMI 0x28
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#define NMK_GPIO_RIMSC 0x40
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#define NMK_GPIO_FIMSC 0x44
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#define NMK_GPIO_IS 0x48
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#define NMK_GPIO_IC 0x4c
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#define NMK_GPIO_RWIMSC 0x50
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#define NMK_GPIO_FWIMSC 0x54
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#define NMK_GPIO_WKS 0x58
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/* These appear in DB8540 and later ASICs */
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#define NMK_GPIO_EDGELEVEL 0x5C
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#define NMK_GPIO_LEVEL 0x60
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/* Pull up/down values */
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enum nmk_gpio_pull {
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NMK_GPIO_PULL_NONE,
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NMK_GPIO_PULL_UP,
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NMK_GPIO_PULL_DOWN,
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};
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/* Sleep mode */
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enum nmk_gpio_slpm {
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NMK_GPIO_SLPM_INPUT,
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NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
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NMK_GPIO_SLPM_NOCHANGE,
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NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
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};
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/*
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* Platform data to register a block: only the initial gpio/irq number.
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*/
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struct nmk_gpio_platform_data {
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char *name;
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int first_gpio;
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int first_irq;
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int num_gpio;
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u32 (*get_secondary_status)(unsigned int bank);
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void (*set_ioforce)(bool enable);
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bool supports_sleepmode;
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};
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struct nmk_gpio_chip {
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struct gpio_chip chip;
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struct irq_domain *domain;
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@ -1,13 +1,23 @@
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#ifndef PINCTRL_PINCTRL_NOMADIK_H
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#define PINCTRL_PINCTRL_NOMADIK_H
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#include <linux/platform_data/pinctrl-nomadik.h>
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/* Package definitions */
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#define PINCTRL_NMK_STN8815 0
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#define PINCTRL_NMK_DB8500 1
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#define PINCTRL_NMK_DB8540 2
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/* Alternate functions: function C is set in hw by setting both A and B */
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#define NMK_GPIO_ALT_GPIO 0
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#define NMK_GPIO_ALT_A 1
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#define NMK_GPIO_ALT_B 2
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#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
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#define NMK_GPIO_ALT_CX_SHIFT 2
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#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
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#define PRCM_GPIOCR_ALTCX(pin_num,\
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altc1_used, altc1_ri, altc1_cb,\
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altc2_used, altc2_ri, altc2_cb,\
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@ -1,242 +0,0 @@
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/*
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* Structures and registers for GPIO access in the Nomadik SoC
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*
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* Copyright (C) 2008 STMicroelectronics
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* Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
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* Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __PLAT_NOMADIK_GPIO
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#define __PLAT_NOMADIK_GPIO
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/*
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* pin configurations are represented by 32-bit integers:
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*
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* bit 0.. 8 - Pin Number (512 Pins Maximum)
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* bit 9..10 - Alternate Function Selection
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* bit 11..12 - Pull up/down state
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* bit 13 - Sleep mode behaviour
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* bit 14 - Direction
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* bit 15 - Value (if output)
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* bit 16..18 - SLPM pull up/down state
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* bit 19..20 - SLPM direction
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* bit 21..22 - SLPM Value (if output)
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* bit 23..25 - PDIS value (if input)
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* bit 26 - Gpio mode
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* bit 27 - Sleep mode
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*
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* to facilitate the definition, the following macros are provided
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*
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* PIN_CFG_DEFAULT - default config (0):
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* pull up/down = disabled
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* sleep mode = input/wakeup
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* direction = input
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* value = low
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* SLPM direction = same as normal
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* SLPM pull = same as normal
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* SLPM value = same as normal
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*
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* PIN_CFG - default config with alternate function
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*/
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typedef unsigned long pin_cfg_t;
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#define PIN_NUM_MASK 0x1ff
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#define PIN_NUM(x) ((x) & PIN_NUM_MASK)
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#define PIN_ALT_SHIFT 9
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#define PIN_ALT_MASK (0x3 << PIN_ALT_SHIFT)
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#define PIN_ALT(x) (((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
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#define PIN_GPIO (NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
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#define PIN_ALT_A (NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
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#define PIN_ALT_B (NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
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#define PIN_ALT_C (NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
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#define PIN_PULL_SHIFT 11
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#define PIN_PULL_MASK (0x3 << PIN_PULL_SHIFT)
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#define PIN_PULL(x) (((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
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#define PIN_PULL_NONE (NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
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#define PIN_PULL_UP (NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
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#define PIN_PULL_DOWN (NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
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#define PIN_SLPM_SHIFT 13
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#define PIN_SLPM_MASK (0x1 << PIN_SLPM_SHIFT)
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#define PIN_SLPM(x) (((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
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#define PIN_SLPM_MAKE_INPUT (NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
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#define PIN_SLPM_NOCHANGE (NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
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/* These two replace the above in DB8500v2+ */
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#define PIN_SLPM_WAKEUP_ENABLE (NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
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#define PIN_SLPM_WAKEUP_DISABLE (NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
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#define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
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#define PIN_SLPM_GPIO PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
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#define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
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#define PIN_DIR_SHIFT 14
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#define PIN_DIR_MASK (0x1 << PIN_DIR_SHIFT)
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#define PIN_DIR(x) (((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
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#define PIN_DIR_INPUT (0 << PIN_DIR_SHIFT)
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#define PIN_DIR_OUTPUT (1 << PIN_DIR_SHIFT)
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#define PIN_VAL_SHIFT 15
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#define PIN_VAL_MASK (0x1 << PIN_VAL_SHIFT)
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#define PIN_VAL(x) (((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
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#define PIN_VAL_LOW (0 << PIN_VAL_SHIFT)
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#define PIN_VAL_HIGH (1 << PIN_VAL_SHIFT)
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#define PIN_SLPM_PULL_SHIFT 16
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#define PIN_SLPM_PULL_MASK (0x7 << PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_PULL(x) \
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(((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_PULL_NONE \
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((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_PULL_UP \
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((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_PULL_DOWN \
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((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
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#define PIN_SLPM_DIR_SHIFT 19
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#define PIN_SLPM_DIR_MASK (0x3 << PIN_SLPM_DIR_SHIFT)
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#define PIN_SLPM_DIR(x) \
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(((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
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#define PIN_SLPM_DIR_INPUT ((1 + 0) << PIN_SLPM_DIR_SHIFT)
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#define PIN_SLPM_DIR_OUTPUT ((1 + 1) << PIN_SLPM_DIR_SHIFT)
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||||
|
||||
#define PIN_SLPM_VAL_SHIFT 21
|
||||
#define PIN_SLPM_VAL_MASK (0x3 << PIN_SLPM_VAL_SHIFT)
|
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#define PIN_SLPM_VAL(x) \
|
||||
(((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
|
||||
#define PIN_SLPM_VAL_LOW ((1 + 0) << PIN_SLPM_VAL_SHIFT)
|
||||
#define PIN_SLPM_VAL_HIGH ((1 + 1) << PIN_SLPM_VAL_SHIFT)
|
||||
|
||||
#define PIN_SLPM_PDIS_SHIFT 23
|
||||
#define PIN_SLPM_PDIS_MASK (0x3 << PIN_SLPM_PDIS_SHIFT)
|
||||
#define PIN_SLPM_PDIS(x) \
|
||||
(((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
|
||||
#define PIN_SLPM_PDIS_NO_CHANGE (0 << PIN_SLPM_PDIS_SHIFT)
|
||||
#define PIN_SLPM_PDIS_DISABLED (1 << PIN_SLPM_PDIS_SHIFT)
|
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#define PIN_SLPM_PDIS_ENABLED (2 << PIN_SLPM_PDIS_SHIFT)
|
||||
|
||||
#define PIN_LOWEMI_SHIFT 25
|
||||
#define PIN_LOWEMI_MASK (0x1 << PIN_LOWEMI_SHIFT)
|
||||
#define PIN_LOWEMI(x) (((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
|
||||
#define PIN_LOWEMI_DISABLED (0 << PIN_LOWEMI_SHIFT)
|
||||
#define PIN_LOWEMI_ENABLED (1 << PIN_LOWEMI_SHIFT)
|
||||
|
||||
#define PIN_GPIOMODE_SHIFT 26
|
||||
#define PIN_GPIOMODE_MASK (0x1 << PIN_GPIOMODE_SHIFT)
|
||||
#define PIN_GPIOMODE(x) (((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
|
||||
#define PIN_GPIOMODE_DISABLED (0 << PIN_GPIOMODE_SHIFT)
|
||||
#define PIN_GPIOMODE_ENABLED (1 << PIN_GPIOMODE_SHIFT)
|
||||
|
||||
#define PIN_SLEEPMODE_SHIFT 27
|
||||
#define PIN_SLEEPMODE_MASK (0x1 << PIN_SLEEPMODE_SHIFT)
|
||||
#define PIN_SLEEPMODE(x) (((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
|
||||
#define PIN_SLEEPMODE_DISABLED (0 << PIN_SLEEPMODE_SHIFT)
|
||||
#define PIN_SLEEPMODE_ENABLED (1 << PIN_SLEEPMODE_SHIFT)
|
||||
|
||||
|
||||
/* Shortcuts. Use these instead of separate DIR, PULL, and VAL. */
|
||||
#define PIN_INPUT_PULLDOWN (PIN_DIR_INPUT | PIN_PULL_DOWN)
|
||||
#define PIN_INPUT_PULLUP (PIN_DIR_INPUT | PIN_PULL_UP)
|
||||
#define PIN_INPUT_NOPULL (PIN_DIR_INPUT | PIN_PULL_NONE)
|
||||
#define PIN_OUTPUT_LOW (PIN_DIR_OUTPUT | PIN_VAL_LOW)
|
||||
#define PIN_OUTPUT_HIGH (PIN_DIR_OUTPUT | PIN_VAL_HIGH)
|
||||
|
||||
#define PIN_SLPM_INPUT_PULLDOWN (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
|
||||
#define PIN_SLPM_INPUT_PULLUP (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
|
||||
#define PIN_SLPM_INPUT_NOPULL (PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
|
||||
#define PIN_SLPM_OUTPUT_LOW (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
|
||||
#define PIN_SLPM_OUTPUT_HIGH (PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
|
||||
|
||||
#define PIN_CFG_DEFAULT (0)
|
||||
|
||||
#define PIN_CFG(num, alt) \
|
||||
(PIN_CFG_DEFAULT |\
|
||||
(PIN_NUM(num) | PIN_##alt))
|
||||
|
||||
#define PIN_CFG_INPUT(num, alt, pull) \
|
||||
(PIN_CFG_DEFAULT |\
|
||||
(PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
|
||||
|
||||
#define PIN_CFG_OUTPUT(num, alt, val) \
|
||||
(PIN_CFG_DEFAULT |\
|
||||
(PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
|
||||
|
||||
/*
|
||||
* "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
|
||||
* the "gpio" namespace for generic and cross-machine functions
|
||||
*/
|
||||
|
||||
#define GPIO_BLOCK_SHIFT 5
|
||||
#define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT)
|
||||
|
||||
/* Register in the logic block */
|
||||
#define NMK_GPIO_DAT 0x00
|
||||
#define NMK_GPIO_DATS 0x04
|
||||
#define NMK_GPIO_DATC 0x08
|
||||
#define NMK_GPIO_PDIS 0x0c
|
||||
#define NMK_GPIO_DIR 0x10
|
||||
#define NMK_GPIO_DIRS 0x14
|
||||
#define NMK_GPIO_DIRC 0x18
|
||||
#define NMK_GPIO_SLPC 0x1c
|
||||
#define NMK_GPIO_AFSLA 0x20
|
||||
#define NMK_GPIO_AFSLB 0x24
|
||||
#define NMK_GPIO_LOWEMI 0x28
|
||||
|
||||
#define NMK_GPIO_RIMSC 0x40
|
||||
#define NMK_GPIO_FIMSC 0x44
|
||||
#define NMK_GPIO_IS 0x48
|
||||
#define NMK_GPIO_IC 0x4c
|
||||
#define NMK_GPIO_RWIMSC 0x50
|
||||
#define NMK_GPIO_FWIMSC 0x54
|
||||
#define NMK_GPIO_WKS 0x58
|
||||
/* These appear in DB8540 and later ASICs */
|
||||
#define NMK_GPIO_EDGELEVEL 0x5C
|
||||
#define NMK_GPIO_LEVEL 0x60
|
||||
|
||||
/* Alternate functions: function C is set in hw by setting both A and B */
|
||||
#define NMK_GPIO_ALT_GPIO 0
|
||||
#define NMK_GPIO_ALT_A 1
|
||||
#define NMK_GPIO_ALT_B 2
|
||||
#define NMK_GPIO_ALT_C (NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
|
||||
|
||||
#define NMK_GPIO_ALT_CX_SHIFT 2
|
||||
#define NMK_GPIO_ALT_C1 ((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
|
||||
#define NMK_GPIO_ALT_C2 ((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
|
||||
#define NMK_GPIO_ALT_C3 ((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
|
||||
#define NMK_GPIO_ALT_C4 ((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
|
||||
|
||||
/* Pull up/down values */
|
||||
enum nmk_gpio_pull {
|
||||
NMK_GPIO_PULL_NONE,
|
||||
NMK_GPIO_PULL_UP,
|
||||
NMK_GPIO_PULL_DOWN,
|
||||
};
|
||||
|
||||
/* Sleep mode */
|
||||
enum nmk_gpio_slpm {
|
||||
NMK_GPIO_SLPM_INPUT,
|
||||
NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
|
||||
NMK_GPIO_SLPM_NOCHANGE,
|
||||
NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
|
||||
};
|
||||
|
||||
/*
|
||||
* Platform data to register a block: only the initial gpio/irq number.
|
||||
*/
|
||||
struct nmk_gpio_platform_data {
|
||||
char *name;
|
||||
int first_gpio;
|
||||
int first_irq;
|
||||
int num_gpio;
|
||||
u32 (*get_secondary_status)(unsigned int bank);
|
||||
void (*set_ioforce)(bool enable);
|
||||
bool supports_sleepmode;
|
||||
};
|
||||
|
||||
#endif /* __PLAT_NOMADIK_GPIO */
|
||||
Loading…
Reference in New Issue
Block a user