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scsi: hisi_sas: Switch v3 hw to MQ
Now that the block layer provides a shared tag, we can switch the driver to expose all HW queues. Signed-off-by: John Garry <john.garry@huawei.com> Tested-by: Douglas Gilbert <dgilbert@interlog.com> Acked-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Jens Axboe <axboe@kernel.dk>
This commit is contained in:
John Garry
Jens Axboe
parent
64f1501bd2
commit
8d98416a55
@ -8,6 +8,8 @@
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#define _HISI_SAS_H_
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#include <linux/acpi.h>
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#include <linux/blk-mq.h>
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#include <linux/blk-mq-pci.h>
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/dmapool.h>
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@ -431,7 +433,6 @@ struct hisi_hba {
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u32 intr_coal_count; /* Interrupt count to coalesce */
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int cq_nvecs;
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unsigned int *reply_map;
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/* bist */
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enum sas_linkrate debugfs_bist_linkrate;
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@ -417,6 +417,7 @@ static int hisi_sas_task_prep(struct sas_task *task,
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struct device *dev = hisi_hba->dev;
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int dlvry_queue_slot, dlvry_queue, rc, slot_idx;
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int n_elem = 0, n_elem_dif = 0, n_elem_req = 0;
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struct scsi_cmnd *scmd = NULL;
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struct hisi_sas_dq *dq;
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unsigned long flags;
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int wr_q_index;
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@ -432,10 +433,23 @@ static int hisi_sas_task_prep(struct sas_task *task,
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return -ECOMM;
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}
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if (hisi_hba->reply_map) {
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int cpu = raw_smp_processor_id();
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unsigned int dq_index = hisi_hba->reply_map[cpu];
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if (task->uldd_task) {
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struct ata_queued_cmd *qc;
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if (dev_is_sata(device)) {
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qc = task->uldd_task;
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scmd = qc->scsicmd;
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} else {
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scmd = task->uldd_task;
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}
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}
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if (scmd) {
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unsigned int dq_index;
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u32 blk_tag;
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blk_tag = blk_mq_unique_tag(scmd->request);
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dq_index = blk_mq_unique_tag_to_hwq(blk_tag);
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*dq_pointer = dq = &hisi_hba->dq[dq_index];
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} else {
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*dq_pointer = dq = sas_dev->dq;
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@ -464,21 +478,9 @@ static int hisi_sas_task_prep(struct sas_task *task,
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if (hisi_hba->hw->slot_index_alloc)
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rc = hisi_hba->hw->slot_index_alloc(hisi_hba, device);
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else {
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struct scsi_cmnd *scsi_cmnd = NULL;
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else
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rc = hisi_sas_slot_index_alloc(hisi_hba, scmd);
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if (task->uldd_task) {
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struct ata_queued_cmd *qc;
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if (dev_is_sata(device)) {
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qc = task->uldd_task;
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scsi_cmnd = qc->scsicmd;
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} else {
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scsi_cmnd = task->uldd_task;
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}
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}
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rc = hisi_sas_slot_index_alloc(hisi_hba, scsi_cmnd);
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}
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if (rc < 0)
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goto err_out_dif_dma_unmap;
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@ -2362,68 +2362,36 @@ static irqreturn_t cq_interrupt_v3_hw(int irq_no, void *p)
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return IRQ_WAKE_THREAD;
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}
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static void setup_reply_map_v3_hw(struct hisi_hba *hisi_hba, int nvecs)
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static int interrupt_preinit_v3_hw(struct hisi_hba *hisi_hba)
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{
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const struct cpumask *mask;
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int queue, cpu;
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int vectors;
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int max_msi = HISI_SAS_MSI_COUNT_V3_HW, min_msi;
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struct Scsi_Host *shost = hisi_hba->shost;
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struct irq_affinity desc = {
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.pre_vectors = BASE_VECTORS_V3_HW,
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};
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for (queue = 0; queue < nvecs; queue++) {
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struct hisi_sas_cq *cq = &hisi_hba->cq[queue];
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min_msi = MIN_AFFINE_VECTORS_V3_HW;
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vectors = pci_alloc_irq_vectors_affinity(hisi_hba->pci_dev,
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min_msi, max_msi,
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PCI_IRQ_MSI |
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PCI_IRQ_AFFINITY,
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&desc);
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if (vectors < 0)
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return -ENOENT;
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mask = pci_irq_get_affinity(hisi_hba->pci_dev, queue +
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BASE_VECTORS_V3_HW);
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if (!mask)
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goto fallback;
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cq->irq_mask = mask;
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for_each_cpu(cpu, mask)
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hisi_hba->reply_map[cpu] = queue;
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}
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return;
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fallback:
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for_each_possible_cpu(cpu)
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hisi_hba->reply_map[cpu] = cpu % hisi_hba->queue_count;
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/* Don't clean all CQ masks */
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hisi_hba->cq_nvecs = vectors - BASE_VECTORS_V3_HW;
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shost->nr_hw_queues = hisi_hba->cq_nvecs;
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return 0;
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}
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static int interrupt_init_v3_hw(struct hisi_hba *hisi_hba)
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{
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struct device *dev = hisi_hba->dev;
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struct pci_dev *pdev = hisi_hba->pci_dev;
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int vectors, rc, i;
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int max_msi = HISI_SAS_MSI_COUNT_V3_HW, min_msi;
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if (auto_affine_msi_experimental) {
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struct irq_affinity desc = {
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.pre_vectors = BASE_VECTORS_V3_HW,
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};
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dev_info(dev, "Enable MSI auto-affinity\n");
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min_msi = MIN_AFFINE_VECTORS_V3_HW;
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hisi_hba->reply_map = devm_kcalloc(dev, nr_cpu_ids,
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sizeof(unsigned int),
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GFP_KERNEL);
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if (!hisi_hba->reply_map)
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return -ENOMEM;
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vectors = pci_alloc_irq_vectors_affinity(hisi_hba->pci_dev,
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min_msi, max_msi,
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PCI_IRQ_MSI |
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PCI_IRQ_AFFINITY,
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&desc);
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if (vectors < 0)
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return -ENOENT;
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setup_reply_map_v3_hw(hisi_hba, vectors - BASE_VECTORS_V3_HW);
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} else {
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min_msi = max_msi;
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vectors = pci_alloc_irq_vectors(hisi_hba->pci_dev, min_msi,
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max_msi, PCI_IRQ_MSI);
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if (vectors < 0)
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return vectors;
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}
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hisi_hba->cq_nvecs = vectors - BASE_VECTORS_V3_HW;
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int rc, i;
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rc = devm_request_irq(dev, pci_irq_vector(pdev, 1),
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int_phy_up_down_bcast_v3_hw, 0,
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@ -3072,6 +3040,15 @@ static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable)
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return 0;
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}
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static int hisi_sas_map_queues(struct Scsi_Host *shost)
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{
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struct hisi_hba *hisi_hba = shost_priv(shost);
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struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
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return blk_mq_pci_map_queues(qmap, hisi_hba->pci_dev,
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BASE_VECTORS_V3_HW);
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}
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static struct scsi_host_template sht_v3_hw = {
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.name = DRV_NAME,
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.proc_name = DRV_NAME,
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@ -3082,6 +3059,7 @@ static struct scsi_host_template sht_v3_hw = {
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.slave_configure = hisi_sas_slave_configure,
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.scan_finished = hisi_sas_scan_finished,
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.scan_start = hisi_sas_scan_start,
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.map_queues = hisi_sas_map_queues,
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.change_queue_depth = sas_change_queue_depth,
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.bios_param = sas_bios_param,
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.this_id = -1,
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@ -3098,6 +3076,7 @@ static struct scsi_host_template sht_v3_hw = {
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.shost_attrs = host_attrs_v3_hw,
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.tag_alloc_policy = BLK_TAG_ALLOC_RR,
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.host_reset = hisi_sas_host_reset,
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.host_tagset = 1,
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};
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static const struct hisi_sas_hw hisi_sas_v3_hw = {
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@ -3269,6 +3248,10 @@ hisi_sas_v3_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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if (hisi_sas_debugfs_enable)
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hisi_sas_debugfs_init(hisi_hba);
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rc = interrupt_preinit_v3_hw(hisi_hba);
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if (rc)
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goto err_out_ha;
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dev_err(dev, "%d hw queues\n", shost->nr_hw_queues);
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rc = scsi_add_host(shost, dev);
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if (rc)
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goto err_out_ha;
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