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net: phy: Optimize phy speed mask to be compatible to yt8821
yt8521 and yt8531s as Gigabit transceiver use bit15:14(bit9 reserved default 0) as phy speed mask, yt8821 as 2.5G transceiver uses bit9 bit15:14 as phy speed mask. Be compatible to yt8821, reform phy speed mask and phy speed macro. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Frank Sae <Frank.Sae@motor-comm.com> Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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@ -46,12 +46,10 @@
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/* Specific Status Register */
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#define YTPHY_SPECIFIC_STATUS_REG 0x11
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#define YTPHY_SSR_SPEED_MODE_OFFSET 14
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#define YTPHY_SSR_SPEED_MODE_MASK (BIT(15) | BIT(14))
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#define YTPHY_SSR_SPEED_10M 0x0
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#define YTPHY_SSR_SPEED_100M 0x1
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#define YTPHY_SSR_SPEED_1000M 0x2
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#define YTPHY_SSR_SPEED_MASK ((0x3 << 14) | BIT(9))
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#define YTPHY_SSR_SPEED_10M ((0x0 << 14))
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#define YTPHY_SSR_SPEED_100M ((0x1 << 14))
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#define YTPHY_SSR_SPEED_1000M ((0x2 << 14))
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#define YTPHY_SSR_DUPLEX_OFFSET 13
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#define YTPHY_SSR_DUPLEX BIT(13)
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#define YTPHY_SSR_PAGE_RECEIVED BIT(12)
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@ -1187,8 +1185,7 @@ static int yt8521_adjust_status(struct phy_device *phydev, int status,
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else
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duplex = DUPLEX_FULL; /* for fiber, it always DUPLEX_FULL */
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speed_mode = (status & YTPHY_SSR_SPEED_MODE_MASK) >>
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YTPHY_SSR_SPEED_MODE_OFFSET;
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speed_mode = status & YTPHY_SSR_SPEED_MASK;
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switch (speed_mode) {
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case YTPHY_SSR_SPEED_10M:
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