mirror of
https://github.com/torvalds/linux.git
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Char/misc driver fixes for 5.16-rc5
Here are a bunch of small char/misc and other driver subsystem fixes for 5.16-rc5 Included in here are: - iio driver fixes for reported problems. - phy driver fixes for a number of reported problems. - mhi resume bugfix for broken hardware - nvmem driver fix - rtsx driver fix for irq issues - fastrpc packet parsing fix All of these have been in linux-next for a while with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYbYCqA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ylTYQCgyo5jrV1yye8z1rDbkedjwQgDoVQAn3Qp5/l8 VWH18k8sQwfEuuMVxHRe =Ky7t -----END PGP SIGNATURE----- Merge tag 'char-misc-5.16-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver fixes from Greg KH: "Here are a bunch of small char/misc and other driver subsystem fixes. Included in here are: - iio driver fixes for reported problems - phy driver fixes for a number of reported problems - mhi resume bugfix for broken hardware - nvmem driver fix - rtsx driver fix for irq issues - fastrpc packet parsing fix All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.16-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (33 commits) bus: mhi: core: Add support for forced PM resume iio: trigger: stm32-timer: fix MODULE_ALIAS misc: rtsx: Avoid mangling IRQ during runtime PM nvmem: eeprom: at25: fix FRAM byte_len misc: fastrpc: fix improper packet size calculation MAINTAINERS: add maintainer for Qualcomm FastRPC driver bus: mhi: pci_generic: Fix device recovery failed issue iio: adc: stm32: fix null pointer on defer_probe error phy: HiSilicon: Fix copy and paste bug in error handling dt-bindings: phy: zynqmp-psgtr: fix USB phy name phy: ti: omap-usb2: Fix the kernel-doc style phy: qualcomm: ipq806x-usb: Fix kernel-doc style iio: at91-sama5d2: Fix incorrect sign extension iio: adc: axp20x_adc: fix charging current reporting on AXP22x iio: gyro: adxrs290: fix data signedness phy: ti: tusb1210: Fix the kernel-doc warn phy: qualcomm: usb-hsic: Fix the kernel-doc warn phy: qualcomm: qmp: Add missing struct documentation phy: mvebu-cp110-utmi: Fix kernel-doc warns iio: ad7768-1: Call iio_trigger_notify_done() on error ...
This commit is contained in:
Linus Torvalds
commit
8d7ed10410
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@ -29,7 +29,7 @@ properties:
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- PHY_TYPE_PCIE
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- PHY_TYPE_SATA
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- PHY_TYPE_SGMII
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- PHY_TYPE_USB
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- PHY_TYPE_USB3
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- description: The PHY instance
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minimum: 0
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maximum: 1 # for DP, SATA or USB
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@ -15770,6 +15770,15 @@ S: Maintained
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F: Documentation/devicetree/bindings/net/qcom,ethqos.txt
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F: drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c
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QUALCOMM FASTRPC DRIVER
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M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
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M: Amol Maheshwari <amahesh@qti.qualcomm.com>
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L: linux-arm-msm@vger.kernel.org
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S: Maintained
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F: Documentation/devicetree/bindings/misc/qcom,fastrpc.txt
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F: drivers/misc/fastrpc.c
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F: include/uapi/misc/fastrpc.h
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QUALCOMM GENERIC INTERFACE I2C DRIVER
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M: Akash Asthana <akashast@codeaurora.org>
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M: Mukesh Savaliya <msavaliy@codeaurora.org>
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@ -881,7 +881,7 @@ int mhi_pm_suspend(struct mhi_controller *mhi_cntrl)
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}
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EXPORT_SYMBOL_GPL(mhi_pm_suspend);
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int mhi_pm_resume(struct mhi_controller *mhi_cntrl)
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static int __mhi_pm_resume(struct mhi_controller *mhi_cntrl, bool force)
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{
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struct mhi_chan *itr, *tmp;
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struct device *dev = &mhi_cntrl->mhi_dev->dev;
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@ -898,8 +898,12 @@ int mhi_pm_resume(struct mhi_controller *mhi_cntrl)
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if (MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state))
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return -EIO;
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if (mhi_get_mhi_state(mhi_cntrl) != MHI_STATE_M3)
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return -EINVAL;
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if (mhi_get_mhi_state(mhi_cntrl) != MHI_STATE_M3) {
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dev_warn(dev, "Resuming from non M3 state (%s)\n",
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TO_MHI_STATE_STR(mhi_get_mhi_state(mhi_cntrl)));
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if (!force)
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return -EINVAL;
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}
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/* Notify clients about exiting LPM */
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list_for_each_entry_safe(itr, tmp, &mhi_cntrl->lpm_chans, node) {
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@ -940,8 +944,19 @@ int mhi_pm_resume(struct mhi_controller *mhi_cntrl)
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return 0;
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}
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int mhi_pm_resume(struct mhi_controller *mhi_cntrl)
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{
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return __mhi_pm_resume(mhi_cntrl, false);
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}
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EXPORT_SYMBOL_GPL(mhi_pm_resume);
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int mhi_pm_resume_force(struct mhi_controller *mhi_cntrl)
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{
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return __mhi_pm_resume(mhi_cntrl, true);
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}
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EXPORT_SYMBOL_GPL(mhi_pm_resume_force);
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int __mhi_device_get_sync(struct mhi_controller *mhi_cntrl)
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{
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int ret;
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@ -20,7 +20,7 @@
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#define MHI_PCI_DEFAULT_BAR_NUM 0
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#define MHI_POST_RESET_DELAY_MS 500
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#define MHI_POST_RESET_DELAY_MS 2000
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#define HEALTH_CHECK_PERIOD (HZ * 2)
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@ -1595,8 +1595,7 @@ static int kxcjk1013_probe(struct i2c_client *client,
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return 0;
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err_buffer_cleanup:
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if (data->dready_trig)
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iio_triggered_buffer_cleanup(indio_dev);
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iio_triggered_buffer_cleanup(indio_dev);
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err_trigger_unregister:
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if (data->dready_trig)
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iio_trigger_unregister(data->dready_trig);
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@ -1618,8 +1617,8 @@ static int kxcjk1013_remove(struct i2c_client *client)
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pm_runtime_disable(&client->dev);
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pm_runtime_set_suspended(&client->dev);
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iio_triggered_buffer_cleanup(indio_dev);
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if (data->dready_trig) {
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iio_triggered_buffer_cleanup(indio_dev);
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iio_trigger_unregister(data->dready_trig);
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iio_trigger_unregister(data->motion_trig);
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}
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|
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@ -224,14 +224,14 @@ static irqreturn_t kxsd9_trigger_handler(int irq, void *p)
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hw_values.chan,
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sizeof(hw_values.chan));
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if (ret) {
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dev_err(st->dev,
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"error reading data\n");
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return ret;
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dev_err(st->dev, "error reading data: %d\n", ret);
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goto out;
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}
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iio_push_to_buffers_with_timestamp(indio_dev,
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&hw_values,
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iio_get_time_ns(indio_dev));
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out:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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|
|
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@ -1470,7 +1470,7 @@ static int mma8452_trigger_setup(struct iio_dev *indio_dev)
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if (ret)
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return ret;
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indio_dev->trig = trig;
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indio_dev->trig = iio_trigger_get(trig);
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return 0;
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}
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@ -532,7 +532,7 @@ config IMX7D_ADC
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config IMX8QXP_ADC
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tristate "NXP IMX8QXP ADC driver"
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depends on ARCH_MXC_ARM64 || COMPILE_TEST
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depends on ARCH_MXC || COMPILE_TEST
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depends on HAS_IOMEM
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help
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Say yes here to build support for IMX8QXP ADC.
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@ -480,8 +480,8 @@ static irqreturn_t ad7768_trigger_handler(int irq, void *p)
|
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iio_push_to_buffers_with_timestamp(indio_dev, &st->data.scan,
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iio_get_time_ns(indio_dev));
|
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|
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iio_trigger_notify_done(indio_dev->trig);
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err_unlock:
|
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iio_trigger_notify_done(indio_dev->trig);
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mutex_unlock(&st->lock);
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return IRQ_HANDLED;
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|
|
|
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|
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@ -1586,7 +1586,8 @@ static int at91_adc_read_info_raw(struct iio_dev *indio_dev,
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*val = st->conversion_value;
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ret = at91_adc_adjust_val_osr(st, val);
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if (chan->scan_type.sign == 's')
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*val = sign_extend32(*val, 11);
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*val = sign_extend32(*val,
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chan->scan_type.realbits - 1);
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st->conversion_done = false;
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}
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|
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|
|
|
|||
|
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@ -251,19 +251,8 @@ static int axp22x_adc_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val)
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{
|
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struct axp20x_adc_iio *info = iio_priv(indio_dev);
|
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int size;
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|
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/*
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* N.B.: Unlike the Chinese datasheets tell, the charging current is
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* stored on 12 bits, not 13 bits. Only discharging current is on 13
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* bits.
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*/
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if (chan->type == IIO_CURRENT && chan->channel == AXP22X_BATT_DISCHRG_I)
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size = 13;
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else
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size = 12;
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*val = axp20x_read_variable_width(info->regmap, chan->address, size);
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*val = axp20x_read_variable_width(info->regmap, chan->address, 12);
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if (*val < 0)
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return *val;
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@ -386,9 +375,8 @@ static int axp22x_adc_scale(struct iio_chan_spec const *chan, int *val,
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return IIO_VAL_INT_PLUS_MICRO;
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case IIO_CURRENT:
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*val = 0;
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*val2 = 500000;
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return IIO_VAL_INT_PLUS_MICRO;
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*val = 1;
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return IIO_VAL_INT;
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case IIO_TEMP:
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*val = 100;
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|
|
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@ -248,7 +248,6 @@ static int dln2_adc_set_chan_period(struct dln2_adc *dln2,
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static int dln2_adc_read(struct dln2_adc *dln2, unsigned int channel)
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{
|
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int ret, i;
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struct iio_dev *indio_dev = platform_get_drvdata(dln2->pdev);
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u16 conflict;
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__le16 value;
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int olen = sizeof(value);
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@ -257,13 +256,9 @@ static int dln2_adc_read(struct dln2_adc *dln2, unsigned int channel)
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.chan = channel,
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};
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret < 0)
|
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return ret;
|
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|
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ret = dln2_adc_set_chan_enabled(dln2, channel, true);
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if (ret < 0)
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goto release_direct;
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return ret;
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|
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ret = dln2_adc_set_port_enabled(dln2, true, &conflict);
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if (ret < 0) {
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|
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@ -300,8 +295,6 @@ disable_port:
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dln2_adc_set_port_enabled(dln2, false, NULL);
|
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disable_chan:
|
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dln2_adc_set_chan_enabled(dln2, channel, false);
|
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release_direct:
|
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iio_device_release_direct_mode(indio_dev);
|
||||
|
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return ret;
|
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}
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|
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@ -337,10 +330,16 @@ static int dln2_adc_read_raw(struct iio_dev *indio_dev,
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|||
|
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switch (mask) {
|
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case IIO_CHAN_INFO_RAW:
|
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ret = iio_device_claim_direct_mode(indio_dev);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
mutex_lock(&dln2->mutex);
|
||||
ret = dln2_adc_read(dln2, chan->channel);
|
||||
mutex_unlock(&dln2->mutex);
|
||||
|
||||
iio_device_release_direct_mode(indio_dev);
|
||||
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
|
|
@ -656,7 +655,11 @@ static int dln2_adc_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
}
|
||||
iio_trigger_set_drvdata(dln2->trig, dln2);
|
||||
devm_iio_trigger_register(dev, dln2->trig);
|
||||
ret = devm_iio_trigger_register(dev, dln2->trig);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to register trigger: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
iio_trigger_set_immutable(indio_dev, dln2->trig);
|
||||
|
||||
ret = devm_iio_triggered_buffer_setup(dev, indio_dev, NULL,
|
||||
|
|
|
|||
|
|
@ -1117,6 +1117,7 @@ static void stm32h7_adc_unprepare(struct iio_dev *indio_dev)
|
|||
{
|
||||
struct stm32_adc *adc = iio_priv(indio_dev);
|
||||
|
||||
stm32_adc_writel(adc, STM32H7_ADC_PCSEL, 0);
|
||||
stm32h7_adc_disable(indio_dev);
|
||||
stm32_adc_int_ch_disable(adc);
|
||||
stm32h7_adc_enter_pwr_down(adc);
|
||||
|
|
@ -1986,7 +1987,7 @@ static int stm32_adc_populate_int_ch(struct iio_dev *indio_dev, const char *ch_n
|
|||
/* Get calibration data for vrefint channel */
|
||||
ret = nvmem_cell_read_u16(&indio_dev->dev, "vrefint", &vrefint);
|
||||
if (ret && ret != -ENOENT) {
|
||||
return dev_err_probe(&indio_dev->dev, ret,
|
||||
return dev_err_probe(indio_dev->dev.parent, ret,
|
||||
"nvmem access error\n");
|
||||
}
|
||||
if (ret == -ENOENT)
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/kernel.h>
|
||||
|
|
@ -124,7 +125,7 @@ static int adxrs290_get_rate_data(struct iio_dev *indio_dev, const u8 cmd, int *
|
|||
goto err_unlock;
|
||||
}
|
||||
|
||||
*val = temp;
|
||||
*val = sign_extend32(temp, 15);
|
||||
|
||||
err_unlock:
|
||||
mutex_unlock(&st->lock);
|
||||
|
|
@ -146,7 +147,7 @@ static int adxrs290_get_temp_data(struct iio_dev *indio_dev, int *val)
|
|||
}
|
||||
|
||||
/* extract lower 12 bits temperature reading */
|
||||
*val = temp & 0x0FFF;
|
||||
*val = sign_extend32(temp, 11);
|
||||
|
||||
err_unlock:
|
||||
mutex_unlock(&st->lock);
|
||||
|
|
|
|||
|
|
@ -61,9 +61,9 @@ static irqreturn_t itg3200_trigger_handler(int irq, void *p)
|
|||
|
||||
iio_push_to_buffers_with_timestamp(indio_dev, &scan, pf->timestamp);
|
||||
|
||||
error_ret:
|
||||
iio_trigger_notify_done(indio_dev->trig);
|
||||
|
||||
error_ret:
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -556,7 +556,6 @@ struct iio_trigger *viio_trigger_alloc(struct device *parent,
|
|||
irq_modify_status(trig->subirq_base + i,
|
||||
IRQ_NOREQUEST | IRQ_NOAUTOEN, IRQ_NOPROBE);
|
||||
}
|
||||
get_device(&trig->dev);
|
||||
|
||||
return trig;
|
||||
|
||||
|
|
|
|||
|
|
@ -1275,7 +1275,7 @@ static irqreturn_t ltr501_trigger_handler(int irq, void *p)
|
|||
ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
|
||||
als_buf, sizeof(als_buf));
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
goto done;
|
||||
if (test_bit(0, indio_dev->active_scan_mask))
|
||||
scan.channels[j++] = le16_to_cpu(als_buf[1]);
|
||||
if (test_bit(1, indio_dev->active_scan_mask))
|
||||
|
|
|
|||
|
|
@ -546,9 +546,8 @@ static irqreturn_t stk3310_irq_event_handler(int irq, void *private)
|
|||
mutex_lock(&data->lock);
|
||||
ret = regmap_field_read(data->reg_flag_nf, &dir);
|
||||
if (ret < 0) {
|
||||
dev_err(&data->client->dev, "register read failed\n");
|
||||
mutex_unlock(&data->lock);
|
||||
return ret;
|
||||
dev_err(&data->client->dev, "register read failed: %d\n", ret);
|
||||
goto out;
|
||||
}
|
||||
event = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 1,
|
||||
IIO_EV_TYPE_THRESH,
|
||||
|
|
@ -560,6 +559,7 @@ static irqreturn_t stk3310_irq_event_handler(int irq, void *private)
|
|||
ret = regmap_field_write(data->reg_flag_psint, 0);
|
||||
if (ret < 0)
|
||||
dev_err(&data->client->dev, "failed to reset interrupts\n");
|
||||
out:
|
||||
mutex_unlock(&data->lock);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
|
|
|
|||
|
|
@ -912,6 +912,6 @@ static struct platform_driver stm32_timer_trigger_driver = {
|
|||
};
|
||||
module_platform_driver(stm32_timer_trigger_driver);
|
||||
|
||||
MODULE_ALIAS("platform: stm32-timer-trigger");
|
||||
MODULE_ALIAS("platform:stm32-timer-trigger");
|
||||
MODULE_DESCRIPTION("STMicroelectronics STM32 Timer Trigger driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
|
|
@ -1803,8 +1803,6 @@ static int rtsx_pci_runtime_suspend(struct device *device)
|
|||
mutex_lock(&pcr->pcr_mutex);
|
||||
rtsx_pci_power_off(pcr, HOST_ENTER_S3);
|
||||
|
||||
free_irq(pcr->irq, (void *)pcr);
|
||||
|
||||
mutex_unlock(&pcr->pcr_mutex);
|
||||
|
||||
pcr->is_runtime_suspended = true;
|
||||
|
|
@ -1825,8 +1823,6 @@ static int rtsx_pci_runtime_resume(struct device *device)
|
|||
mutex_lock(&pcr->pcr_mutex);
|
||||
|
||||
rtsx_pci_write_register(pcr, HOST_SLEEP_STATE, 0x03, 0x00);
|
||||
rtsx_pci_acquire_irq(pcr);
|
||||
synchronize_irq(pcr->irq);
|
||||
|
||||
if (pcr->ops->fetch_vendor_settings)
|
||||
pcr->ops->fetch_vendor_settings(pcr);
|
||||
|
|
|
|||
|
|
@ -376,7 +376,6 @@ MODULE_DEVICE_TABLE(spi, at25_spi_ids);
|
|||
static int at25_probe(struct spi_device *spi)
|
||||
{
|
||||
struct at25_data *at25 = NULL;
|
||||
struct spi_eeprom chip;
|
||||
int err;
|
||||
int sr;
|
||||
u8 id[FM25_ID_LEN];
|
||||
|
|
@ -389,15 +388,18 @@ static int at25_probe(struct spi_device *spi)
|
|||
if (match && !strcmp(match->compatible, "cypress,fm25"))
|
||||
is_fram = 1;
|
||||
|
||||
at25 = devm_kzalloc(&spi->dev, sizeof(struct at25_data), GFP_KERNEL);
|
||||
if (!at25)
|
||||
return -ENOMEM;
|
||||
|
||||
/* Chip description */
|
||||
if (!spi->dev.platform_data) {
|
||||
if (!is_fram) {
|
||||
err = at25_fw_to_chip(&spi->dev, &chip);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
} else
|
||||
chip = *(struct spi_eeprom *)spi->dev.platform_data;
|
||||
if (spi->dev.platform_data) {
|
||||
memcpy(&at25->chip, spi->dev.platform_data, sizeof(at25->chip));
|
||||
} else if (!is_fram) {
|
||||
err = at25_fw_to_chip(&spi->dev, &at25->chip);
|
||||
if (err)
|
||||
return err;
|
||||
}
|
||||
|
||||
/* Ping the chip ... the status register is pretty portable,
|
||||
* unlike probing manufacturer IDs. We do expect that system
|
||||
|
|
@ -409,12 +411,7 @@ static int at25_probe(struct spi_device *spi)
|
|||
return -ENXIO;
|
||||
}
|
||||
|
||||
at25 = devm_kzalloc(&spi->dev, sizeof(struct at25_data), GFP_KERNEL);
|
||||
if (!at25)
|
||||
return -ENOMEM;
|
||||
|
||||
mutex_init(&at25->lock);
|
||||
at25->chip = chip;
|
||||
at25->spi = spi;
|
||||
spi_set_drvdata(spi, at25);
|
||||
|
||||
|
|
@ -431,7 +428,7 @@ static int at25_probe(struct spi_device *spi)
|
|||
dev_err(&spi->dev, "Error: unsupported size (id %02x)\n", id[7]);
|
||||
return -ENODEV;
|
||||
}
|
||||
chip.byte_len = int_pow(2, id[7] - 0x21 + 4) * 1024;
|
||||
at25->chip.byte_len = int_pow(2, id[7] - 0x21 + 4) * 1024;
|
||||
|
||||
if (at25->chip.byte_len > 64 * 1024)
|
||||
at25->chip.flags |= EE_ADDR3;
|
||||
|
|
@ -464,7 +461,7 @@ static int at25_probe(struct spi_device *spi)
|
|||
at25->nvmem_config.type = is_fram ? NVMEM_TYPE_FRAM : NVMEM_TYPE_EEPROM;
|
||||
at25->nvmem_config.name = dev_name(&spi->dev);
|
||||
at25->nvmem_config.dev = &spi->dev;
|
||||
at25->nvmem_config.read_only = chip.flags & EE_READONLY;
|
||||
at25->nvmem_config.read_only = at25->chip.flags & EE_READONLY;
|
||||
at25->nvmem_config.root_only = true;
|
||||
at25->nvmem_config.owner = THIS_MODULE;
|
||||
at25->nvmem_config.compat = true;
|
||||
|
|
@ -474,17 +471,18 @@ static int at25_probe(struct spi_device *spi)
|
|||
at25->nvmem_config.priv = at25;
|
||||
at25->nvmem_config.stride = 1;
|
||||
at25->nvmem_config.word_size = 1;
|
||||
at25->nvmem_config.size = chip.byte_len;
|
||||
at25->nvmem_config.size = at25->chip.byte_len;
|
||||
|
||||
at25->nvmem = devm_nvmem_register(&spi->dev, &at25->nvmem_config);
|
||||
if (IS_ERR(at25->nvmem))
|
||||
return PTR_ERR(at25->nvmem);
|
||||
|
||||
dev_info(&spi->dev, "%d %s %s %s%s, pagesize %u\n",
|
||||
(chip.byte_len < 1024) ? chip.byte_len : (chip.byte_len / 1024),
|
||||
(chip.byte_len < 1024) ? "Byte" : "KByte",
|
||||
(at25->chip.byte_len < 1024) ?
|
||||
at25->chip.byte_len : (at25->chip.byte_len / 1024),
|
||||
(at25->chip.byte_len < 1024) ? "Byte" : "KByte",
|
||||
at25->chip.name, is_fram ? "fram" : "eeprom",
|
||||
(chip.flags & EE_READONLY) ? " (readonly)" : "",
|
||||
(at25->chip.flags & EE_READONLY) ? " (readonly)" : "",
|
||||
at25->chip.page_size);
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -719,16 +719,18 @@ static int fastrpc_get_meta_size(struct fastrpc_invoke_ctx *ctx)
|
|||
static u64 fastrpc_get_payload_size(struct fastrpc_invoke_ctx *ctx, int metalen)
|
||||
{
|
||||
u64 size = 0;
|
||||
int i;
|
||||
int oix;
|
||||
|
||||
size = ALIGN(metalen, FASTRPC_ALIGN);
|
||||
for (i = 0; i < ctx->nscalars; i++) {
|
||||
for (oix = 0; oix < ctx->nbufs; oix++) {
|
||||
int i = ctx->olaps[oix].raix;
|
||||
|
||||
if (ctx->args[i].fd == 0 || ctx->args[i].fd == -1) {
|
||||
|
||||
if (ctx->olaps[i].offset == 0)
|
||||
if (ctx->olaps[oix].offset == 0)
|
||||
size = ALIGN(size, FASTRPC_ALIGN);
|
||||
|
||||
size += (ctx->olaps[i].mend - ctx->olaps[i].mstart);
|
||||
size += (ctx->olaps[oix].mend - ctx->olaps[oix].mstart);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -533,7 +533,11 @@ static int ath11k_mhi_set_state(struct ath11k_pci *ab_pci,
|
|||
ret = mhi_pm_suspend(ab_pci->mhi_ctrl);
|
||||
break;
|
||||
case ATH11K_MHI_RESUME:
|
||||
ret = mhi_pm_resume(ab_pci->mhi_ctrl);
|
||||
/* Do force MHI resume as some devices like QCA6390, WCN6855
|
||||
* are not in M3 state but they are functional. So just ignore
|
||||
* the MHI state while resuming.
|
||||
*/
|
||||
ret = mhi_pm_resume_force(ab_pci->mhi_ctrl);
|
||||
break;
|
||||
case ATH11K_MHI_TRIGGER_RDDM:
|
||||
ret = mhi_force_rddm_mode(ab_pci->mhi_ctrl);
|
||||
|
|
|
|||
|
|
@ -757,8 +757,8 @@ static int hi3670_pcie_phy_get_resources(struct hi3670_pcie_phy *phy,
|
|||
return PTR_ERR(phy->sysctrl);
|
||||
|
||||
phy->pmctrl = syscon_regmap_lookup_by_compatible("hisilicon,hi3670-pmctrl");
|
||||
if (IS_ERR(phy->sysctrl))
|
||||
return PTR_ERR(phy->sysctrl);
|
||||
if (IS_ERR(phy->pmctrl))
|
||||
return PTR_ERR(phy->pmctrl);
|
||||
|
||||
/* clocks */
|
||||
phy->phy_ref_clk = devm_clk_get(dev, "phy_ref");
|
||||
|
|
|
|||
|
|
@ -82,9 +82,9 @@
|
|||
* struct mvebu_cp110_utmi - PHY driver data
|
||||
*
|
||||
* @regs: PHY registers
|
||||
* @syscom: Regmap with system controller registers
|
||||
* @syscon: Regmap with system controller registers
|
||||
* @dev: device driver handle
|
||||
* @caps: PHY capabilities
|
||||
* @ops: phy ops
|
||||
*/
|
||||
struct mvebu_cp110_utmi {
|
||||
void __iomem *regs;
|
||||
|
|
|
|||
|
|
@ -127,12 +127,13 @@ struct phy_drvdata {
|
|||
};
|
||||
|
||||
/**
|
||||
* Write register and read back masked value to confirm it is written
|
||||
* usb_phy_write_readback() - Write register and read back masked value to
|
||||
* confirm it is written
|
||||
*
|
||||
* @base - QCOM DWC3 PHY base virtual address.
|
||||
* @offset - register offset.
|
||||
* @mask - register bitmask specifying what should be updated
|
||||
* @val - value to write.
|
||||
* @phy_dwc3: QCOM DWC3 phy context
|
||||
* @offset: register offset.
|
||||
* @mask: register bitmask specifying what should be updated
|
||||
* @val: value to write.
|
||||
*/
|
||||
static inline void usb_phy_write_readback(struct usb_phy *phy_dwc3,
|
||||
u32 offset,
|
||||
|
|
@ -171,11 +172,11 @@ static int wait_for_latch(void __iomem *addr)
|
|||
}
|
||||
|
||||
/**
|
||||
* Write SSPHY register
|
||||
* usb_ss_write_phycreg() - Write SSPHY register
|
||||
*
|
||||
* @base - QCOM DWC3 PHY base virtual address.
|
||||
* @addr - SSPHY address to write.
|
||||
* @val - value to write.
|
||||
* @phy_dwc3: QCOM DWC3 phy context
|
||||
* @addr: SSPHY address to write.
|
||||
* @val: value to write.
|
||||
*/
|
||||
static int usb_ss_write_phycreg(struct usb_phy *phy_dwc3,
|
||||
u32 addr, u32 val)
|
||||
|
|
@ -209,10 +210,11 @@ err_wait:
|
|||
}
|
||||
|
||||
/**
|
||||
* Read SSPHY register.
|
||||
* usb_ss_read_phycreg() - Read SSPHY register.
|
||||
*
|
||||
* @base - QCOM DWC3 PHY base virtual address.
|
||||
* @addr - SSPHY address to read.
|
||||
* @phy_dwc3: QCOM DWC3 phy context
|
||||
* @addr: SSPHY address to read.
|
||||
* @val: pointer in which read is store.
|
||||
*/
|
||||
static int usb_ss_read_phycreg(struct usb_phy *phy_dwc3,
|
||||
u32 addr, u32 *val)
|
||||
|
|
|
|||
|
|
@ -2973,6 +2973,9 @@ struct qmp_phy_combo_cfg {
|
|||
* @qmp: QMP phy to which this lane belongs
|
||||
* @lane_rst: lane's reset controller
|
||||
* @mode: current PHY mode
|
||||
* @dp_aux_cfg: Display port aux config
|
||||
* @dp_opts: Display port optional config
|
||||
* @dp_clks: Display port clocks
|
||||
*/
|
||||
struct qmp_phy {
|
||||
struct phy *phy;
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/**
|
||||
/*
|
||||
* Copyright (C) 2016 Linaro Ltd
|
||||
*/
|
||||
#include <linux/module.h>
|
||||
|
|
|
|||
|
|
@ -478,7 +478,7 @@ static void stm32_usbphyc_phy_tuning(struct stm32_usbphyc *usbphyc,
|
|||
if (!of_property_read_bool(np, "st,no-lsfs-fb-cap"))
|
||||
usbphyc_phy->tune |= LFSCAPEN;
|
||||
|
||||
if (of_property_read_bool(np, "st,slow-hs-slew-rate"))
|
||||
if (of_property_read_bool(np, "st,decrease-hs-slew-rate"))
|
||||
usbphyc_phy->tune |= HSDRVSLEW;
|
||||
|
||||
ret = of_property_read_u32(np, "st,tune-hs-dc-level", &val);
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/**
|
||||
/*
|
||||
* PCIe SERDES driver for AM654x SoC
|
||||
*
|
||||
* Copyright (C) 2018 - 2019 Texas Instruments Incorporated - http://www.ti.com/
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/**
|
||||
/*
|
||||
* Wrapper driver for SERDES used in J721E
|
||||
*
|
||||
* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
|
||||
|
|
|
|||
|
|
@ -89,9 +89,9 @@ static inline void omap_usb_writel(void __iomem *addr, unsigned int offset,
|
|||
}
|
||||
|
||||
/**
|
||||
* omap_usb2_set_comparator - links the comparator present in the system with
|
||||
* this phy
|
||||
* @comparator - the companion phy(comparator) for this phy
|
||||
* omap_usb2_set_comparator() - links the comparator present in the system with this phy
|
||||
*
|
||||
* @comparator: the companion phy(comparator) for this phy
|
||||
*
|
||||
* The phy companion driver should call this API passing the phy_companion
|
||||
* filled with set_vbus and start_srp to be used by usb phy.
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/**
|
||||
/*
|
||||
* tusb1210.c - TUSB1210 USB ULPI PHY driver
|
||||
*
|
||||
* Copyright (C) 2015 Intel Corporation
|
||||
|
|
|
|||
|
|
@ -663,6 +663,19 @@ int mhi_pm_suspend(struct mhi_controller *mhi_cntrl);
|
|||
*/
|
||||
int mhi_pm_resume(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_pm_resume_force - Force resume MHI from suspended state
|
||||
* @mhi_cntrl: MHI controller
|
||||
*
|
||||
* Resume the device irrespective of its MHI state. As per the MHI spec, devices
|
||||
* has to be in M3 state during resume. But some devices seem to be in a
|
||||
* different MHI state other than M3 but they continue working fine if allowed.
|
||||
* This API is intented to be used for such devices.
|
||||
*
|
||||
* Return: 0 if the resume succeeds, a negative error code otherwise
|
||||
*/
|
||||
int mhi_pm_resume_force(struct mhi_controller *mhi_cntrl);
|
||||
|
||||
/**
|
||||
* mhi_download_rddm_image - Download ramdump image from device for
|
||||
* debugging purpose.
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user