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drm/nouveau/nvif: remove disp chan rd/wr

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There's no good reason the ioremap() that results from nvif_object_map()
should fail, so add a check that the map succeeded, and remove the rd/wr
methods from display channel objects.

As this was the last user of rd/wr methods, the nvif plumbing is removed
at the same time.

Signed-off-by: Ben Skeggs <bskeggs@nvidia.com>
Signed-off-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20240726043828.58966-27-bskeggs@nvidia.com
This commit is contained in:
Ben Skeggs 2024-07-26 14:38:17 +10:00 committed by Danilo Krummrich
parent 216c3c4424
commit 8d7b2d3a7e
9 changed files with 10 additions and 178 deletions
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7
drivers/gpu/drm/nouveau/dispnv50/disp.c
View File

@ -93,8 +93,11 @@ nv50_chan_create(struct nvif_device *device, struct nvif_object *disp,
ret = nvif_object_ctor(disp, "kmsChan", 0,
oclass[0], data, size,
&chan->user);
if (ret == 0)
nvif_object_map(&chan->user, NULL, 0);
if (ret == 0) {
ret = nvif_object_map(&chan->user, NULL, 0);
if (ret)
nvif_object_dtor(&chan->user);
}
nvif_object_sclass_put(&sclass);
return ret;
}

20
drivers/gpu/drm/nouveau/include/nvif/ioctl.h
View File

@ -8,8 +8,6 @@ struct nvif_ioctl_v0 {
#define NVIF_IOCTL_V0_NEW 0x02
#define NVIF_IOCTL_V0_DEL 0x03
#define NVIF_IOCTL_V0_MTHD 0x04
#define NVIF_IOCTL_V0_RD 0x05
#define NVIF_IOCTL_V0_WR 0x06
#define NVIF_IOCTL_V0_MAP 0x07
#define NVIF_IOCTL_V0_UNMAP 0x08
__u8 type;
@ -60,24 +58,6 @@ struct nvif_ioctl_mthd_v0 {
__u8 data[]; /* method data (class.h) */
};
struct nvif_ioctl_rd_v0 {
/* nvif_ioctl ... */
__u8 version;
__u8 size;
__u8 pad02[2];
__u32 data;
__u64 addr;
};
struct nvif_ioctl_wr_v0 {
/* nvif_ioctl ... */
__u8 version;
__u8 size;
__u8 pad02[2];
__u32 data;
__u64 addr;
};
struct nvif_ioctl_map_v0 {
/* nvif_ioctl ... */
__u8 version;

17
drivers/gpu/drm/nouveau/include/nvif/object.h
View File

@ -34,8 +34,6 @@ void nvif_object_dtor(struct nvif_object *);
int nvif_object_ioctl(struct nvif_object *, void *, u32, void **);
int nvif_object_sclass_get(struct nvif_object *, struct nvif_sclass **);
void nvif_object_sclass_put(struct nvif_sclass **);
u32 nvif_object_rd(struct nvif_object *, int, u64);
void nvif_object_wr(struct nvif_object *, int, u64, u32);
int nvif_object_mthd(struct nvif_object *, u32, void *, u32);
int nvif_object_map_handle(struct nvif_object *, void *, u32,
u64 *handle, u64 *length);
@ -47,20 +45,11 @@ void nvif_object_unmap(struct nvif_object *);
#define nvif_object(a) (a)->object
#define nvif_rd(a,f,b,c) ({ \
struct nvif_object *_object = (a); \
u32 _data; \
if (likely(_object->map.ptr)) \
_data = f((u8 __iomem *)_object->map.ptr + (c)); \
else \
_data = nvif_object_rd(_object, (b), (c)); \
u32 _data = f((u8 __iomem *)(a)->map.ptr + (c)); \
_data; \
})
#define nvif_wr(a,f,b,c,d) ({ \
struct nvif_object *_object = (a); \
if (likely(_object->map.ptr)) \
f((d), (u8 __iomem *)_object->map.ptr + (c)); \
else \
nvif_object_wr(_object, (b), (c), (d)); \
f((d), (u8 __iomem *)(a)->map.ptr + (c)); \
})
#define nvif_rd08(a,b) ({ ((u8)nvif_rd((a), ioread8, 1, (b))); })
#define nvif_rd16(a,b) ({ ((u16)nvif_rd((a), ioread16_native, 2, (b))); })
@ -69,7 +58,7 @@ void nvif_object_unmap(struct nvif_object *);
#define nvif_wr16(a,b,c) nvif_wr((a), iowrite16_native, 2, (b), (u16)(c))
#define nvif_wr32(a,b,c) nvif_wr((a), iowrite32_native, 4, (b), (u32)(c))
#define nvif_mask(a,b,c,d) ({ \
struct nvif_object *__object = (a); \
typeof(a) __object = (a); \
u32 _addr = (b), _data = nvif_rd32(__object, _addr); \
nvif_wr32(__object, _addr, (_data & ~(c)) | (d)); \
_data; \

4
drivers/gpu/drm/nouveau/include/nvkm/core/object.h
View File

@ -33,8 +33,6 @@ struct nvkm_object_func {
int (*map)(struct nvkm_object *, void *argv, u32 argc,
enum nvkm_object_map *, u64 *addr, u64 *size);
int (*unmap)(struct nvkm_object *);
int (*rd32)(struct nvkm_object *, u64 addr, u32 *data);
int (*wr32)(struct nvkm_object *, u64 addr, u32 data);
int (*bind)(struct nvkm_object *, struct nvkm_gpuobj *, int align,
struct nvkm_gpuobj **);
int (*sclass)(struct nvkm_object *, int index, struct nvkm_oclass *);
@ -57,8 +55,6 @@ int nvkm_object_ntfy(struct nvkm_object *, u32 mthd, struct nvkm_event **);
int nvkm_object_map(struct nvkm_object *, void *argv, u32 argc,
enum nvkm_object_map *, u64 *addr, u64 *size);
int nvkm_object_unmap(struct nvkm_object *);
int nvkm_object_rd32(struct nvkm_object *, u64 addr, u32 *data);
int nvkm_object_wr32(struct nvkm_object *, u64 addr, u32 data);
int nvkm_object_bind(struct nvkm_object *, struct nvkm_gpuobj *, int align,
struct nvkm_gpuobj **);

37
drivers/gpu/drm/nouveau/nvif/object.c
View File

@ -97,43 +97,6 @@ nvif_object_sclass_get(struct nvif_object *object, struct nvif_sclass **psclass)
return ret;
}
u32
nvif_object_rd(struct nvif_object *object, int size, u64 addr)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_rd_v0 rd;
} args = {
.ioctl.type = NVIF_IOCTL_V0_RD,
.rd.size = size,
.rd.addr = addr,
};
int ret = nvif_object_ioctl(object, &args, sizeof(args), NULL);
if (ret) {
/*XXX: warn? */
return 0;
}
return args.rd.data;
}
void
nvif_object_wr(struct nvif_object *object, int size, u64 addr, u32 data)
{
struct {
struct nvif_ioctl_v0 ioctl;
struct nvif_ioctl_wr_v0 wr;
} args = {
.ioctl.type = NVIF_IOCTL_V0_WR,
.wr.size = size,
.wr.addr = addr,
.wr.data = data,
};
int ret = nvif_object_ioctl(object, &args, sizeof(args), NULL);
if (ret) {
/*XXX: warn? */
}
}
int
nvif_object_mthd(struct nvif_object *object, u32 mthd, void *data, u32 size)
{

49
drivers/gpu/drm/nouveau/nvkm/core/ioctl.c
View File

@ -191,59 +191,14 @@ static int
nvkm_ioctl_rd(struct nvkm_client *client,
struct nvkm_object *object, void *data, u32 size)
{
union {
struct nvif_ioctl_rd_v0 v0;
} *args = data;
union {
u8 b08;
u16 b16;
u32 b32;
} v;
int ret = -ENOSYS;
nvif_ioctl(object, "rd size %d\n", size);
if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
nvif_ioctl(object, "rd vers %d size %d addr %016llx\n",
args->v0.version, args->v0.size, args->v0.addr);
switch (args->v0.size) {
case 4:
ret = nvkm_object_rd32(object, args->v0.addr, &v.b32);
args->v0.data = v.b32;
break;
default:
ret = -EINVAL;
break;
}
}
return ret;
return -ENOSYS;
}
static int
nvkm_ioctl_wr(struct nvkm_client *client,
struct nvkm_object *object, void *data, u32 size)
{
union {
struct nvif_ioctl_wr_v0 v0;
} *args = data;
int ret = -ENOSYS;
nvif_ioctl(object, "wr size %d\n", size);
if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
nvif_ioctl(object,
"wr vers %d size %d addr %016llx data %08x\n",
args->v0.version, args->v0.size, args->v0.addr,
args->v0.data);
} else
return ret;
switch (args->v0.size) {
case 4: return nvkm_object_wr32(object, args->v0.addr, args->v0.data);
default:
break;
}
return -EINVAL;
return -ENOSYS;
}
static int

16
drivers/gpu/drm/nouveau/nvkm/core/object.c
View File

@ -132,22 +132,6 @@ nvkm_object_unmap(struct nvkm_object *object)
return -ENODEV;
}
int
nvkm_object_rd32(struct nvkm_object *object, u64 addr, u32 *data)
{
if (likely(object->func->rd32))
return object->func->rd32(object, addr, data);
return -ENODEV;
}
int
nvkm_object_wr32(struct nvkm_object *object, u64 addr, u32 data)
{
if (likely(object->func->wr32))
return object->func->wr32(object, addr, data);
return -ENODEV;
}
int
nvkm_object_bind(struct nvkm_object *object, struct nvkm_gpuobj *gpuobj,
int align, struct nvkm_gpuobj **pgpuobj)

14
drivers/gpu/drm/nouveau/nvkm/core/oproxy.c
View File

@ -55,18 +55,6 @@ nvkm_oproxy_unmap(struct nvkm_object *object)
return nvkm_object_unmap(oproxy->object);
}
static int
nvkm_oproxy_rd32(struct nvkm_object *object, u64 addr, u32 *data)
{
return nvkm_object_rd32(nvkm_oproxy(object)->object, addr, data);
}
static int
nvkm_oproxy_wr32(struct nvkm_object *object, u64 addr, u32 data)
{
return nvkm_object_wr32(nvkm_oproxy(object)->object, addr, data);
}
static int
nvkm_oproxy_bind(struct nvkm_object *object, struct nvkm_gpuobj *parent,
int align, struct nvkm_gpuobj **pgpuobj)
@ -173,8 +161,6 @@ nvkm_oproxy_func = {
.ntfy = nvkm_oproxy_ntfy,
.map = nvkm_oproxy_map,
.unmap = nvkm_oproxy_unmap,
.rd32 = nvkm_oproxy_rd32,
.wr32 = nvkm_oproxy_wr32,
.bind = nvkm_oproxy_bind,
.sclass = nvkm_oproxy_sclass,
.uevent = nvkm_oproxy_uevent,

24
drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c
View File

@ -26,28 +26,6 @@
#include <nvif/if0014.h>
static int
nvkm_disp_chan_rd32(struct nvkm_object *object, u64 addr, u32 *data)
{
struct nvkm_disp_chan *chan = nvkm_disp_chan(object);
struct nvkm_device *device = chan->disp->engine.subdev.device;
u64 size, base = chan->func->user(chan, &size);
*data = nvkm_rd32(device, base + addr);
return 0;
}
static int
nvkm_disp_chan_wr32(struct nvkm_object *object, u64 addr, u32 data)
{
struct nvkm_disp_chan *chan = nvkm_disp_chan(object);
struct nvkm_device *device = chan->disp->engine.subdev.device;
u64 size, base = chan->func->user(chan, &size);
nvkm_wr32(device, base + addr, data);
return 0;
}
static int
nvkm_disp_chan_ntfy(struct nvkm_object *object, u32 type, struct nvkm_event **pevent)
{
@ -188,8 +166,6 @@ nvkm_disp_chan = {
.dtor = nvkm_disp_chan_dtor,
.init = nvkm_disp_chan_init,
.fini = nvkm_disp_chan_fini,
.rd32 = nvkm_disp_chan_rd32,
.wr32 = nvkm_disp_chan_wr32,
.ntfy = nvkm_disp_chan_ntfy,
.map = nvkm_disp_chan_map,
.sclass = nvkm_disp_chan_child_get,