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[PATCH] swsusp: clean assembly parts
This patch fixes register saving so that each register is only saved once, and adds missing saving of %cr8 on x86-64. Some reordering so that save/restore is more logical/safer (segment registers should be restored after gdt). Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -44,7 +44,6 @@ void __save_processor_state(struct saved_context *ctxt)
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*/
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asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
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asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
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asm volatile ("sldt %0" : "=m" (ctxt->ldt));
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asm volatile ("str %0" : "=m" (ctxt->tr));
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/*
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@ -107,7 +106,6 @@ static void fix_processor_context(void)
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void __restore_processor_state(struct saved_context *ctxt)
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{
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/*
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* control registers
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*/
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@ -116,6 +114,13 @@ void __restore_processor_state(struct saved_context *ctxt)
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asm volatile ("movl %0, %%cr2" :: "r" (ctxt->cr2));
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asm volatile ("movl %0, %%cr0" :: "r" (ctxt->cr0));
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/*
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* now restore the descriptor tables to their proper values
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* ltr is done i fix_processor_context().
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*/
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asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
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asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
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/*
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* segment registers
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*/
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@ -124,14 +129,6 @@ void __restore_processor_state(struct saved_context *ctxt)
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asm volatile ("movw %0, %%gs" :: "r" (ctxt->gs));
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asm volatile ("movw %0, %%ss" :: "r" (ctxt->ss));
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/*
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* now restore the descriptor tables to their proper values
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* ltr is done i fix_processor_context().
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*/
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asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
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asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
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asm volatile ("lldt %0" :: "m" (ctxt->ldt));
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/*
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* sysenter MSRs
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*/
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@ -44,7 +44,6 @@ void __save_processor_state(struct saved_context *ctxt)
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*/
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asm volatile ("sgdt %0" : "=m" (ctxt->gdt_limit));
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asm volatile ("sidt %0" : "=m" (ctxt->idt_limit));
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asm volatile ("sldt %0" : "=m" (ctxt->ldt));
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asm volatile ("str %0" : "=m" (ctxt->tr));
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/* XMM0..XMM15 should be handled by kernel_fpu_begin(). */
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@ -69,6 +68,7 @@ void __save_processor_state(struct saved_context *ctxt)
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asm volatile ("movq %%cr2, %0" : "=r" (ctxt->cr2));
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asm volatile ("movq %%cr3, %0" : "=r" (ctxt->cr3));
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asm volatile ("movq %%cr4, %0" : "=r" (ctxt->cr4));
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asm volatile ("movq %%cr8, %0" : "=r" (ctxt->cr8));
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}
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void save_processor_state(void)
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@ -90,11 +90,19 @@ void __restore_processor_state(struct saved_context *ctxt)
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/*
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* control registers
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*/
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asm volatile ("movq %0, %%cr8" :: "r" (ctxt->cr8));
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asm volatile ("movq %0, %%cr4" :: "r" (ctxt->cr4));
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asm volatile ("movq %0, %%cr3" :: "r" (ctxt->cr3));
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asm volatile ("movq %0, %%cr2" :: "r" (ctxt->cr2));
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asm volatile ("movq %0, %%cr0" :: "r" (ctxt->cr0));
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/*
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* now restore the descriptor tables to their proper values
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* ltr is done i fix_processor_context().
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*/
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asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
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asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
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/*
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* segment registers
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*/
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@ -108,14 +116,6 @@ void __restore_processor_state(struct saved_context *ctxt)
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wrmsrl(MSR_GS_BASE, ctxt->gs_base);
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wrmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base);
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/*
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* now restore the descriptor tables to their proper values
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* ltr is done i fix_processor_context().
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*/
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asm volatile ("lgdt %0" :: "m" (ctxt->gdt_limit));
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asm volatile ("lidt %0" :: "m" (ctxt->idt_limit));
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asm volatile ("lldt %0" :: "m" (ctxt->ldt));
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fix_processor_context();
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do_fpu_end();
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@ -16,7 +16,7 @@ arch_prepare_suspend(void)
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struct saved_context {
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u16 ds, es, fs, gs, ss;
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unsigned long gs_base, gs_kernel_base, fs_base;
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unsigned long cr0, cr2, cr3, cr4;
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unsigned long cr0, cr2, cr3, cr4, cr8;
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u16 gdt_pad;
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u16 gdt_limit;
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unsigned long gdt_base;
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