mirror of
https://github.com/torvalds/linux.git
synced 2024-11-11 22:51:42 +00:00
Various arm64 fixes:
- ftrace branch generation fix - branch instruction encoding fix - include files, guards and unused prototypes clean-up - minor VDSO ABI fix (clock_getres) - PSCI functions moved to .S to avoid compilation error with gcc 5 - pte_modify fix to not ignore the mapping type - crypto: AES interleaved increased to 4x (for performance reasons) - text patching fix for modules - swiotlb increased back to 64MB - copy_siginfo_to_user32() fix for big endian -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJU8LqKAAoJEGvWsS0AyF7xE/IQALJa+y7Ow3vkXEaMmDwTWXDD o2G/8ecZXgKhLnO/1XokHOOpRvkmWRlo4gQSTRmhEtDl4+4x0KNNOJ2CnctTZpvc rIUS0PrjR3EWigU9WLdXCg4FtyO44w1hTBUimmPddzD1LcxsgMJd041HQcvsWhAL gHq0Y+asB3cAHSEdRuiBevDFJ0Y+O+JocR911hPbfgv5do/rzcCoHlvOmgOaFe1S voAq40XR0w2nRLxRj33EMYFngtkZgvzEEV2kCCSOn4yOhX91kX/Sg4gQL7AhcAJ/ Vla8Im7lmZiOSxFrqc536TQ5GG6x7dKaFh2OftC1vdMBtaS3oe104/2tF7IIpErP t6OTkbdAUMImf0m+XhNpP4pUQneQIfl58WxqBOPk+H/YBoGOXzOrbozfxTp13OPS LrOk5f8fdisgCYDvEODJZVtnRiqGNtkWZiNEmSFj+EpqBxJTlNTEsEAQe/ThuSY2 /Gha+Ar64zwKRY+KtqcuCAuNEvJpyg4z7PAGMMtznSXtBZ6Xn+H6ME8IB/B+y9j6 URqKlcMnPNiLJAE/ecEx7EoNsvg+DLO30fxs+LPhQ11zoEAWIQTMQiw0fTYdMgU5 KXXCelXTrIyX5uC/aJulDzknNWohXZQlMR/9hwKxRtNnGvMjQM19oRsgM3g3WVRT U1Xnv69tFHJG3kSh2bY5 =IGAn -----END PGP SIGNATURE----- Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Catalin Marinas: "Various arm64 fixes: - ftrace branch generation fix - branch instruction encoding fix - include files, guards and unused prototypes clean-up - minor VDSO ABI fix (clock_getres) - PSCI functions moved to .S to avoid compilation error with gcc 5 - pte_modify fix to not ignore the mapping type - crypto: AES interleaved increased to 4x (for performance reasons) - text patching fix for modules - swiotlb increased back to 64MB - copy_siginfo_to_user32() fix for big endian" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: cpuidle: add asm/proc-fns.h inclusion arm64: compat Fix siginfo_t -> compat_siginfo_t conversion on big endian arm64: Increase the swiotlb buffer size 64MB arm64: Fix text patching logic when using fixmap arm64: crypto: increase AES interleave to 4x arm64: enable PTE type bit in the mask for pte_modify arm64: mm: remove unused functions and variable protoypes arm64: psci: move psci firmware calls out of line arm64: vdso: minor ABI fix for clock_getres arm64: guard asm/assembler.h against multiple inclusions arm64: insn: fix compare-and-branch encodings arm64: ftrace: fix ftrace_modify_graph_caller for branch replace
This commit is contained in:
Linus Torvalds
commit
8d20a3dd4a
@ -29,7 +29,7 @@ aes-ce-blk-y := aes-glue-ce.o aes-ce.o
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obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o
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aes-neon-blk-y := aes-glue-neon.o aes-neon.o
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AFLAGS_aes-ce.o := -DINTERLEAVE=2 -DINTERLEAVE_INLINE
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AFLAGS_aes-ce.o := -DINTERLEAVE=4
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AFLAGS_aes-neon.o := -DINTERLEAVE=4
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CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS
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@ -20,6 +20,9 @@
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#error "Only include this from assembly code"
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#endif
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#ifndef __ASM_ASSEMBLER_H
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#define __ASM_ASSEMBLER_H
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#include <asm/ptrace.h>
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#include <asm/thread_info.h>
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@ -155,3 +158,5 @@ lr .req x30 // link register
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#endif
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orr \rd, \lbits, \hbits, lsl #32
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.endm
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#endif /* __ASM_ASSEMBLER_H */
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@ -1,6 +1,8 @@
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#ifndef __ASM_CPUIDLE_H
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#define __ASM_CPUIDLE_H
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#include <asm/proc-fns.h>
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#ifdef CONFIG_CPU_IDLE
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extern int cpu_init_idle(unsigned int cpu);
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extern int cpu_suspend(unsigned long arg);
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@ -264,8 +264,10 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
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__AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
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__AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
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__AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
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__AARCH64_INSN_FUNCS(cbz, 0xFE000000, 0x34000000)
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__AARCH64_INSN_FUNCS(cbnz, 0xFE000000, 0x35000000)
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__AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
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__AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
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__AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
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__AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
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__AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
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__AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
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__AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
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@ -460,7 +460,7 @@ static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
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PTE_PROT_NONE | PTE_VALID | PTE_WRITE;
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PTE_PROT_NONE | PTE_WRITE | PTE_TYPE_MASK;
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pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
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return pte;
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}
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@ -45,7 +45,8 @@
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#define STACK_TOP STACK_TOP_MAX
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#endif /* CONFIG_COMPAT */
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#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK
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extern phys_addr_t arm64_dma_phys_limit;
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#define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
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#endif /* __KERNEL__ */
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struct debug_info {
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@ -24,11 +24,6 @@
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#include <linux/sched.h>
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#include <asm/cputype.h>
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extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *);
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extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long);
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extern struct cpu_tlb_fns cpu_tlb;
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/*
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* TLB Management
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* ==============
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@ -15,8 +15,9 @@ CFLAGS_REMOVE_return_address.o = -pg
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arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \
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entry-fpsimd.o process.o ptrace.o setup.o signal.o \
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sys.o stacktrace.o time.o traps.o io.o vdso.o \
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hyp-stub.o psci.o cpu_ops.o insn.o return_address.o \
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cpuinfo.o cpu_errata.o alternative.o cacheinfo.o
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hyp-stub.o psci.o psci-call.o cpu_ops.o insn.o \
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return_address.o cpuinfo.o cpu_errata.o \
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alternative.o cacheinfo.o
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arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \
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sys_compat.o entry32.o \
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@ -156,7 +156,7 @@ static int ftrace_modify_graph_caller(bool enable)
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branch = aarch64_insn_gen_branch_imm(pc,
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(unsigned long)ftrace_graph_caller,
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AARCH64_INSN_BRANCH_LINK);
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AARCH64_INSN_BRANCH_NOLINK);
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nop = aarch64_insn_gen_nop();
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if (enable)
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@ -87,8 +87,10 @@ static void __kprobes *patch_map(void *addr, int fixmap)
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if (module && IS_ENABLED(CONFIG_DEBUG_SET_MODULE_RONX))
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page = vmalloc_to_page(addr);
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else
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else if (!module && IS_ENABLED(CONFIG_DEBUG_RODATA))
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page = virt_to_page(addr);
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else
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return addr;
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BUG_ON(!page);
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set_fixmap(fixmap, page_to_phys(page));
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28
arch/arm64/kernel/psci-call.S
Normal file
28
arch/arm64/kernel/psci-call.S
Normal file
@ -0,0 +1,28 @@
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/*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Copyright (C) 2015 ARM Limited
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*
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* Author: Will Deacon <will.deacon@arm.com>
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*/
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#include <linux/linkage.h>
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/* int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */
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ENTRY(__invoke_psci_fn_hvc)
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hvc #0
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ret
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ENDPROC(__invoke_psci_fn_hvc)
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/* int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */
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ENTRY(__invoke_psci_fn_smc)
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smc #0
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ret
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ENDPROC(__invoke_psci_fn_smc)
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@ -57,6 +57,9 @@ static struct psci_operations psci_ops;
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static int (*invoke_psci_fn)(u64, u64, u64, u64);
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typedef int (*psci_initcall_t)(const struct device_node *);
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asmlinkage int __invoke_psci_fn_hvc(u64, u64, u64, u64);
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asmlinkage int __invoke_psci_fn_smc(u64, u64, u64, u64);
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enum psci_function {
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PSCI_FN_CPU_SUSPEND,
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PSCI_FN_CPU_ON,
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@ -109,40 +112,6 @@ static void psci_power_state_unpack(u32 power_state,
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PSCI_0_2_POWER_STATE_AFFL_SHIFT;
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}
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/*
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* The following two functions are invoked via the invoke_psci_fn pointer
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* and will not be inlined, allowing us to piggyback on the AAPCS.
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*/
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static noinline int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1,
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u64 arg2)
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{
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asm volatile(
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__asmeq("%0", "x0")
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__asmeq("%1", "x1")
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__asmeq("%2", "x2")
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__asmeq("%3", "x3")
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"hvc #0\n"
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: "+r" (function_id)
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: "r" (arg0), "r" (arg1), "r" (arg2));
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return function_id;
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}
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static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1,
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u64 arg2)
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{
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asm volatile(
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__asmeq("%0", "x0")
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__asmeq("%1", "x1")
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__asmeq("%2", "x2")
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__asmeq("%3", "x3")
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"smc #0\n"
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: "+r" (function_id)
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: "r" (arg0), "r" (arg1), "r" (arg2));
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return function_id;
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}
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static int psci_get_version(void)
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{
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int err;
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@ -154,8 +154,7 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
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case __SI_TIMER:
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err |= __put_user(from->si_tid, &to->si_tid);
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err |= __put_user(from->si_overrun, &to->si_overrun);
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err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr,
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&to->si_ptr);
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err |= __put_user(from->si_int, &to->si_int);
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break;
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case __SI_POLL:
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err |= __put_user(from->si_band, &to->si_band);
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@ -184,7 +183,7 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
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case __SI_MESGQ: /* But this is */
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err |= __put_user(from->si_pid, &to->si_pid);
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err |= __put_user(from->si_uid, &to->si_uid);
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err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, &to->si_ptr);
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err |= __put_user(from->si_int, &to->si_int);
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break;
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case __SI_SYS:
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err |= __put_user((compat_uptr_t)(unsigned long)
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@ -174,8 +174,6 @@ ENDPROC(__kernel_clock_gettime)
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/* int __kernel_clock_getres(clockid_t clock_id, struct timespec *res); */
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ENTRY(__kernel_clock_getres)
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.cfi_startproc
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cbz w1, 3f
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cmp w0, #CLOCK_REALTIME
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ccmp w0, #CLOCK_MONOTONIC, #0x4, ne
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b.ne 1f
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@ -188,6 +186,7 @@ ENTRY(__kernel_clock_getres)
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b.ne 4f
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ldr x2, 6f
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2:
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cbz w1, 3f
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stp xzr, x2, [x1]
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3: /* res == NULL. */
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@ -348,8 +348,6 @@ static struct dma_map_ops swiotlb_dma_ops = {
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.mapping_error = swiotlb_dma_mapping_error,
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};
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extern int swiotlb_late_init_with_default_size(size_t default_size);
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static int __init atomic_pool_init(void)
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{
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pgprot_t prot = __pgprot(PROT_NORMAL_NC);
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@ -411,21 +409,13 @@ out:
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return -ENOMEM;
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}
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static int __init swiotlb_late_init(void)
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static int __init arm64_dma_init(void)
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{
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size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
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int ret;
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dma_ops = &swiotlb_dma_ops;
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return swiotlb_late_init_with_default_size(swiotlb_size);
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}
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static int __init arm64_dma_init(void)
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{
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int ret = 0;
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ret |= swiotlb_late_init();
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ret |= atomic_pool_init();
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ret = atomic_pool_init();
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return ret;
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}
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@ -33,6 +33,7 @@
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#include <linux/dma-mapping.h>
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#include <linux/dma-contiguous.h>
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#include <linux/efi.h>
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#include <linux/swiotlb.h>
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#include <asm/fixmap.h>
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#include <asm/memory.h>
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@ -45,6 +46,7 @@
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#include "mm.h"
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phys_addr_t memstart_addr __read_mostly = 0;
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phys_addr_t arm64_dma_phys_limit __read_mostly;
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#ifdef CONFIG_BLK_DEV_INITRD
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static int __init early_initrd(char *p)
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@ -85,7 +87,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
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/* 4GB maximum for 32-bit only capable devices */
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if (IS_ENABLED(CONFIG_ZONE_DMA)) {
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max_dma = PFN_DOWN(max_zone_dma_phys());
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max_dma = PFN_DOWN(arm64_dma_phys_limit);
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zone_size[ZONE_DMA] = max_dma - min;
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}
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zone_size[ZONE_NORMAL] = max - max_dma;
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@ -156,8 +158,6 @@ early_param("mem", early_mem);
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void __init arm64_memblock_init(void)
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{
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phys_addr_t dma_phys_limit = 0;
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memblock_enforce_memory_limit(memory_limit);
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/*
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@ -174,8 +174,10 @@ void __init arm64_memblock_init(void)
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/* 4GB maximum for 32-bit only capable devices */
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if (IS_ENABLED(CONFIG_ZONE_DMA))
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dma_phys_limit = max_zone_dma_phys();
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dma_contiguous_reserve(dma_phys_limit);
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arm64_dma_phys_limit = max_zone_dma_phys();
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else
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arm64_dma_phys_limit = PHYS_MASK + 1;
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dma_contiguous_reserve(arm64_dma_phys_limit);
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memblock_allow_resize();
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memblock_dump_all();
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@ -276,6 +278,8 @@ static void __init free_unused_memmap(void)
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*/
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void __init mem_init(void)
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{
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swiotlb_init(1);
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set_max_mapnr(pfn_to_page(max_pfn) - mem_map);
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#ifndef CONFIG_SPARSEMEM_VMEMMAP
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