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MIPS: Loongson64: Drop legacy IRQ code
We've made generic irqchip drivers for Loongson-3 platform, it's time to say goodbye to these legacy code. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This commit is contained in:
Jiaxun Yang
Thomas Bogendoerfer
parent
5ef7ce7e81
commit
8bec3875c5
@ -2,6 +2,8 @@
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#ifndef __ASM_MACH_LOONGSON64_BOOT_PARAM_H_
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#define __ASM_MACH_LOONGSON64_BOOT_PARAM_H_
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#include <linux/types.h>
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#define SYSTEM_RAM_LOW 1
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#define SYSTEM_RAM_HIGH 2
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#define SYSTEM_RAM_RESERVED 3
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@ -7,34 +7,6 @@
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/* cpu core interrupt numbers */
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#define MIPS_CPU_IRQ_BASE 56
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#define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 2) /* UART */
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#define LOONGSON_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 3) /* CASCADE */
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#define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* CPU Timer */
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#define LOONGSON_HT1_CFG_BASE loongson_sysconf.ht_control_base
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#define LOONGSON_HT1_INT_VECTOR_BASE (LOONGSON_HT1_CFG_BASE + 0x80)
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#define LOONGSON_HT1_INT_EN_BASE (LOONGSON_HT1_CFG_BASE + 0xa0)
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#define LOONGSON_HT1_INT_VECTOR(n) \
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LOONGSON3_REG32(LOONGSON_HT1_INT_VECTOR_BASE, 4 * (n))
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#define LOONGSON_HT1_INTN_EN(n) \
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LOONGSON3_REG32(LOONGSON_HT1_INT_EN_BASE, 4 * (n))
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#define LOONGSON_INT_ROUTER_OFFSET 0x1400
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#define LOONGSON_INT_ROUTER_INTEN \
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LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x24)
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#define LOONGSON_INT_ROUTER_INTENSET \
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LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x28)
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#define LOONGSON_INT_ROUTER_INTENCLR \
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LOONGSON3_REG32(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + 0x2c)
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#define LOONGSON_INT_ROUTER_ENTRY(n) \
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LOONGSON3_REG8(LOONGSON3_REG_BASE, LOONGSON_INT_ROUTER_OFFSET + n)
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#define LOONGSON_INT_ROUTER_LPC LOONGSON_INT_ROUTER_ENTRY(0x0a)
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#define LOONGSON_INT_ROUTER_HT1(n) LOONGSON_INT_ROUTER_ENTRY(n + 0x18)
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#define LOONGSON_INT_COREx_INTy(x, y) (1<<(x) | 1<<(y+4)) /* route to int y of core x */
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extern void fixup_irqs(void);
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extern void loongson3_ipi_interrupt(struct pt_regs *regs);
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#include <asm/mach-generic/irq.h>
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#endif /* __ASM_MACH_LOONGSON64_IRQ_H_ */
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@ -2,7 +2,7 @@
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#
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# Makefile for Loongson-3 family machines
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#
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obj-$(CONFIG_MACH_LOONGSON64) += irq.o cop2-ex.o platform.o acpi_init.o dma.o \
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obj-$(CONFIG_MACH_LOONGSON64) += cop2-ex.o platform.o acpi_init.o dma.o \
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setup.o init.o env.o time.o reset.o \
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obj-$(CONFIG_SMP) += smp.o
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@ -4,6 +4,7 @@
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* Author: Wu Zhangjin, wuzhangjin@gmail.com
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*/
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#include <linux/irqchip.h>
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#include <linux/memblock.h>
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#include <asm/bootinfo.h>
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#include <asm/traps.h>
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@ -44,3 +45,8 @@ void __init prom_init(void)
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void __init prom_free_prom_memory(void)
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{
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}
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void __init arch_init_irq(void)
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{
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irqchip_init();
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}
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@ -1,162 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <loongson.h>
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#include <irq.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <asm/irq_cpu.h>
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#include <asm/i8259.h>
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#include <asm/mipsregs.h>
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#include "smp.h"
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extern void loongson3_send_irq_by_ipi(int cpu, int irqs);
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unsigned int irq_cpu[16] = {[0 ... 15] = -1};
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unsigned int ht_irq[] = {0, 1, 3, 4, 5, 6, 7, 8, 12, 14, 15};
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unsigned int local_irq = 1<<0 | 1<<1 | 1<<2 | 1<<7 | 1<<8 | 1<<12;
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int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
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bool force)
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{
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unsigned int cpu;
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struct cpumask new_affinity;
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/* I/O devices are connected on package-0 */
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cpumask_copy(&new_affinity, affinity);
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for_each_cpu(cpu, affinity)
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if (cpu_data[cpu].package > 0)
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cpumask_clear_cpu(cpu, &new_affinity);
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if (cpumask_empty(&new_affinity))
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return -EINVAL;
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cpumask_copy(d->common->affinity, &new_affinity);
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return IRQ_SET_MASK_OK_NOCOPY;
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}
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static void ht_irqdispatch(void)
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{
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unsigned int i, irq;
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struct irq_data *irqd;
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struct cpumask affinity;
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irq = LOONGSON_HT1_INT_VECTOR(0);
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LOONGSON_HT1_INT_VECTOR(0) = irq; /* Acknowledge the IRQs */
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for (i = 0; i < ARRAY_SIZE(ht_irq); i++) {
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if (!(irq & (0x1 << ht_irq[i])))
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continue;
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/* handled by local core */
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if (local_irq & (0x1 << ht_irq[i])) {
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do_IRQ(ht_irq[i]);
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continue;
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}
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irqd = irq_get_irq_data(ht_irq[i]);
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cpumask_and(&affinity, irqd->common->affinity, cpu_active_mask);
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if (cpumask_empty(&affinity)) {
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do_IRQ(ht_irq[i]);
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continue;
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}
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irq_cpu[ht_irq[i]] = cpumask_next(irq_cpu[ht_irq[i]], &affinity);
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if (irq_cpu[ht_irq[i]] >= nr_cpu_ids)
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irq_cpu[ht_irq[i]] = cpumask_first(&affinity);
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if (irq_cpu[ht_irq[i]] == 0) {
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do_IRQ(ht_irq[i]);
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continue;
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}
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/* balanced by other cores */
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loongson3_send_irq_by_ipi(irq_cpu[ht_irq[i]], (0x1 << ht_irq[i]));
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}
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}
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#define UNUSED_IPS (CAUSEF_IP5 | CAUSEF_IP4 | CAUSEF_IP1 | CAUSEF_IP0)
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending;
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pending = read_c0_cause() & read_c0_status() & ST0_IM;
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if (pending & CAUSEF_IP7)
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do_IRQ(LOONGSON_TIMER_IRQ);
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#if defined(CONFIG_SMP)
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if (pending & CAUSEF_IP6)
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loongson3_ipi_interrupt(NULL);
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#endif
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if (pending & CAUSEF_IP3)
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ht_irqdispatch();
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if (pending & CAUSEF_IP2)
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do_IRQ(LOONGSON_UART_IRQ);
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if (pending & UNUSED_IPS) {
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pr_err("%s : spurious interrupt\n", __func__);
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spurious_interrupt();
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}
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}
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static inline void mask_loongson_irq(struct irq_data *d) { }
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static inline void unmask_loongson_irq(struct irq_data *d) { }
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/* For MIPS IRQs which shared by all cores */
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static struct irq_chip loongson_irq_chip = {
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.name = "Loongson",
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.irq_ack = mask_loongson_irq,
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.irq_mask = mask_loongson_irq,
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.irq_mask_ack = mask_loongson_irq,
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.irq_unmask = unmask_loongson_irq,
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.irq_eoi = unmask_loongson_irq,
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};
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void irq_router_init(void)
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{
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int i;
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/* route LPC int to cpu core0 int 0 */
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LOONGSON_INT_ROUTER_LPC =
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LOONGSON_INT_COREx_INTy(loongson_sysconf.boot_cpu_id, 0);
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/* route HT1 int0 ~ int7 to cpu core0 INT1*/
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for (i = 0; i < 8; i++)
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LOONGSON_INT_ROUTER_HT1(i) =
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LOONGSON_INT_COREx_INTy(loongson_sysconf.boot_cpu_id, 1);
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/* enable HT1 interrupt */
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LOONGSON_HT1_INTN_EN(0) = 0xffffffff;
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/* enable router interrupt intenset */
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LOONGSON_INT_ROUTER_INTENSET =
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LOONGSON_INT_ROUTER_INTEN | (0xffff << 16) | 0x1 << 10;
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}
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void __init arch_init_irq(void)
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{
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struct irq_chip *chip;
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clear_c0_status(ST0_IM | ST0_BEV);
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irq_router_init();
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mips_cpu_irq_init();
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init_i8259_irqs();
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chip = irq_get_chip(I8259A_IRQ_BASE);
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chip->irq_set_affinity = plat_set_irq_affinity;
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irq_set_chip_and_handler(LOONGSON_UART_IRQ,
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&loongson_irq_chip, handle_percpu_irq);
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irq_set_chip_and_handler(LOONGSON_BRIDGE_IRQ,
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&loongson_irq_chip, handle_percpu_irq);
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set_c0_status(STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP6);
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}
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#ifdef CONFIG_HOTPLUG_CPU
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void fixup_irqs(void)
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{
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irq_cpu_offline();
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clear_c0_status(ST0_IM);
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}
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#endif
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@ -4,6 +4,7 @@
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* Author: Chen Huacai, chenhc@lemote.com
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*/
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#include <irq.h>
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#include <linux/init.h>
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#include <linux/cpu.h>
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#include <linux/sched.h>
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@ -25,6 +26,8 @@
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DEFINE_PER_CPU(int, cpu_state);
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#define LS_IPI_IRQ (MIPS_CPU_IRQ_BASE + 6)
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static void *ipi_set0_regs[16];
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static void *ipi_clear0_regs[16];
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static void *ipi_status0_regs[16];
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@ -302,20 +305,13 @@ loongson3_send_ipi_mask(const struct cpumask *mask, unsigned int action)
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ipi_write_action(cpu_logical_map(i), (u32)action);
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}
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#define IPI_IRQ_OFFSET 6
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void loongson3_send_irq_by_ipi(int cpu, int irqs)
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{
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ipi_write_action(cpu_logical_map(cpu), irqs << IPI_IRQ_OFFSET);
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}
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void loongson3_ipi_interrupt(struct pt_regs *regs)
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static irqreturn_t loongson3_ipi_interrupt(int irq, void *dev_id)
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{
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int i, cpu = smp_processor_id();
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unsigned int action, c0count, irqs;
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unsigned int action, c0count;
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action = ipi_read_clear(cpu);
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irqs = action >> IPI_IRQ_OFFSET;
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if (action & SMP_RESCHEDULE_YOURSELF)
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scheduler_ipi();
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@ -335,13 +331,7 @@ void loongson3_ipi_interrupt(struct pt_regs *regs)
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__wbflush(); /* Let others see the result ASAP */
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}
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if (irqs) {
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int irq;
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while ((irq = ffs(irqs))) {
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do_IRQ(irq-1);
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irqs &= ~(1<<(irq-1));
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}
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}
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return IRQ_HANDLED;
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}
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#define MAX_LOOPS 800
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@ -438,6 +428,9 @@ static void __init loongson3_smp_setup(void)
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static void __init loongson3_prepare_cpus(unsigned int max_cpus)
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{
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if (request_irq(LS_IPI_IRQ, loongson3_ipi_interrupt,
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IRQF_PERCPU | IRQF_NO_SUSPEND, "SMP_IPI", NULL))
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pr_err("Failed to request IPI IRQ\n");
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init_cpu_present(cpu_possible_mask);
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per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
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}
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@ -484,7 +477,8 @@ static int loongson3_cpu_disable(void)
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set_cpu_online(cpu, false);
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calculate_cpu_foreign_map();
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local_irq_save(flags);
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fixup_irqs();
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irq_cpu_offline();
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clear_c0_status(ST0_IM);
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local_irq_restore(flags);
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local_flush_tlb_all();
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