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EDAC/{skx_common,skx,i10nm}: Move the common debug code to skx_common
Commit
afdb82fd763c ("EDAC, i10nm: make skx_common.o a separate module")
made skx_common.o a separate module. With skx_common.o now a separate
module, move the common debug code setup_{skx,i10nm}_debug() and
teardown_{skx,i10nm}_debug() in {skx,i10nm}_base.c to skx_common.c to
reduce code duplication. Additionally, prefix these function names with
'skx' to maintain consistency with other names in the file.
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/all/20240829055101.56245-1-qiuxu.zhuo@intel.com
This commit is contained in:
Qiuxu Zhuo
Tony Luck
parent
0ad875f442
commit
8b93582353
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@ -1013,54 +1013,6 @@ static struct notifier_block i10nm_mce_dec = {
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.priority = MCE_PRIO_EDAC,
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};
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#ifdef CONFIG_EDAC_DEBUG
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/*
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* Debug feature.
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* Exercise the address decode logic by writing an address to
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* /sys/kernel/debug/edac/i10nm_test/addr.
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*/
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static struct dentry *i10nm_test;
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static int debugfs_u64_set(void *data, u64 val)
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{
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struct mce m;
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pr_warn_once("Fake error to 0x%llx injected via debugfs\n", val);
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memset(&m, 0, sizeof(m));
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/* ADDRV + MemRd + Unknown channel */
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m.status = MCI_STATUS_ADDRV + 0x90;
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/* One corrected error */
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m.status |= BIT_ULL(MCI_STATUS_CEC_SHIFT);
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m.addr = val;
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skx_mce_check_error(NULL, 0, &m);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_u64_wo, NULL, debugfs_u64_set, "%llu\n");
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static void setup_i10nm_debug(void)
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{
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i10nm_test = edac_debugfs_create_dir("i10nm_test");
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if (!i10nm_test)
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return;
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if (!edac_debugfs_create_file("addr", 0200, i10nm_test,
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NULL, &fops_u64_wo)) {
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debugfs_remove(i10nm_test);
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i10nm_test = NULL;
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}
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}
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static void teardown_i10nm_debug(void)
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{
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debugfs_remove_recursive(i10nm_test);
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}
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#else
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static inline void setup_i10nm_debug(void) {}
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static inline void teardown_i10nm_debug(void) {}
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#endif /*CONFIG_EDAC_DEBUG*/
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static int __init i10nm_init(void)
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{
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u8 mc = 0, src_id = 0, node_id = 0;
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@ -1159,7 +1111,7 @@ static int __init i10nm_init(void)
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opstate_init();
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mce_register_decode_chain(&i10nm_mce_dec);
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setup_i10nm_debug();
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skx_setup_debug("i10nm_test");
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if (retry_rd_err_log && res_cfg->offsets_scrub && res_cfg->offsets_demand) {
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skx_set_decode(i10nm_mc_decode, show_retry_rd_err_log);
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@ -1187,7 +1139,7 @@ static void __exit i10nm_exit(void)
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enable_retry_rd_err_log(false);
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}
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teardown_i10nm_debug();
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skx_teardown_debug();
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mce_unregister_decode_chain(&i10nm_mce_dec);
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skx_adxl_put();
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skx_remove();
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@ -587,54 +587,6 @@ static struct notifier_block skx_mce_dec = {
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.priority = MCE_PRIO_EDAC,
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};
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#ifdef CONFIG_EDAC_DEBUG
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/*
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* Debug feature.
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* Exercise the address decode logic by writing an address to
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* /sys/kernel/debug/edac/skx_test/addr.
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*/
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static struct dentry *skx_test;
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static int debugfs_u64_set(void *data, u64 val)
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{
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struct mce m;
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pr_warn_once("Fake error to 0x%llx injected via debugfs\n", val);
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memset(&m, 0, sizeof(m));
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/* ADDRV + MemRd + Unknown channel */
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m.status = MCI_STATUS_ADDRV + 0x90;
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/* One corrected error */
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m.status |= BIT_ULL(MCI_STATUS_CEC_SHIFT);
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m.addr = val;
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skx_mce_check_error(NULL, 0, &m);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_u64_wo, NULL, debugfs_u64_set, "%llu\n");
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static void setup_skx_debug(void)
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{
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skx_test = edac_debugfs_create_dir("skx_test");
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if (!skx_test)
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return;
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if (!edac_debugfs_create_file("addr", 0200, skx_test,
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NULL, &fops_u64_wo)) {
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debugfs_remove(skx_test);
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skx_test = NULL;
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}
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}
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static void teardown_skx_debug(void)
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{
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debugfs_remove_recursive(skx_test);
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}
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#else
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static inline void setup_skx_debug(void) {}
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static inline void teardown_skx_debug(void) {}
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#endif /*CONFIG_EDAC_DEBUG*/
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/*
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* skx_init:
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* make sure we are running on the correct cpu model
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@ -728,7 +680,7 @@ static int __init skx_init(void)
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/* Ensure that the OPSTATE is set correctly for POLL or NMI */
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opstate_init();
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setup_skx_debug();
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skx_setup_debug("skx_test");
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mce_register_decode_chain(&skx_mce_dec);
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@ -742,7 +694,7 @@ static void __exit skx_exit(void)
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{
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edac_dbg(2, "\n");
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mce_unregister_decode_chain(&skx_mce_dec);
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teardown_skx_debug();
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skx_teardown_debug();
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if (nvdimm_count)
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skx_adxl_put();
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skx_remove();
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@ -739,6 +739,53 @@ void skx_remove(void)
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}
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EXPORT_SYMBOL_GPL(skx_remove);
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#ifdef CONFIG_EDAC_DEBUG
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/*
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* Debug feature.
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* Exercise the address decode logic by writing an address to
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* /sys/kernel/debug/edac/{skx,i10nm}_test/addr.
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*/
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static struct dentry *skx_test;
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static int debugfs_u64_set(void *data, u64 val)
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{
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struct mce m;
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pr_warn_once("Fake error to 0x%llx injected via debugfs\n", val);
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memset(&m, 0, sizeof(m));
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/* ADDRV + MemRd + Unknown channel */
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m.status = MCI_STATUS_ADDRV + 0x90;
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/* One corrected error */
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m.status |= BIT_ULL(MCI_STATUS_CEC_SHIFT);
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m.addr = val;
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skx_mce_check_error(NULL, 0, &m);
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return 0;
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}
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DEFINE_SIMPLE_ATTRIBUTE(fops_u64_wo, NULL, debugfs_u64_set, "%llu\n");
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void skx_setup_debug(const char *name)
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{
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skx_test = edac_debugfs_create_dir(name);
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if (!skx_test)
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return;
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if (!edac_debugfs_create_file("addr", 0200, skx_test,
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NULL, &fops_u64_wo)) {
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debugfs_remove(skx_test);
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skx_test = NULL;
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}
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}
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EXPORT_SYMBOL_GPL(skx_setup_debug);
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void skx_teardown_debug(void)
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{
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debugfs_remove_recursive(skx_test);
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}
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EXPORT_SYMBOL_GPL(skx_teardown_debug);
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#endif /*CONFIG_EDAC_DEBUG*/
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Tony Luck");
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MODULE_DESCRIPTION("MC Driver for Intel server processors");
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@ -260,4 +260,12 @@ int skx_mce_check_error(struct notifier_block *nb, unsigned long val,
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void skx_remove(void);
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#ifdef CONFIG_EDAC_DEBUG
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void skx_setup_debug(const char *name);
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void skx_teardown_debug(void);
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#else
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static inline void skx_setup_debug(const char *name) {}
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static inline void skx_teardown_debug(void) {}
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#endif
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#endif /* _SKX_COMM_EDAC_H */
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