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cdx: add cdx controller
CDX controller uses MCDI interface as a protocol to communicate with the RPU firmware and registers the detected CDX devices on the CDX bus. It also uses RPMsg as the communication channel with the Firmware. Signed-off-by: Nipun Gupta <nipun.gupta@amd.com> Signed-off-by: Puneet Gupta <puneet.gupta@amd.com> Signed-off-by: Abhijit Gangurde <abhijit.gangurde@amd.com> Signed-off-by: Nikhil Agarwal <nikhil.agarwal@amd.com> Reviewed-by: Pieter Jansen van Vuuren <pieter.jansen-van-vuuren@amd.com> Tested-by: Nikhil Agarwal <nikhil.agarwal@amd.com> Link: https://lore.kernel.org/r/20230313132636.31850-6-nipun.gupta@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Nipun Gupta
Greg Kroah-Hartman
parent
eb96b74019
commit
8a7923df35
@ -7,6 +7,15 @@
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if CDX_BUS
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config CDX_CONTROLLER
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tristate "CDX bus controller"
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help
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CDX controller drives the CDX bus. It interacts with
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firmware to get the hardware devices and registers with
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the CDX bus. Say Y to enable the CDX hardware driver.
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If unsure, say N.
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config MCDI_LOGGING
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bool "MCDI Logging for the CDX controller"
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depends on CDX_CONTROLLER
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@ -6,4 +6,4 @@
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#
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obj-$(CONFIG_CDX_CONTROLLER) += cdx-controller.o
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cdx-controller-objs := mcdi.o
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cdx-controller-objs := cdx_controller.o mcdi.o mcdi_functions.o
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188
drivers/cdx/controller/cdx_controller.c
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188
drivers/cdx/controller/cdx_controller.c
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@ -0,0 +1,188 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* CDX host controller driver for AMD versal-net platform.
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*
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* Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
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*/
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#include <linux/of_platform.h>
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#include <linux/slab.h>
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#include <linux/cdx/cdx_bus.h>
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#include "../cdx.h"
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#include "mcdi_functions.h"
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#include "mcdi.h"
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static unsigned int cdx_mcdi_rpc_timeout(struct cdx_mcdi *cdx, unsigned int cmd)
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{
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return MCDI_RPC_TIMEOUT;
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}
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static void cdx_mcdi_request(struct cdx_mcdi *cdx,
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const struct cdx_dword *hdr, size_t hdr_len,
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const struct cdx_dword *sdu, size_t sdu_len)
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{
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/*
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* This will get updated by rpmsg APIs, with RPMSG introduction
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* in CDX controller as a transport layer.
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*/
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}
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static const struct cdx_mcdi_ops mcdi_ops = {
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.mcdi_rpc_timeout = cdx_mcdi_rpc_timeout,
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.mcdi_request = cdx_mcdi_request,
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};
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static int cdx_scan_devices(struct cdx_controller *cdx)
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{
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struct cdx_mcdi *cdx_mcdi = cdx->priv;
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u8 bus_num, dev_num, num_cdx_bus;
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int ret;
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/* MCDI FW Read: Fetch the number of CDX buses on this controller */
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ret = cdx_mcdi_get_num_buses(cdx_mcdi);
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if (ret < 0) {
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dev_err(cdx->dev,
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"Get number of CDX buses failed: %d\n", ret);
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return ret;
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}
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num_cdx_bus = (u8)ret;
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for (bus_num = 0; bus_num < num_cdx_bus; bus_num++) {
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u8 num_cdx_dev;
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/* MCDI FW Read: Fetch the number of devices present */
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ret = cdx_mcdi_get_num_devs(cdx_mcdi, bus_num);
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if (ret < 0) {
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dev_err(cdx->dev,
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"Get devices on CDX bus %d failed: %d\n", bus_num, ret);
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continue;
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}
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num_cdx_dev = (u8)ret;
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for (dev_num = 0; dev_num < num_cdx_dev; dev_num++) {
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struct cdx_dev_params dev_params;
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/* MCDI FW: Get the device config */
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ret = cdx_mcdi_get_dev_config(cdx_mcdi, bus_num,
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dev_num, &dev_params);
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if (ret) {
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dev_err(cdx->dev,
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"CDX device config get failed for %d(bus):%d(dev), %d\n",
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bus_num, dev_num, ret);
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continue;
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}
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dev_params.cdx = cdx;
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/* Add the device to the cdx bus */
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ret = cdx_device_add(&dev_params);
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if (ret) {
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dev_err(cdx->dev, "registering cdx dev: %d failed: %d\n",
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dev_num, ret);
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continue;
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}
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dev_dbg(cdx->dev, "CDX dev: %d on cdx bus: %d created\n",
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dev_num, bus_num);
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}
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}
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return 0;
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}
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static struct cdx_ops cdx_ops = {
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.scan = cdx_scan_devices,
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};
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static int xlnx_cdx_probe(struct platform_device *pdev)
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{
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struct cdx_controller *cdx;
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struct cdx_mcdi *cdx_mcdi;
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int ret;
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cdx_mcdi = kzalloc(sizeof(*cdx_mcdi), GFP_KERNEL);
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if (!cdx_mcdi)
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return -ENOMEM;
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/* Store the MCDI ops */
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cdx_mcdi->mcdi_ops = &mcdi_ops;
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/* MCDI FW: Initialize the FW path */
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ret = cdx_mcdi_init(cdx_mcdi);
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if (ret) {
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dev_err_probe(&pdev->dev, ret, "MCDI Initialization failed\n");
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goto mcdi_init_fail;
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}
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cdx = kzalloc(sizeof(*cdx), GFP_KERNEL);
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if (!cdx) {
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ret = -ENOMEM;
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goto cdx_alloc_fail;
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}
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platform_set_drvdata(pdev, cdx);
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cdx->dev = &pdev->dev;
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cdx->priv = cdx_mcdi;
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cdx->ops = &cdx_ops;
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return 0;
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cdx_alloc_fail:
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cdx_mcdi_finish(cdx_mcdi);
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mcdi_init_fail:
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kfree(cdx_mcdi);
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return ret;
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}
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static int xlnx_cdx_remove(struct platform_device *pdev)
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{
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struct cdx_controller *cdx = platform_get_drvdata(pdev);
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struct cdx_mcdi *cdx_mcdi = cdx->priv;
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kfree(cdx);
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cdx_mcdi_finish(cdx_mcdi);
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kfree(cdx_mcdi);
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return 0;
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}
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static const struct of_device_id cdx_match_table[] = {
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{.compatible = "xlnx,versal-net-cdx",},
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{ },
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};
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MODULE_DEVICE_TABLE(of, cdx_match_table);
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static struct platform_driver cdx_pdriver = {
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.driver = {
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.name = "cdx-controller",
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.pm = NULL,
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.of_match_table = cdx_match_table,
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},
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.probe = xlnx_cdx_probe,
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.remove = xlnx_cdx_remove,
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};
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static int __init cdx_controller_init(void)
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{
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int ret;
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ret = platform_driver_register(&cdx_pdriver);
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if (ret)
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pr_err("platform_driver_register() failed: %d\n", ret);
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return ret;
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}
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static void __exit cdx_controller_exit(void)
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{
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platform_driver_unregister(&cdx_pdriver);
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}
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module_init(cdx_controller_init);
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module_exit(cdx_controller_exit);
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MODULE_AUTHOR("AMD Inc.");
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MODULE_DESCRIPTION("CDX controller for AMD devices");
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MODULE_LICENSE("GPL");
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125
drivers/cdx/controller/mcdi_functions.c
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125
drivers/cdx/controller/mcdi_functions.c
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@ -0,0 +1,125 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
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*/
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#include <linux/module.h>
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#include "mcdi.h"
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#include "mcdi_functions.h"
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int cdx_mcdi_get_num_buses(struct cdx_mcdi *cdx)
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{
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MCDI_DECLARE_BUF(outbuf, MC_CMD_CDX_BUS_ENUM_BUSES_OUT_LEN);
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size_t outlen;
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int ret;
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ret = cdx_mcdi_rpc(cdx, MC_CMD_CDX_BUS_ENUM_BUSES, NULL, 0,
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outbuf, sizeof(outbuf), &outlen);
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if (ret)
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return ret;
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if (outlen != MC_CMD_CDX_BUS_ENUM_BUSES_OUT_LEN)
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return -EIO;
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return MCDI_DWORD(outbuf, CDX_BUS_ENUM_BUSES_OUT_BUS_COUNT);
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}
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int cdx_mcdi_get_num_devs(struct cdx_mcdi *cdx, int bus_num)
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{
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MCDI_DECLARE_BUF(outbuf, MC_CMD_CDX_BUS_ENUM_DEVICES_OUT_LEN);
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MCDI_DECLARE_BUF(inbuf, MC_CMD_CDX_BUS_ENUM_DEVICES_IN_LEN);
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size_t outlen;
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int ret;
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MCDI_SET_DWORD(inbuf, CDX_BUS_ENUM_DEVICES_IN_BUS, bus_num);
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ret = cdx_mcdi_rpc(cdx, MC_CMD_CDX_BUS_ENUM_DEVICES, inbuf, sizeof(inbuf),
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outbuf, sizeof(outbuf), &outlen);
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if (ret)
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return ret;
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if (outlen != MC_CMD_CDX_BUS_ENUM_DEVICES_OUT_LEN)
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return -EIO;
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return MCDI_DWORD(outbuf, CDX_BUS_ENUM_DEVICES_OUT_DEVICE_COUNT);
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}
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int cdx_mcdi_get_dev_config(struct cdx_mcdi *cdx,
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u8 bus_num, u8 dev_num,
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struct cdx_dev_params *dev_params)
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{
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MCDI_DECLARE_BUF(outbuf, MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_LEN);
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MCDI_DECLARE_BUF(inbuf, MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_IN_LEN);
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struct resource *res = &dev_params->res[0];
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size_t outlen;
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u32 req_id;
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int ret;
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MCDI_SET_DWORD(inbuf, CDX_BUS_GET_DEVICE_CONFIG_IN_BUS, bus_num);
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MCDI_SET_DWORD(inbuf, CDX_BUS_GET_DEVICE_CONFIG_IN_DEVICE, dev_num);
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ret = cdx_mcdi_rpc(cdx, MC_CMD_CDX_BUS_GET_DEVICE_CONFIG, inbuf, sizeof(inbuf),
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outbuf, sizeof(outbuf), &outlen);
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if (ret)
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return ret;
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if (outlen != MC_CMD_CDX_BUS_GET_DEVICE_CONFIG_OUT_LEN)
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return -EIO;
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dev_params->bus_num = bus_num;
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dev_params->dev_num = dev_num;
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req_id = MCDI_DWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_REQUESTER_ID);
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dev_params->req_id = req_id;
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dev_params->res_count = 0;
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if (MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION0_SIZE) != 0) {
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res[dev_params->res_count].start =
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MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION0_BASE);
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res[dev_params->res_count].end =
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MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION0_BASE) +
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MCDI_QWORD(outbuf,
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CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION0_SIZE) - 1;
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res[dev_params->res_count].flags = IORESOURCE_MEM;
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dev_params->res_count++;
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}
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if (MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION1_SIZE) != 0) {
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res[dev_params->res_count].start =
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MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION1_BASE);
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res[dev_params->res_count].end =
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MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION1_BASE) +
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MCDI_QWORD(outbuf,
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CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION1_SIZE) - 1;
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res[dev_params->res_count].flags = IORESOURCE_MEM;
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dev_params->res_count++;
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}
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if (MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION2_SIZE) != 0) {
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res[dev_params->res_count].start =
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MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION2_BASE);
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res[dev_params->res_count].end =
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MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION2_BASE) +
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MCDI_QWORD(outbuf,
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CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION2_SIZE) - 1;
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res[dev_params->res_count].flags = IORESOURCE_MEM;
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dev_params->res_count++;
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}
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if (MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION3_SIZE) != 0) {
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res[dev_params->res_count].start =
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MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION3_BASE);
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res[dev_params->res_count].end =
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MCDI_QWORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION3_BASE) +
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MCDI_QWORD(outbuf,
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CDX_BUS_GET_DEVICE_CONFIG_OUT_MMIO_REGION3_SIZE) - 1;
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res[dev_params->res_count].flags = IORESOURCE_MEM;
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dev_params->res_count++;
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}
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dev_params->vendor = MCDI_WORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_VENDOR_ID);
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dev_params->device = MCDI_WORD(outbuf, CDX_BUS_GET_DEVICE_CONFIG_OUT_DEVICE_ID);
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return 0;
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}
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50
drivers/cdx/controller/mcdi_functions.h
Normal file
50
drivers/cdx/controller/mcdi_functions.h
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/* SPDX-License-Identifier: GPL-2.0
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*
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* Header file for MCDI FW interaction for CDX bus.
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*
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* Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
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*/
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#ifndef CDX_MCDI_FUNCTIONS_H
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#define CDX_MCDI_FUNCTIONS_H
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#include "mcdi.h"
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#include "../cdx.h"
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/**
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* cdx_mcdi_get_num_buses - Get the total number of buses on
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* the controller.
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* @cdx: pointer to MCDI interface.
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*
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* Return: total number of buses available on the controller,
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* <0 on failure
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*/
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int cdx_mcdi_get_num_buses(struct cdx_mcdi *cdx);
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/**
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* cdx_mcdi_get_num_devs - Get the total number of devices on
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* a particular bus of the controller.
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* @cdx: pointer to MCDI interface.
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* @bus_num: Bus number.
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*
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* Return: total number of devices available on the bus, <0 on failure
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*/
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int cdx_mcdi_get_num_devs(struct cdx_mcdi *cdx, int bus_num);
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/**
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* cdx_mcdi_get_dev_config - Get configuration for a particular
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* bus_num:dev_num
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* @cdx: pointer to MCDI interface.
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* @bus_num: Bus number.
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* @dev_num: Device number.
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* @dev_params: Pointer to cdx_dev_params, this is populated by this
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* device with the configuration corresponding to the provided
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* bus_num:dev_num.
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*
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* Return: 0 total number of devices available on the bus, <0 on failure
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*/
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int cdx_mcdi_get_dev_config(struct cdx_mcdi *cdx,
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u8 bus_num, u8 dev_num,
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struct cdx_dev_params *dev_params);
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#endif /* CDX_MCDI_FUNCTIONS_H */
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