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https://github.com/torvalds/linux.git
synced 2024-11-10 22:21:40 +00:00
Merge back cpufreq updates for v5.12.
This commit is contained in:
commit
8a3f1f181d
@ -289,11 +289,6 @@ config ARM_STI_CPUFREQ
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this config option if you wish to add CPUFreq support for STi based
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SoCs.
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config ARM_TANGO_CPUFREQ
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bool
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depends on CPUFREQ_DT && ARCH_TANGO
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default y
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config ARM_TEGRA20_CPUFREQ
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tristate "Tegra20/30 CPUFreq support"
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depends on ARCH_TEGRA && CPUFREQ_DT
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@ -79,7 +79,6 @@ obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o
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obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o
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obj-$(CONFIG_ARM_STI_CPUFREQ) += sti-cpufreq.o
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obj-$(CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM) += sun50i-cpufreq-nvmem.o
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obj-$(CONFIG_ARM_TANGO_CPUFREQ) += tango-cpufreq.o
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obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o
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obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o
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obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += tegra186-cpufreq.o
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@ -597,6 +597,16 @@ unmap_base:
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return ret;
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}
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static void brcm_avs_prepare_uninit(struct platform_device *pdev)
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{
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struct private_data *priv;
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priv = platform_get_drvdata(pdev);
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iounmap(priv->avs_intr_base);
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iounmap(priv->base);
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}
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static int brcm_avs_cpufreq_init(struct cpufreq_policy *policy)
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{
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struct cpufreq_frequency_table *freq_table;
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@ -732,21 +742,21 @@ static int brcm_avs_cpufreq_probe(struct platform_device *pdev)
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brcm_avs_driver.driver_data = pdev;
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return cpufreq_register_driver(&brcm_avs_driver);
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ret = cpufreq_register_driver(&brcm_avs_driver);
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if (ret)
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brcm_avs_prepare_uninit(pdev);
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return ret;
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}
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static int brcm_avs_cpufreq_remove(struct platform_device *pdev)
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{
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struct private_data *priv;
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int ret;
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ret = cpufreq_unregister_driver(&brcm_avs_driver);
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if (ret)
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return ret;
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WARN_ON(ret);
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priv = platform_get_drvdata(pdev);
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iounmap(priv->base);
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iounmap(priv->avs_intr_base);
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brcm_avs_prepare_uninit(pdev);
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return 0;
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}
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@ -141,8 +141,6 @@ static const struct of_device_id blacklist[] __initconst = {
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{ .compatible = "st,stih410", },
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{ .compatible = "st,stih418", },
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{ .compatible = "sigma,tango4", },
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{ .compatible = "ti,am33xx", },
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{ .compatible = "ti,am43", },
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{ .compatible = "ti,dra7", },
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@ -175,7 +175,7 @@ static int cpufreq_exit(struct cpufreq_policy *policy)
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}
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static struct cpufreq_driver dt_cpufreq_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
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CPUFREQ_IS_COOLING_DEV,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = set_target,
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@ -2810,8 +2810,7 @@ int cpufreq_register_driver(struct cpufreq_driver *driver_data)
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if (ret)
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goto err_boost_unreg;
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if (!(cpufreq_driver->flags & CPUFREQ_STICKY) &&
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list_empty(&cpufreq_policy_list)) {
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if (unlikely(list_empty(&cpufreq_policy_list))) {
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/* if all ->init() calls failed, unregister */
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ret = -ENODEV;
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pr_debug("%s: No CPU initialized for driver %s\n", __func__,
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@ -95,7 +95,7 @@ static int davinci_cpu_init(struct cpufreq_policy *policy)
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}
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static struct cpufreq_driver davinci_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = davinci_target,
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.get = cpufreq_generic_get,
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@ -819,13 +819,13 @@ static struct freq_attr *hwp_cpufreq_attrs[] = {
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NULL,
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};
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static void intel_pstate_get_hwp_max(unsigned int cpu, int *phy_max,
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static void intel_pstate_get_hwp_max(struct cpudata *cpu, int *phy_max,
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int *current_max)
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{
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u64 cap;
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rdmsrl_on_cpu(cpu, MSR_HWP_CAPABILITIES, &cap);
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WRITE_ONCE(all_cpu_data[cpu]->hwp_cap_cached, cap);
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rdmsrl_on_cpu(cpu->cpu, MSR_HWP_CAPABILITIES, &cap);
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WRITE_ONCE(cpu->hwp_cap_cached, cap);
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if (global.no_turbo || global.turbo_disabled)
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*current_max = HWP_GUARANTEED_PERF(cap);
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else
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@ -914,7 +914,7 @@ static void intel_pstate_hwp_offline(struct cpudata *cpu)
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}
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value &= ~GENMASK_ULL(31, 0);
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min_perf = HWP_LOWEST_PERF(cpu->hwp_cap_cached);
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min_perf = HWP_LOWEST_PERF(READ_ONCE(cpu->hwp_cap_cached));
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/* Set hwp_max = hwp_min */
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value |= HWP_MAX_PERF(min_perf);
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@ -1213,7 +1213,7 @@ static void update_qos_request(enum freq_qos_req_type type)
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continue;
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if (hwp_active)
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intel_pstate_get_hwp_max(i, &turbo_max, &max_state);
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intel_pstate_get_hwp_max(cpu, &turbo_max, &max_state);
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else
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turbo_max = cpu->pstate.turbo_pstate;
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@ -1714,21 +1714,22 @@ static void intel_pstate_max_within_limits(struct cpudata *cpu)
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static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
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{
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cpu->pstate.min_pstate = pstate_funcs.get_min();
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cpu->pstate.max_pstate = pstate_funcs.get_max();
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cpu->pstate.max_pstate_physical = pstate_funcs.get_max_physical();
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cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
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cpu->pstate.scaling = pstate_funcs.get_scaling();
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cpu->pstate.max_freq = cpu->pstate.max_pstate * cpu->pstate.scaling;
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if (hwp_active && !hwp_mode_bdw) {
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unsigned int phy_max, current_max;
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intel_pstate_get_hwp_max(cpu->cpu, &phy_max, ¤t_max);
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intel_pstate_get_hwp_max(cpu, &phy_max, ¤t_max);
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cpu->pstate.turbo_freq = phy_max * cpu->pstate.scaling;
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cpu->pstate.turbo_pstate = phy_max;
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cpu->pstate.max_pstate = HWP_GUARANTEED_PERF(READ_ONCE(cpu->hwp_cap_cached));
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} else {
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cpu->pstate.turbo_freq = cpu->pstate.turbo_pstate * cpu->pstate.scaling;
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cpu->pstate.max_pstate = pstate_funcs.get_max();
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}
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cpu->pstate.max_freq = cpu->pstate.max_pstate * cpu->pstate.scaling;
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if (pstate_funcs.get_aperf_mperf_shift)
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cpu->aperf_mperf_shift = pstate_funcs.get_aperf_mperf_shift();
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@ -1750,6 +1751,7 @@ static int hwp_boost_hold_time_ns = 3 * NSEC_PER_MSEC;
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static inline void intel_pstate_hwp_boost_up(struct cpudata *cpu)
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{
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u64 hwp_req = READ_ONCE(cpu->hwp_req_cached);
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u64 hwp_cap = READ_ONCE(cpu->hwp_cap_cached);
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u32 max_limit = (hwp_req & 0xff00) >> 8;
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u32 min_limit = (hwp_req & 0xff);
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u32 boost_level1;
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@ -1776,14 +1778,14 @@ static inline void intel_pstate_hwp_boost_up(struct cpudata *cpu)
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cpu->hwp_boost_min = min_limit;
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/* level at half way mark between min and guranteed */
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boost_level1 = (HWP_GUARANTEED_PERF(cpu->hwp_cap_cached) + min_limit) >> 1;
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boost_level1 = (HWP_GUARANTEED_PERF(hwp_cap) + min_limit) >> 1;
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if (cpu->hwp_boost_min < boost_level1)
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cpu->hwp_boost_min = boost_level1;
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else if (cpu->hwp_boost_min < HWP_GUARANTEED_PERF(cpu->hwp_cap_cached))
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cpu->hwp_boost_min = HWP_GUARANTEED_PERF(cpu->hwp_cap_cached);
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else if (cpu->hwp_boost_min == HWP_GUARANTEED_PERF(cpu->hwp_cap_cached) &&
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max_limit != HWP_GUARANTEED_PERF(cpu->hwp_cap_cached))
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else if (cpu->hwp_boost_min < HWP_GUARANTEED_PERF(hwp_cap))
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cpu->hwp_boost_min = HWP_GUARANTEED_PERF(hwp_cap);
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else if (cpu->hwp_boost_min == HWP_GUARANTEED_PERF(hwp_cap) &&
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max_limit != HWP_GUARANTEED_PERF(hwp_cap))
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cpu->hwp_boost_min = max_limit;
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else
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return;
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@ -2207,7 +2209,7 @@ static void intel_pstate_update_perf_limits(struct cpudata *cpu,
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* rather than pure ratios.
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*/
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if (hwp_active) {
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intel_pstate_get_hwp_max(cpu->cpu, &turbo_max, &max_state);
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intel_pstate_get_hwp_max(cpu, &turbo_max, &max_state);
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} else {
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max_state = global.no_turbo || global.turbo_disabled ?
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cpu->pstate.max_pstate : cpu->pstate.turbo_pstate;
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@ -2322,7 +2324,7 @@ static void intel_pstate_verify_cpu_policy(struct cpudata *cpu,
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if (hwp_active) {
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int max_state, turbo_max;
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intel_pstate_get_hwp_max(cpu->cpu, &turbo_max, &max_state);
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intel_pstate_get_hwp_max(cpu, &turbo_max, &max_state);
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max_freq = max_state * cpu->pstate.scaling;
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} else {
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max_freq = intel_pstate_get_max_freq(cpu);
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@ -2496,7 +2498,7 @@ static int intel_cpufreq_verify_policy(struct cpufreq_policy_data *policy)
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* driver call was via the normal or fast switch path. Various graphs
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* output from the intel_pstate_tracer.py utility that include core_busy
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* (or performance or core_avg_perf) have a fixed y-axis from 0 to 100%,
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* so we use 10 to indicate the the normal path through the driver, and
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* so we use 10 to indicate the normal path through the driver, and
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* 90 to indicate the fast switch path through the driver.
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* The scaled_busy field is not used, and is set to 0.
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*/
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@ -2526,7 +2528,7 @@ static void intel_cpufreq_trace(struct cpudata *cpu, unsigned int trace_type, in
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fp_toint(cpu->iowait_boost * 100));
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}
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static void intel_cpufreq_adjust_hwp(struct cpudata *cpu, u32 min, u32 max,
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static void intel_cpufreq_hwp_update(struct cpudata *cpu, u32 min, u32 max,
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u32 desired, bool fast_switch)
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{
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u64 prev = READ_ONCE(cpu->hwp_req_cached), value = prev;
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@ -2550,7 +2552,7 @@ static void intel_cpufreq_adjust_hwp(struct cpudata *cpu, u32 min, u32 max,
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wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
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}
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static void intel_cpufreq_adjust_perf_ctl(struct cpudata *cpu,
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static void intel_cpufreq_perf_ctl_update(struct cpudata *cpu,
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u32 target_pstate, bool fast_switch)
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{
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if (fast_switch)
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@ -2572,10 +2574,10 @@ static int intel_cpufreq_update_pstate(struct cpufreq_policy *policy,
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int max_pstate = policy->strict_target ?
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target_pstate : cpu->max_perf_ratio;
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intel_cpufreq_adjust_hwp(cpu, target_pstate, max_pstate, 0,
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intel_cpufreq_hwp_update(cpu, target_pstate, max_pstate, 0,
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fast_switch);
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} else if (target_pstate != old_pstate) {
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intel_cpufreq_adjust_perf_ctl(cpu, target_pstate, fast_switch);
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intel_cpufreq_perf_ctl_update(cpu, target_pstate, fast_switch);
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}
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cpu->pstate.current_pstate = target_pstate;
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@ -2673,7 +2675,7 @@ static void intel_cpufreq_adjust_perf(unsigned int cpunum,
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target_pstate = clamp_t(int, target_pstate, min_pstate, max_pstate);
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intel_cpufreq_adjust_hwp(cpu, min_pstate, max_pstate, target_pstate, true);
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intel_cpufreq_hwp_update(cpu, min_pstate, max_pstate, target_pstate, true);
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cpu->pstate.current_pstate = target_pstate;
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intel_cpufreq_trace(cpu, INTEL_PSTATE_TRACE_FAST_SWITCH, old_pstate);
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@ -2709,7 +2711,7 @@ static int intel_cpufreq_cpu_init(struct cpufreq_policy *policy)
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if (hwp_active) {
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u64 value;
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intel_pstate_get_hwp_max(policy->cpu, &turbo_max, &max_state);
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intel_pstate_get_hwp_max(cpu, &turbo_max, &max_state);
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policy->transition_delay_us = INTEL_CPUFREQ_TRANSITION_DELAY_HWP;
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rdmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, &value);
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WRITE_ONCE(cpu->hwp_req_cached, value);
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@ -116,7 +116,7 @@ static int ls1x_cpufreq_exit(struct cpufreq_policy *policy)
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static struct cpufreq_driver ls1x_cpufreq_driver = {
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.name = "cpufreq-ls1x",
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = ls1x_cpufreq_target,
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.get = cpufreq_generic_get,
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|
@ -463,7 +463,7 @@ static int mtk_cpufreq_exit(struct cpufreq_policy *policy)
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}
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static struct cpufreq_driver mtk_cpufreq_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
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CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
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CPUFREQ_IS_COOLING_DEV,
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.verify = cpufreq_generic_frequency_table_verify,
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|
@ -144,7 +144,7 @@ static int omap_cpu_exit(struct cpufreq_policy *policy)
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}
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static struct cpufreq_driver omap_driver = {
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = omap_target,
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.get = cpufreq_generic_get,
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|
@ -439,8 +439,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
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.init = pmac_cpufreq_cpu_init,
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.suspend = pmac_cpufreq_suspend,
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.resume = pmac_cpufreq_resume,
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.flags = CPUFREQ_PM_NO_WARN |
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CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
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.flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
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.attr = cpufreq_generic_attr,
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.name = "powermac",
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};
|
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|
@ -347,6 +347,12 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
|
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|
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dev_pm_opp_of_register_em(cpu_dev, policy->cpus);
|
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|
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if (policy_has_boost_freq(policy)) {
|
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ret = cpufreq_enable_boost_support();
|
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if (ret)
|
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dev_warn(cpu_dev, "failed to enable boost: %d\n", ret);
|
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}
|
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|
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return 0;
|
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error:
|
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devm_iounmap(dev, base);
|
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@ -374,7 +380,7 @@ static struct freq_attr *qcom_cpufreq_hw_attr[] = {
|
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};
|
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static struct cpufreq_driver cpufreq_qcom_hw_driver = {
|
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
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CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
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CPUFREQ_IS_COOLING_DEV,
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.verify = cpufreq_generic_frequency_table_verify,
|
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|
@ -420,7 +420,7 @@ static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
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#endif
|
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static struct cpufreq_driver s3c24xx_driver = {
|
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
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.target = s3c_cpufreq_target,
|
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.get = cpufreq_generic_get,
|
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.init = s3c_cpufreq_init,
|
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|
@ -574,7 +574,7 @@ static int s5pv210_cpufreq_reboot_notifier_event(struct notifier_block *this,
|
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}
|
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|
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static struct cpufreq_driver s5pv210_driver = {
|
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
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.verify = cpufreq_generic_frequency_table_verify,
|
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.target_index = s5pv210_target,
|
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.get = cpufreq_generic_get,
|
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|
@ -186,7 +186,7 @@ static int __init sa1100_cpu_init(struct cpufreq_policy *policy)
|
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}
|
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|
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static struct cpufreq_driver sa1100_driver __refdata = {
|
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.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
|
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
|
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CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
|
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.verify = cpufreq_generic_frequency_table_verify,
|
||||
.target_index = sa1100_target,
|
||||
|
@ -310,7 +310,7 @@ static int __init sa1110_cpu_init(struct cpufreq_policy *policy)
|
||||
/* sa1110_driver needs __refdata because it must remain after init registers
|
||||
* it with cpufreq_register_driver() */
|
||||
static struct cpufreq_driver sa1110_driver __refdata = {
|
||||
.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK |
|
||||
.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK |
|
||||
CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING,
|
||||
.verify = cpufreq_generic_frequency_table_verify,
|
||||
.target_index = sa1110_target,
|
||||
|
@ -217,7 +217,7 @@ static int scmi_cpufreq_exit(struct cpufreq_policy *policy)
|
||||
|
||||
static struct cpufreq_driver scmi_cpufreq_driver = {
|
||||
.name = "scmi",
|
||||
.flags = CPUFREQ_STICKY | CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
||||
.flags = CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
||||
CPUFREQ_NEED_INITIAL_FREQ_CHECK |
|
||||
CPUFREQ_IS_COOLING_DEV,
|
||||
.verify = cpufreq_generic_frequency_table_verify,
|
||||
|
@ -191,7 +191,7 @@ static int scpi_cpufreq_exit(struct cpufreq_policy *policy)
|
||||
|
||||
static struct cpufreq_driver scpi_cpufreq_driver = {
|
||||
.name = "scpi-cpufreq",
|
||||
.flags = CPUFREQ_STICKY | CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
||||
.flags = CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
||||
CPUFREQ_NEED_INITIAL_FREQ_CHECK |
|
||||
CPUFREQ_IS_COOLING_DEV,
|
||||
.verify = cpufreq_generic_frequency_table_verify,
|
||||
|
@ -160,7 +160,7 @@ static int spear_cpufreq_init(struct cpufreq_policy *policy)
|
||||
|
||||
static struct cpufreq_driver spear_cpufreq_driver = {
|
||||
.name = "cpufreq-spear",
|
||||
.flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
||||
.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
||||
.verify = cpufreq_generic_frequency_table_verify,
|
||||
.target_index = spear_cpufreq_target,
|
||||
.get = cpufreq_generic_get,
|
||||
|
@ -1,38 +0,0 @@
|
||||
#include <linux/of.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/pm_opp.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
static const struct of_device_id machines[] __initconst = {
|
||||
{ .compatible = "sigma,tango4" },
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static int __init tango_cpufreq_init(void)
|
||||
{
|
||||
struct device *cpu_dev = get_cpu_device(0);
|
||||
unsigned long max_freq;
|
||||
struct clk *cpu_clk;
|
||||
void *res;
|
||||
|
||||
if (!of_match_node(machines, of_root))
|
||||
return -ENODEV;
|
||||
|
||||
cpu_clk = clk_get(cpu_dev, NULL);
|
||||
if (IS_ERR(cpu_clk))
|
||||
return -ENODEV;
|
||||
|
||||
max_freq = clk_get_rate(cpu_clk);
|
||||
|
||||
dev_pm_opp_add(cpu_dev, max_freq / 1, 0);
|
||||
dev_pm_opp_add(cpu_dev, max_freq / 2, 0);
|
||||
dev_pm_opp_add(cpu_dev, max_freq / 3, 0);
|
||||
dev_pm_opp_add(cpu_dev, max_freq / 5, 0);
|
||||
dev_pm_opp_add(cpu_dev, max_freq / 9, 0);
|
||||
|
||||
res = platform_device_register_data(NULL, "cpufreq-dt", -1, NULL, 0);
|
||||
|
||||
return PTR_ERR_OR_ZERO(res);
|
||||
}
|
||||
device_initcall(tango_cpufreq_init);
|
@ -117,7 +117,7 @@ static unsigned int tegra186_cpufreq_get(unsigned int cpu)
|
||||
|
||||
static struct cpufreq_driver tegra186_cpufreq_driver = {
|
||||
.name = "tegra186",
|
||||
.flags = CPUFREQ_STICKY | CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
||||
.flags = CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
||||
CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
||||
.get = tegra186_cpufreq_get,
|
||||
.verify = cpufreq_generic_frequency_table_verify,
|
||||
|
@ -272,8 +272,7 @@ static int tegra194_cpufreq_set_target(struct cpufreq_policy *policy,
|
||||
|
||||
static struct cpufreq_driver tegra194_cpufreq_driver = {
|
||||
.name = "tegra194",
|
||||
.flags = CPUFREQ_STICKY | CPUFREQ_CONST_LOOPS |
|
||||
CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
||||
.flags = CPUFREQ_CONST_LOOPS | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
||||
.verify = cpufreq_generic_frequency_table_verify,
|
||||
.target_index = tegra194_cpufreq_set_target,
|
||||
.get = tegra194_get_speed,
|
||||
|
@ -32,6 +32,16 @@ static bool cpu0_node_has_opp_v2_prop(void)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void tegra20_cpufreq_put_supported_hw(void *opp_table)
|
||||
{
|
||||
dev_pm_opp_put_supported_hw(opp_table);
|
||||
}
|
||||
|
||||
static void tegra20_cpufreq_dt_unregister(void *cpufreq_dt)
|
||||
{
|
||||
platform_device_unregister(cpufreq_dt);
|
||||
}
|
||||
|
||||
static int tegra20_cpufreq_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct platform_device *cpufreq_dt;
|
||||
@ -68,42 +78,31 @@ static int tegra20_cpufreq_probe(struct platform_device *pdev)
|
||||
return err;
|
||||
}
|
||||
|
||||
err = devm_add_action_or_reset(&pdev->dev,
|
||||
tegra20_cpufreq_put_supported_hw,
|
||||
opp_table);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
cpufreq_dt = platform_device_register_simple("cpufreq-dt", -1, NULL, 0);
|
||||
err = PTR_ERR_OR_ZERO(cpufreq_dt);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev,
|
||||
"failed to create cpufreq-dt device: %d\n", err);
|
||||
goto err_put_supported_hw;
|
||||
return err;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, cpufreq_dt);
|
||||
|
||||
return 0;
|
||||
|
||||
err_put_supported_hw:
|
||||
dev_pm_opp_put_supported_hw(opp_table);
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
static int tegra20_cpufreq_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct platform_device *cpufreq_dt;
|
||||
struct opp_table *opp_table;
|
||||
|
||||
cpufreq_dt = platform_get_drvdata(pdev);
|
||||
platform_device_unregister(cpufreq_dt);
|
||||
|
||||
opp_table = dev_pm_opp_get_opp_table(get_cpu_device(0));
|
||||
dev_pm_opp_put_supported_hw(opp_table);
|
||||
dev_pm_opp_put_opp_table(opp_table);
|
||||
err = devm_add_action_or_reset(&pdev->dev,
|
||||
tegra20_cpufreq_dt_unregister,
|
||||
cpufreq_dt);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct platform_driver tegra20_cpufreq_driver = {
|
||||
.probe = tegra20_cpufreq_probe,
|
||||
.remove = tegra20_cpufreq_remove,
|
||||
.driver = {
|
||||
.name = "tegra20-cpufreq",
|
||||
},
|
||||
|
@ -486,8 +486,7 @@ static void ve_spc_cpufreq_ready(struct cpufreq_policy *policy)
|
||||
|
||||
static struct cpufreq_driver ve_spc_cpufreq_driver = {
|
||||
.name = "vexpress-spc",
|
||||
.flags = CPUFREQ_STICKY |
|
||||
CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
||||
.flags = CPUFREQ_HAVE_GOVERNOR_PER_POLICY |
|
||||
CPUFREQ_NEED_INITIAL_FREQ_CHECK,
|
||||
.verify = cpufreq_generic_frequency_table_verify,
|
||||
.target_index = ve_spc_cpufreq_set_target,
|
||||
|
@ -387,14 +387,22 @@ struct cpufreq_driver {
|
||||
|
||||
/* flags */
|
||||
|
||||
/* driver isn't removed even if all ->init() calls failed */
|
||||
#define CPUFREQ_STICKY BIT(0)
|
||||
/*
|
||||
* Set by drivers that need to update internale upper and lower boundaries along
|
||||
* with the target frequency and so the core and governors should also invoke
|
||||
* the diver if the target frequency does not change, but the policy min or max
|
||||
* may have changed.
|
||||
*/
|
||||
#define CPUFREQ_NEED_UPDATE_LIMITS BIT(0)
|
||||
|
||||
/* loops_per_jiffy or other kernel "constants" aren't affected by frequency transitions */
|
||||
#define CPUFREQ_CONST_LOOPS BIT(1)
|
||||
|
||||
/* don't warn on suspend/resume speed mismatches */
|
||||
#define CPUFREQ_PM_NO_WARN BIT(2)
|
||||
/*
|
||||
* Set by drivers that want the core to automatically register the cpufreq
|
||||
* driver as a thermal cooling device.
|
||||
*/
|
||||
#define CPUFREQ_IS_COOLING_DEV BIT(2)
|
||||
|
||||
/*
|
||||
* This should be set by platforms having multiple clock-domains, i.e.
|
||||
@ -426,20 +434,6 @@ struct cpufreq_driver {
|
||||
*/
|
||||
#define CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING BIT(6)
|
||||
|
||||
/*
|
||||
* Set by drivers that want the core to automatically register the cpufreq
|
||||
* driver as a thermal cooling device.
|
||||
*/
|
||||
#define CPUFREQ_IS_COOLING_DEV BIT(7)
|
||||
|
||||
/*
|
||||
* Set by drivers that need to update internale upper and lower boundaries along
|
||||
* with the target frequency and so the core and governors should also invoke
|
||||
* the diver if the target frequency does not change, but the policy min or max
|
||||
* may have changed.
|
||||
*/
|
||||
#define CPUFREQ_NEED_UPDATE_LIMITS BIT(8)
|
||||
|
||||
int cpufreq_register_driver(struct cpufreq_driver *driver_data);
|
||||
int cpufreq_unregister_driver(struct cpufreq_driver *driver_data);
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user