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[MIPS] Lasat: Fix overlap of interrupt number ranges.

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The range of MIPS_CPU IRQ and the range of LASAT IRQ overlap.

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Yoichi Yuasa 2007-11-09 18:42:35 +09:00 committed by Ralf Baechle
parent fcee3faf83
commit 89becf5c0d
4 changed files with 44 additions and 28 deletions
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22
arch/mips/lasat/interrupt.c
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@ -19,17 +19,14 @@
* Lasat boards.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/sched.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/irq.h>
#include <asm/bootinfo.h>
#include <asm/irq_cpu.h>
#include <asm/lasat/lasatint.h>
#include <asm/time.h>
#include <asm/gdb-stub.h>
#include <irq.h>
static volatile int *lasat_int_status;
static volatile int *lasat_int_mask;
@ -97,12 +94,18 @@ asmlinkage void plat_irq_dispatch(void)
/* if int_status == 0, then the interrupt has already been cleared */
if (int_status) {
irq = LASATINT_BASE + ls1bit32(int_status);
irq = LASAT_IRQ_BASE + ls1bit32(int_status);
do_IRQ(irq);
}
}
static struct irqaction cascade = {
.handler = no_action,
.mask = CPU_MASK_NONE,
.name = "cascade",
};
void __init arch_init_irq(void)
{
int i;
@ -127,6 +130,9 @@ void __init arch_init_irq(void)
}
mips_cpu_irq_init();
for (i = LASATINT_BASE; i <= LASATINT_END; i++)
for (i = LASAT_IRQ_BASE; i <= LASAT_IRQ_END; i++)
set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
setup_irq(LASAT_CASCADE_IRQ, &cascade);
}

32
arch/mips/pci/pci-lasat.c
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@ -5,12 +5,14 @@
*
* Copyright (C) 2000, 2001, 04 Keith M Wesolowski
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <asm/bootinfo.h>
#include <asm/lasat/lasatint.h>
#include <irq.h>
extern struct pci_ops nile4_pci_ops;
extern struct pci_ops gt64xxx_pci0_ops;
@ -55,15 +57,15 @@ static int __init lasat_pci_setup(void)
arch_initcall(lasat_pci_setup);
#define LASATINT_ETH1 (LASATINT_BASE + 0)
#define LASATINT_ETH0 (LASATINT_BASE + 1)
#define LASATINT_HDC (LASATINT_BASE + 2)
#define LASATINT_COMP (LASATINT_BASE + 3)
#define LASATINT_HDLC (LASATINT_BASE + 4)
#define LASATINT_PCIA (LASATINT_BASE + 5)
#define LASATINT_PCIB (LASATINT_BASE + 6)
#define LASATINT_PCIC (LASATINT_BASE + 7)
#define LASATINT_PCID (LASATINT_BASE + 8)
#define LASAT_IRQ_ETH1 (LASAT_IRQ_BASE + 0)
#define LASAT_IRQ_ETH0 (LASAT_IRQ_BASE + 1)
#define LASAT_IRQ_HDC (LASAT_IRQ_BASE + 2)
#define LASAT_IRQ_COMP (LASAT_IRQ_BASE + 3)
#define LASAT_IRQ_HDLC (LASAT_IRQ_BASE + 4)
#define LASAT_IRQ_PCIA (LASAT_IRQ_BASE + 5)
#define LASAT_IRQ_PCIB (LASAT_IRQ_BASE + 6)
#define LASAT_IRQ_PCIC (LASAT_IRQ_BASE + 7)
#define LASAT_IRQ_PCID (LASAT_IRQ_BASE + 8)
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
{
@ -71,13 +73,13 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
case 1:
case 2:
case 3:
return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
return LASAT_IRQ_PCIA + (((slot-1) + (pin-1)) % 4);
case 4:
return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
return LASAT_IRQ_ETH1; /* Ethernet 1 (LAN 2) */
case 5:
return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
return LASAT_IRQ_ETH0; /* Ethernet 0 (LAN 1) */
case 6:
return LASATINT_HDC; /* IDE controller */
return LASAT_IRQ_HDC; /* IDE controller */
default:
return 0xff; /* Illegal */
}

5
include/asm-mips/lasat/lasatint.h
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@ -1,11 +1,6 @@
#ifndef __ASM_LASAT_LASATINT_H
#define __ASM_LASAT_LASATINT_H
#include <linux/irq.h>
#define LASATINT_BASE MIPS_CPU_IRQ_BASE
#define LASATINT_END (LASATINT_BASE + 16)
/* lasat 100 */
#define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000))
#define LASAT_INT_MASK_REG_100 (KSEG1ADDR(0x1c890000))

13
include/asm-mips/mach-lasat/irq.h Normal file
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@ -0,0 +1,13 @@
#ifndef _ASM_MACH_LASAT_IRQ_H
#define _ASM_MACH_LASAT_IRQ_H
#define LASAT_CASCADE_IRQ (MIPS_CPU_IRQ_BASE + 0)
#define LASAT_IRQ_BASE 8
#define LASAT_IRQ_END 23
#define NR_IRQS 24
#include_next <irq.h>
#endif /* _ASM_MACH_LASAT_IRQ_H */