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xtensa: drop dead PCI support code

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xtensa-specific PCI initialization code has significantly bitrotted over
time because there's no platform that use it. Get rid of remaining
non-functioning initialization and remove platform_pcibios_* interface.
A new platform that would use PCI on xtensa will configure PCI
controller using device tree.

Drop variables pci_ctrl_head, pci_bus_count and functions pcibios_init,
pci_controller_apertures, platform_pcibios_init and
platform_pcibios_fixup.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This commit is contained in:
Max Filippov 2018-10-15 12:33:51 -07:00
parent 2a97d60cf6
commit 88804e680b
4 changed files with 0 additions and 107 deletions
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10
arch/xtensa/include/asm/platform.h
View File

@ -54,16 +54,6 @@ extern void platform_idle (void);
*/
extern void platform_heartbeat (void);
/*
* platform_pcibios_init is called to allow the platform to setup the pci bus.
*/
extern void platform_pcibios_init (void);
/*
* platform_pcibios_fixup allows to modify the PCI configuration.
*/
extern int platform_pcibios_fixup (void);
/*
* platform_calibrate_ccount calibrates cpu clock freq (CONFIG_XTENSA_CALIBRATE)
*/

91
arch/xtensa/kernel/pci.c
View File

@ -24,22 +24,6 @@
#include <asm/pci-bridge.h>
#include <asm/platform.h>
/* PCI Controller */
/*
* pcibios_alloc_controller
* pcibios_enable_device
* pcibios_fixups
* pcibios_align_resource
* pcibios_fixup_bus
* pci_bus_add_device
*/
static struct pci_controller *pci_ctrl_head;
static int pci_bus_count;
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
@ -74,81 +58,6 @@ pcibios_align_resource(void *data, const struct resource *res,
return start;
}
static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
struct list_head *resources)
{
struct resource *res;
unsigned long io_offset;
int i;
io_offset = (unsigned long)pci_ctrl->io_space.base;
res = &pci_ctrl->io_resource;
if (!res->flags) {
if (io_offset)
pr_err("I/O resource not set for host bridge %d\n",
pci_ctrl->index);
res->start = 0;
res->end = IO_SPACE_LIMIT;
res->flags = IORESOURCE_IO;
}
res->start += io_offset;
res->end += io_offset;
pci_add_resource_offset(resources, res, io_offset);
for (i = 0; i < 3; i++) {
res = &pci_ctrl->mem_resources[i];
if (!res->flags) {
if (i > 0)
continue;
pr_err("Memory resource not set for host bridge %d\n",
pci_ctrl->index);
res->start = 0;
res->end = ~0U;
res->flags = IORESOURCE_MEM;
}
pci_add_resource(resources, res);
}
}
static int __init pcibios_init(void)
{
struct pci_controller *pci_ctrl;
struct list_head resources;
struct pci_bus *bus;
int next_busno = 0, ret;
pr_info("PCI: Probing PCI hardware\n");
/* Scan all of the recorded PCI controllers. */
for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
pci_ctrl->last_busno = 0xff;
INIT_LIST_HEAD(&resources);
pci_controller_apertures(pci_ctrl, &resources);
bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
pci_ctrl->ops, pci_ctrl, &resources);
if (!bus)
continue;
pci_ctrl->bus = bus;
pci_ctrl->last_busno = bus->busn_res.end;
if (next_busno <= pci_ctrl->last_busno)
next_busno = pci_ctrl->last_busno+1;
}
pci_bus_count = next_busno;
ret = platform_pcibios_fixup();
if (ret)
return ret;
for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
if (pci_ctrl->bus)
pci_bus_add_devices(pci_ctrl->bus);
}
return 0;
}
subsys_initcall(pcibios_init);
void pcibios_fixup_bus(struct pci_bus *bus)
{
if (bus->parent) {

2
arch/xtensa/kernel/platform.c
View File

@ -34,8 +34,6 @@ _F(void, halt, (void), { while(1); });
_F(void, power_off, (void), { while(1); });
_F(void, idle, (void), { __asm__ __volatile__ ("waiti 0" ::: "memory"); });
_F(void, heartbeat, (void), { });
_F(int, pcibios_fixup, (void), { return 0; });
_F(void, pcibios_init, (void), { });
#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
_F(void, calibrate_ccount, (void),

4
arch/xtensa/kernel/setup.c
View File

@ -405,10 +405,6 @@ void __init setup_arch(char **cmdline_p)
conswitchp = &dummy_con;
# endif
#endif
#ifdef CONFIG_PCI
platform_pcibios_init();
#endif
}
static DEFINE_PER_CPU(struct cpu, cpu_data);