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Mediatek DRM fixes for Linux 5.5

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Merge tag 'mediatek-drm-fixes-5.5' of https://github.com/ckhu-mediatek/linux.git-tags into drm-fixes

Mediatek DRM fixes for Linux 5.5

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: CK Hu <ck.hu@mediatek.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1577762298.23194.2.camel@mtksdaap41
This commit is contained in:
Dave Airlie 2020-01-02 09:40:03 +10:00
commit 886a0dc04d
2 changed files with 50 additions and 35 deletions
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18
drivers/gpu/drm/mediatek/mtk_drm_crtc.c
View File

@ -215,11 +215,12 @@ struct mtk_ddp_comp *mtk_drm_ddp_comp_for_plane(struct drm_crtc *crtc,
struct mtk_drm_crtc *mtk_crtc = to_mtk_crtc(crtc);
struct mtk_ddp_comp *comp;
int i, count = 0;
unsigned int local_index = plane - mtk_crtc->planes;
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
comp = mtk_crtc->ddp_comp[i];
if (plane->index < (count + mtk_ddp_comp_layer_nr(comp))) {
*local_layer = plane->index - count;
if (local_index < (count + mtk_ddp_comp_layer_nr(comp))) {
*local_layer = local_index - count;
return comp;
}
count += mtk_ddp_comp_layer_nr(comp);
@ -310,7 +311,9 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
plane_state = to_mtk_plane_state(plane->state);
comp = mtk_drm_ddp_comp_for_plane(crtc, plane, &local_layer);
mtk_ddp_comp_layer_config(comp, local_layer, plane_state);
if (comp)
mtk_ddp_comp_layer_config(comp, local_layer,
plane_state);
}
return 0;
@ -386,8 +389,9 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc)
comp = mtk_drm_ddp_comp_for_plane(crtc, plane,
&local_layer);
mtk_ddp_comp_layer_config(comp, local_layer,
plane_state);
if (comp)
mtk_ddp_comp_layer_config(comp, local_layer,
plane_state);
plane_state->pending.config = false;
}
mtk_crtc->pending_planes = false;
@ -401,7 +405,9 @@ int mtk_drm_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
struct mtk_ddp_comp *comp;
comp = mtk_drm_ddp_comp_for_plane(crtc, plane, &local_layer);
return mtk_ddp_comp_layer_check(comp, local_layer, state);
if (comp)
return mtk_ddp_comp_layer_check(comp, local_layer, state);
return 0;
}
static void mtk_drm_crtc_atomic_enable(struct drm_crtc *crtc,

67
drivers/gpu/drm/mediatek/mtk_dsi.c
View File

@ -230,28 +230,25 @@ static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data)
static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi)
{
u32 timcon0, timcon1, timcon2, timcon3;
u32 ui, cycle_time;
u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, 1000000);
struct mtk_phy_timing *timing = &dsi->phy_timing;
ui = DIV_ROUND_UP(1000000000, dsi->data_rate);
cycle_time = div_u64(8000000000ULL, dsi->data_rate);
timing->lpx = (60 * data_rate_mhz / (8 * 1000)) + 1;
timing->da_hs_prepare = (80 * data_rate_mhz + 4 * 1000) / 8000;
timing->da_hs_zero = (170 * data_rate_mhz + 10 * 1000) / 8000 + 1 -
timing->da_hs_prepare;
timing->da_hs_trail = timing->da_hs_prepare + 1;
timing->lpx = NS_TO_CYCLE(60, cycle_time);
timing->da_hs_prepare = NS_TO_CYCLE(50 + 5 * ui, cycle_time);
timing->da_hs_zero = NS_TO_CYCLE(110 + 6 * ui, cycle_time);
timing->da_hs_trail = NS_TO_CYCLE(77 + 4 * ui, cycle_time);
timing->ta_go = 4 * timing->lpx - 2;
timing->ta_sure = timing->lpx + 2;
timing->ta_get = 4 * timing->lpx;
timing->da_hs_exit = 2 * timing->lpx + 1;
timing->ta_go = 4 * timing->lpx;
timing->ta_sure = 3 * timing->lpx / 2;
timing->ta_get = 5 * timing->lpx;
timing->da_hs_exit = 2 * timing->lpx;
timing->clk_hs_zero = NS_TO_CYCLE(336, cycle_time);
timing->clk_hs_trail = NS_TO_CYCLE(100, cycle_time) + 10;
timing->clk_hs_prepare = NS_TO_CYCLE(64, cycle_time);
timing->clk_hs_post = NS_TO_CYCLE(80 + 52 * ui, cycle_time);
timing->clk_hs_exit = 2 * timing->lpx;
timing->clk_hs_prepare = 70 * data_rate_mhz / (8 * 1000);
timing->clk_hs_post = timing->clk_hs_prepare + 8;
timing->clk_hs_trail = timing->clk_hs_prepare;
timing->clk_hs_zero = timing->clk_hs_trail * 4;
timing->clk_hs_exit = 2 * timing->clk_hs_trail;
timcon0 = timing->lpx | timing->da_hs_prepare << 8 |
timing->da_hs_zero << 16 | timing->da_hs_trail << 24;
@ -482,27 +479,39 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi)
dsi_tmp_buf_bpp - 10);
data_phy_cycles = timing->lpx + timing->da_hs_prepare +
timing->da_hs_zero + timing->da_hs_exit + 2;
timing->da_hs_zero + timing->da_hs_exit + 3;
if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) {
if (vm->hfront_porch * dsi_tmp_buf_bpp >
if ((vm->hfront_porch + vm->hback_porch) * dsi_tmp_buf_bpp >
data_phy_cycles * dsi->lanes + 18) {
horizontal_frontporch_byte = vm->hfront_porch *
dsi_tmp_buf_bpp -
data_phy_cycles *
dsi->lanes - 18;
horizontal_frontporch_byte =
vm->hfront_porch * dsi_tmp_buf_bpp -
(data_phy_cycles * dsi->lanes + 18) *
vm->hfront_porch /
(vm->hfront_porch + vm->hback_porch);
horizontal_backporch_byte =
horizontal_backporch_byte -
(data_phy_cycles * dsi->lanes + 18) *
vm->hback_porch /
(vm->hfront_porch + vm->hback_porch);
} else {
DRM_WARN("HFP less than d-phy, FPS will under 60Hz\n");
horizontal_frontporch_byte = vm->hfront_porch *
dsi_tmp_buf_bpp;
}
} else {
if (vm->hfront_porch * dsi_tmp_buf_bpp >
if ((vm->hfront_porch + vm->hback_porch) * dsi_tmp_buf_bpp >
data_phy_cycles * dsi->lanes + 12) {
horizontal_frontporch_byte = vm->hfront_porch *
dsi_tmp_buf_bpp -
data_phy_cycles *
dsi->lanes - 12;
horizontal_frontporch_byte =
vm->hfront_porch * dsi_tmp_buf_bpp -
(data_phy_cycles * dsi->lanes + 12) *
vm->hfront_porch /
(vm->hfront_porch + vm->hback_porch);
horizontal_backporch_byte = horizontal_backporch_byte -
(data_phy_cycles * dsi->lanes + 12) *
vm->hback_porch /
(vm->hfront_porch + vm->hback_porch);
} else {
DRM_WARN("HFP less than d-phy, FPS will under 60Hz\n");
horizontal_frontporch_byte = vm->hfront_porch *