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[POWERPC] mpic: add support for serial mode interrupts
On Tue, Jun 20, 2006 at 02:01:26PM +1000, Benjamin Herrenschmidt wrote: > On Mon, 2006-06-19 at 13:08 -0700, Mark A. Greer wrote: > > MPC10x-style interrupt controllers have a serial mode that allows > > several interrupts to be clocked in through one INT signal. > > > > This patch adds the software support for that mode. > > You hard code the clock ratio... why not add a separate call to be > called after mpic_init, > something like mpic_set_serial_int(int mpic, int enable, int > clock_ratio) ? How's this? -- MPC10x-style interrupt controllers have a serial mode that allows several interrupts to be clocked in through one INT signal. This patch adds the software support for that mode. Signed-off-by: Mark A. Greer <mgreer@mvista.com> -- arch/powerpc/sysdev/mpic.c | 20 ++++++++++++++++++++ include/asm-powerpc/mpic.h | 10 ++++++++++ 2 files changed, 30 insertions(+) -- Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -829,7 +829,27 @@ void __init mpic_init(struct mpic *mpic)
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mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0);
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mpic_cpu_write(MPIC_CPU_CURRENT_TASK_PRI, 0);
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}
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}
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void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
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{
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u32 v;
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v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
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v &= ~MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK;
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v |= MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(clock_ratio);
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mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
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}
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void __init mpic_set_serial_int(struct mpic *mpic, int enable)
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{
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u32 v;
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v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1);
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if (enable)
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v |= MPIC_GREG_GLOBAL_CONF_1_SIE;
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else
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v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE;
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mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v);
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}
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void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
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void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
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{
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{
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@ -22,6 +22,10 @@
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#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000
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#define MPIC_GREG_GCONF_8259_PTHROU_DIS 0x20000000
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#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
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#define MPIC_GREG_GCONF_BASE_MASK 0x000fffff
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#define MPIC_GREG_GLOBAL_CONF_1 0x00030
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#define MPIC_GREG_GLOBAL_CONF_1 0x00030
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#define MPIC_GREG_GLOBAL_CONF_1_SIE 0x08000000
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#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK 0x70000000
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#define MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO(r) \
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(((r) << 28) & MPIC_GREG_GLOBAL_CONF_1_CLK_RATIO_MASK)
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#define MPIC_GREG_VENDOR_0 0x00040
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#define MPIC_GREG_VENDOR_0 0x00040
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#define MPIC_GREG_VENDOR_1 0x00050
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#define MPIC_GREG_VENDOR_1 0x00050
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#define MPIC_GREG_VENDOR_2 0x00060
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#define MPIC_GREG_VENDOR_2 0x00060
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@ -284,6 +288,12 @@ extern int mpic_get_one_irq(struct mpic *mpic, struct pt_regs *regs);
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/* This one gets to the primary mpic */
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/* This one gets to the primary mpic */
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extern int mpic_get_irq(struct pt_regs *regs);
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extern int mpic_get_irq(struct pt_regs *regs);
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/* Set the EPIC clock ratio */
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void mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio);
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/* Enable/Disable EPIC serial interrupt mode */
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void mpic_set_serial_int(struct mpic *mpic, int enable);
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/* global mpic for pSeries */
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/* global mpic for pSeries */
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extern struct mpic *pSeries_mpic;
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extern struct mpic *pSeries_mpic;
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