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[ARM] 3823/1: iop3xx: switch iop32x/iop33x over to shared time code

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Switch the iop32x and iop33x code over to the common time implementation,
and remove the (nearly identical) iop32x and iop33x time implementations.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek 2006-09-18 23:19:02 +01:00 committed by Russell King
parent 48388b2a56
commit 863753a81e
10 changed files with 26 additions and 265 deletions
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2
arch/arm/mach-iop32x/Makefile
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@ -2,7 +2,7 @@
# Makefile for the linux kernel. # Makefile for the linux kernel.
# #
obj-y := common.o setup.o irq.o time.o obj-y := common.o setup.o irq.o
obj-m := obj-m :=
obj-n := obj-n :=
obj- := obj- :=

15
arch/arm/mach-iop32x/setup.c
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@ -29,6 +29,7 @@
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/hardware/iop3xx.h> #include <asm/hardware/iop3xx.h>
#define IOP321_UART_XTAL 1843200 #define IOP321_UART_XTAL 1843200
@ -67,16 +68,22 @@ void __init iop32x_init(void)
#ifdef CONFIG_ARCH_IQ80321 #ifdef CONFIG_ARCH_IQ80321
extern void iq80321_map_io(void); extern void iq80321_map_io(void);
extern struct sys_timer iop321_timer;
extern void iop321_init_time(void);
#endif #endif
#ifdef CONFIG_ARCH_IQ31244 #ifdef CONFIG_ARCH_IQ31244
extern void iq31244_map_io(void); extern void iq31244_map_io(void);
extern struct sys_timer iop321_timer;
extern void iop321_init_time(void);
#endif #endif
static void __init iop3xx_timer_init(void)
{
iop3xx_init_time(IOP321_TICK_RATE);
}
struct sys_timer iop321_timer = {
.init = iop3xx_timer_init,
.offset = iop3xx_gettimeoffset,
};
#if defined(CONFIG_ARCH_IQ80321) #if defined(CONFIG_ARCH_IQ80321)
MACHINE_START(IQ80321, "Intel IQ80321") MACHINE_START(IQ80321, "Intel IQ80321")
/* Maintainer: Intel Corporation */ /* Maintainer: Intel Corporation */

108
arch/arm/mach-iop32x/time.c
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@ -1,108 +0,0 @@
/*
* arch/arm/mach-iop32x/time.c
*
* Timer code for IOP321 based systems
*
* Author: Deepak Saxena <dsaxena@mvista.com>
*
* Copyright 2002-2003 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/timex.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#define IOP321_TIME_SYNC 0
static inline unsigned long get_elapsed(void)
{
return LATCH - *IOP321_TU_TCR0;
}
static unsigned long iop321_gettimeoffset(void)
{
unsigned long elapsed, usec;
u32 tisr1, tisr2;
/*
* If an interrupt was pending before we read the timer,
* we've already wrapped. Factor this into the time.
* If an interrupt was pending after we read the timer,
* it may have wrapped between checking the interrupt
* status and reading the timer. Re-read the timer to
* be sure its value is after the wrap.
*/
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
elapsed = get_elapsed();
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
if(tisr1 & 1)
elapsed += LATCH;
else if (tisr2 & 1)
elapsed = LATCH + get_elapsed();
/*
* Now convert them to usec.
*/
usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
return usec;
}
static irqreturn_t
iop321_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
u32 tisr;
write_seqlock(&xtime_lock);
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
tisr |= 1;
asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
timer_tick(regs);
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
}
static struct irqaction iop321_timer_irq = {
.name = "IOP321 Timer Tick",
.handler = iop321_timer_interrupt,
.flags = IRQF_DISABLED | IRQF_TIMER,
};
static void __init iop321_timer_init(void)
{
u32 timer_ctl;
setup_irq(IRQ_IOP321_TIMER0, &iop321_timer_irq);
timer_ctl = IOP321_TMR_EN | IOP321_TMR_PRIVILEGED | IOP321_TMR_RELOAD |
IOP321_TMR_RATIO_1_1;
asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
}
struct sys_timer iop321_timer = {
.init = &iop321_timer_init,
.offset = iop321_gettimeoffset,
};

2
arch/arm/mach-iop33x/Makefile
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@ -2,7 +2,7 @@
# Makefile for the linux kernel. # Makefile for the linux kernel.
# #
obj-y := setup.o irq.o time.o obj-y := setup.o irq.o
obj-m := obj-m :=
obj-n := obj-n :=
obj- := obj- :=

12
arch/arm/mach-iop33x/setup.c
View File

@ -28,6 +28,7 @@
#include <asm/hardware.h> #include <asm/hardware.h>
#include <asm/mach-types.h> #include <asm/mach-types.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/hardware/iop3xx.h> #include <asm/hardware/iop3xx.h>
#define IOP331_UART_XTAL 33334000 #define IOP331_UART_XTAL 33334000
@ -118,9 +119,18 @@ void __init iop33x_init(void)
#ifdef CONFIG_ARCH_IOP33X #ifdef CONFIG_ARCH_IOP33X
extern void iop331_init_irq(void); extern void iop331_init_irq(void);
extern struct sys_timer iop331_timer;
#endif #endif
static void __init iop3xx_timer_init(void)
{
iop3xx_init_time(IOP331_TICK_RATE);
}
struct sys_timer iop331_timer = {
.init = iop3xx_timer_init,
.offset = iop3xx_gettimeoffset,
};
#if defined(CONFIG_ARCH_IQ80331) #if defined(CONFIG_ARCH_IQ80331)
MACHINE_START(IQ80331, "Intel IQ80331") MACHINE_START(IQ80331, "Intel IQ80331")
/* Maintainer: Intel Corp. */ /* Maintainer: Intel Corp. */

106
arch/arm/mach-iop33x/time.c
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@ -1,106 +0,0 @@
/*
* arch/arm/mach-iop33x/time.c
*
* Timer code for IOP331 based systems
*
* Author: Dave Jiang <dave.jiang@intel.com>
*
* Copyright 2003 Intel Corp.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/kernel.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/init.h>
#include <linux/timex.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
static inline unsigned long get_elapsed(void)
{
return LATCH - *IOP331_TU_TCR0;
}
static unsigned long iop331_gettimeoffset(void)
{
unsigned long elapsed, usec;
u32 tisr1, tisr2;
/*
* If an interrupt was pending before we read the timer,
* we've already wrapped. Factor this into the time.
* If an interrupt was pending after we read the timer,
* it may have wrapped between checking the interrupt
* status and reading the timer. Re-read the timer to
* be sure its value is after the wrap.
*/
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr1));
elapsed = get_elapsed();
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr2));
if(tisr1 & 1)
elapsed += LATCH;
else if (tisr2 & 1)
elapsed = LATCH + get_elapsed();
/*
* Now convert them to usec.
*/
usec = (unsigned long)(elapsed / (CLOCK_TICK_RATE/1000000));
return usec;
}
static irqreturn_t
iop331_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
{
u32 tisr;
write_seqlock(&xtime_lock);
asm volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (tisr));
tisr |= 1;
asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (tisr));
timer_tick(regs);
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
}
static struct irqaction iop331_timer_irq = {
.name = "IOP331 Timer Tick",
.handler = iop331_timer_interrupt,
.flags = IRQF_DISABLED | IRQF_TIMER,
};
static void __init iop331_timer_init(void)
{
u32 timer_ctl;
setup_irq(IRQ_IOP331_TIMER0, &iop331_timer_irq);
timer_ctl = IOP331_TMR_EN | IOP331_TMR_PRIVILEGED | IOP331_TMR_RELOAD |
IOP331_TMR_RATIO_1_1;
asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (LATCH));
asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl));
}
struct sys_timer iop331_timer = {
.init = iop331_timer_init,
.offset = iop331_gettimeoffset,
};

21
include/asm-arm/arch-iop32x/iop321.h
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@ -151,10 +151,6 @@
#define IOP321_FINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007DC) #define IOP321_FINTSRC (volatile u32 *)IOP321_REG_ADDR(0x000007DC)
/* Timers */ /* Timers */
#define IOP321_TU_TMR0 (volatile u32 *)IOP321_REG_ADDR(0x000007E0)
#define IOP321_TU_TMR1 (volatile u32 *)IOP321_REG_ADDR(0x000007E4)
#ifdef CONFIG_ARCH_IQ80321 #ifdef CONFIG_ARCH_IQ80321
#define IOP321_TICK_RATE 200000000 /* 200 MHz clock */ #define IOP321_TICK_RATE 200000000 /* 200 MHz clock */
#elif defined(CONFIG_ARCH_IQ31244) #elif defined(CONFIG_ARCH_IQ31244)
@ -166,23 +162,6 @@
#define IOP321_TICK_RATE 200000000 /* 33.333333 Mhz crystal */ #define IOP321_TICK_RATE 200000000 /* 33.333333 Mhz crystal */
#endif #endif
#define IOP321_TMR_TC 0x01
#define IOP321_TMR_EN 0x02
#define IOP321_TMR_RELOAD 0x04
#define IOP321_TMR_PRIVILEGED 0x09
#define IOP321_TMR_RATIO_1_1 0x00
#define IOP321_TMR_RATIO_4_1 0x10
#define IOP321_TMR_RATIO_8_1 0x20
#define IOP321_TMR_RATIO_16_1 0x30
#define IOP321_TU_TCR0 (volatile u32 *)IOP321_REG_ADDR(0x000007E8)
#define IOP321_TU_TCR1 (volatile u32 *)IOP321_REG_ADDR(0x000007EC)
#define IOP321_TU_TRR0 (volatile u32 *)IOP321_REG_ADDR(0x000007F0)
#define IOP321_TU_TRR1 (volatile u32 *)IOP321_REG_ADDR(0x000007F4)
#define IOP321_TU_TISR (volatile u32 *)IOP321_REG_ADDR(0x000007F8)
#define IOP321_TU_WDTCR (volatile u32 *)IOP321_REG_ADDR(0x000007FC)
/* Application accelerator unit 0x00000800 - 0x000008FF */ /* Application accelerator unit 0x00000800 - 0x000008FF */
#define IOP321_AAU_ACR (volatile u32 *)IOP321_REG_ADDR(0x00000800) #define IOP321_AAU_ACR (volatile u32 *)IOP321_REG_ADDR(0x00000800)
#define IOP321_AAU_ASR (volatile u32 *)IOP321_REG_ADDR(0x00000804) #define IOP321_AAU_ASR (volatile u32 *)IOP321_REG_ADDR(0x00000804)

2
include/asm-arm/arch-iop32x/timex.h
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@ -5,4 +5,4 @@
*/ */
#include <asm/hardware.h> #include <asm/hardware.h>
#define CLOCK_TICK_RATE IOP321_TICK_RATE #define CLOCK_TICK_RATE (100 * HZ)

21
include/asm-arm/arch-iop33x/iop331.h
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@ -137,27 +137,6 @@
/* Timers */ /* Timers */
#define IOP331_TU_TMR0 (volatile u32 *)IOP331_REG_ADDR(0x000007D0)
#define IOP331_TU_TMR1 (volatile u32 *)IOP331_REG_ADDR(0x000007D4)
#define IOP331_TMR_TC 0x01
#define IOP331_TMR_EN 0x02
#define IOP331_TMR_RELOAD 0x04
#define IOP331_TMR_PRIVILEGED 0x09
#define IOP331_TMR_RATIO_1_1 0x00
#define IOP331_TMR_RATIO_4_1 0x10
#define IOP331_TMR_RATIO_8_1 0x20
#define IOP331_TMR_RATIO_16_1 0x30
#define IOP331_TU_TCR0 (volatile u32 *)IOP331_REG_ADDR(0x000007D8)
#define IOP331_TU_TCR1 (volatile u32 *)IOP331_REG_ADDR(0x000007DC)
#define IOP331_TU_TRR0 (volatile u32 *)IOP331_REG_ADDR(0x000007E0)
#define IOP331_TU_TRR1 (volatile u32 *)IOP331_REG_ADDR(0x000007E4)
#define IOP331_TU_TISR (volatile u32 *)IOP331_REG_ADDR(0x000007E8)
#define IOP331_TU_WDTCR (volatile u32 *)IOP331_REG_ADDR(0x000007EC)
#if defined(CONFIG_ARCH_IOP33X) #if defined(CONFIG_ARCH_IOP33X)
#define IOP331_TICK_RATE 266000000 /* 266 MHz IB clock */ #define IOP331_TICK_RATE 266000000 /* 266 MHz IB clock */
#endif #endif

2
include/asm-arm/arch-iop33x/timex.h
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@ -5,4 +5,4 @@
*/ */
#include <asm/hardware.h> #include <asm/hardware.h>
#define CLOCK_TICK_RATE IOP331_TICK_RATE #define CLOCK_TICK_RATE (100 * HZ)