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KVM: arm64: Factor out firmware register handling from psci.c
Common hypercall firmware register handing is currently employed by psci.c. Since the upcoming patches add more of these registers, it's better to move the generic handling to hypercall.c for a cleaner presentation. While we are at it, collect all the firmware registers under fw_reg_ids[] to help implement kvm_arm_get_fw_num_regs() and kvm_arm_copy_fw_reg_indices() in a generic way. Also, define KVM_REG_FEATURE_LEVEL_MASK using a GENMASK instead. No functional change intended. Signed-off-by: Raghavendra Rao Ananta <rananta@google.com> Reviewed-by: Oliver Upton <oupton@google.com> Reviewed-by: Gavin Shan <gshan@redhat.com> [maz: fixed KVM_REG_FEATURE_LEVEL_MASK] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220502233853.1233742-2-rananta@google.com
This commit is contained in:
Raghavendra Rao Ananta
Marc Zyngier
parent
b2d229d4dd
commit
85fbe08e4d
@ -18,7 +18,7 @@
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#include <linux/string.h>
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#include <linux/vmalloc.h>
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#include <linux/fs.h>
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#include <kvm/arm_psci.h>
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#include <kvm/arm_hypercalls.h>
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#include <asm/cputype.h>
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#include <linux/uaccess.h>
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#include <asm/fpsimd.h>
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@ -158,3 +158,187 @@ int kvm_hvc_call_handler(struct kvm_vcpu *vcpu)
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smccc_set_retval(vcpu, val[0], val[1], val[2], val[3]);
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return 1;
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}
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static const u64 kvm_arm_fw_reg_ids[] = {
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KVM_REG_ARM_PSCI_VERSION,
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1,
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2,
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3,
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};
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int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
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{
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return ARRAY_SIZE(kvm_arm_fw_reg_ids);
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}
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int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(kvm_arm_fw_reg_ids); i++) {
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if (put_user(kvm_arm_fw_reg_ids[i], uindices++))
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return -EFAULT;
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}
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return 0;
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}
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#define KVM_REG_FEATURE_LEVEL_MASK GENMASK(3, 0)
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/*
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* Convert the workaround level into an easy-to-compare number, where higher
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* values mean better protection.
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*/
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static int get_kernel_wa_level(u64 regid)
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{
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switch (regid) {
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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switch (arm64_get_spectre_v2_state()) {
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case SPECTRE_VULNERABLE:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
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case SPECTRE_MITIGATED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL;
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case SPECTRE_UNAFFECTED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED;
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}
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
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switch (arm64_get_spectre_v4_state()) {
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case SPECTRE_MITIGATED:
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/*
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* As for the hypercall discovery, we pretend we
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* don't have any FW mitigation if SSBS is there at
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* all times.
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*/
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if (cpus_have_final_cap(ARM64_SSBS))
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
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fallthrough;
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case SPECTRE_UNAFFECTED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
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case SPECTRE_VULNERABLE:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
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}
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break;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
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switch (arm64_get_spectre_bhb_state()) {
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case SPECTRE_VULNERABLE:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
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case SPECTRE_MITIGATED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL;
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case SPECTRE_UNAFFECTED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED;
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}
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
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}
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return -EINVAL;
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}
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int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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switch (reg->id) {
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case KVM_REG_ARM_PSCI_VERSION:
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val = kvm_psci_version(vcpu);
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break;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
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val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
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break;
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default:
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return -ENOENT;
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}
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if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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return 0;
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}
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int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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int wa_level;
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if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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switch (reg->id) {
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case KVM_REG_ARM_PSCI_VERSION:
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{
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bool wants_02;
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wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
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switch (val) {
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case KVM_ARM_PSCI_0_1:
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if (wants_02)
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return -EINVAL;
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vcpu->kvm->arch.psci_version = val;
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return 0;
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case KVM_ARM_PSCI_0_2:
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case KVM_ARM_PSCI_1_0:
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case KVM_ARM_PSCI_1_1:
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if (!wants_02)
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return -EINVAL;
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vcpu->kvm->arch.psci_version = val;
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return 0;
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}
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break;
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}
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
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if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
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return -EINVAL;
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if (get_kernel_wa_level(reg->id) < val)
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return -EINVAL;
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return 0;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
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if (val & ~(KVM_REG_FEATURE_LEVEL_MASK |
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED))
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return -EINVAL;
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/* The enabled bit must not be set unless the level is AVAIL. */
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if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) &&
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(val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL)
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return -EINVAL;
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/*
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* Map all the possible incoming states to the only two we
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* really want to deal with.
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*/
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switch (val & KVM_REG_FEATURE_LEVEL_MASK) {
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
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wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
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break;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
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wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
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break;
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default:
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return -EINVAL;
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}
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/*
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* We can deal with NOT_AVAIL on NOT_REQUIRED, but not the
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* other way around.
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*/
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if (get_kernel_wa_level(reg->id) < wa_level)
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return -EINVAL;
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return 0;
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default:
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return -ENOENT;
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}
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return -EINVAL;
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}
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@ -436,186 +436,3 @@ int kvm_psci_call(struct kvm_vcpu *vcpu)
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return -EINVAL;
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}
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}
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int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu)
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{
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return 4; /* PSCI version and three workaround registers */
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}
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int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
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{
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if (put_user(KVM_REG_ARM_PSCI_VERSION, uindices++))
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return -EFAULT;
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if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, uindices++))
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return -EFAULT;
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if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, uindices++))
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return -EFAULT;
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if (put_user(KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, uindices++))
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return -EFAULT;
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return 0;
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}
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#define KVM_REG_FEATURE_LEVEL_WIDTH 4
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#define KVM_REG_FEATURE_LEVEL_MASK (BIT(KVM_REG_FEATURE_LEVEL_WIDTH) - 1)
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/*
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* Convert the workaround level into an easy-to-compare number, where higher
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* values mean better protection.
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*/
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static int get_kernel_wa_level(u64 regid)
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{
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switch (regid) {
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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switch (arm64_get_spectre_v2_state()) {
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case SPECTRE_VULNERABLE:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
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case SPECTRE_MITIGATED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL;
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case SPECTRE_UNAFFECTED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED;
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}
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
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switch (arm64_get_spectre_v4_state()) {
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case SPECTRE_MITIGATED:
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/*
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* As for the hypercall discovery, we pretend we
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* don't have any FW mitigation if SSBS is there at
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* all times.
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*/
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if (cpus_have_final_cap(ARM64_SSBS))
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
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fallthrough;
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case SPECTRE_UNAFFECTED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
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case SPECTRE_VULNERABLE:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
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}
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break;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
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switch (arm64_get_spectre_bhb_state()) {
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case SPECTRE_VULNERABLE:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
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case SPECTRE_MITIGATED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL;
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case SPECTRE_UNAFFECTED:
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED;
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}
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return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL;
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}
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return -EINVAL;
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}
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int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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switch (reg->id) {
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case KVM_REG_ARM_PSCI_VERSION:
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val = kvm_psci_version(vcpu);
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break;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
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val = get_kernel_wa_level(reg->id) & KVM_REG_FEATURE_LEVEL_MASK;
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break;
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default:
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return -ENOENT;
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}
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if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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return 0;
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}
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int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
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{
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void __user *uaddr = (void __user *)(long)reg->addr;
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u64 val;
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int wa_level;
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if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id)))
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return -EFAULT;
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switch (reg->id) {
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case KVM_REG_ARM_PSCI_VERSION:
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{
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bool wants_02;
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wants_02 = test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features);
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switch (val) {
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case KVM_ARM_PSCI_0_1:
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if (wants_02)
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return -EINVAL;
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vcpu->kvm->arch.psci_version = val;
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return 0;
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case KVM_ARM_PSCI_0_2:
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case KVM_ARM_PSCI_1_0:
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case KVM_ARM_PSCI_1_1:
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if (!wants_02)
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return -EINVAL;
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vcpu->kvm->arch.psci_version = val;
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return 0;
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}
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break;
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}
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3:
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if (val & ~KVM_REG_FEATURE_LEVEL_MASK)
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return -EINVAL;
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if (get_kernel_wa_level(reg->id) < val)
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return -EINVAL;
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return 0;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2:
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if (val & ~(KVM_REG_FEATURE_LEVEL_MASK |
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KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED))
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return -EINVAL;
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/* The enabled bit must not be set unless the level is AVAIL. */
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if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) &&
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(val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL)
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return -EINVAL;
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/*
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* Map all the possible incoming states to the only two we
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* really want to deal with.
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*/
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switch (val & KVM_REG_FEATURE_LEVEL_MASK) {
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN:
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wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL;
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break;
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL:
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case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED:
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wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED;
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break;
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default:
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return -EINVAL;
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}
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/*
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* We can deal with NOT_AVAIL on NOT_REQUIRED, but not the
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* other way around.
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*/
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if (get_kernel_wa_level(reg->id) < wa_level)
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return -EINVAL;
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return 0;
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default:
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return -ENOENT;
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}
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return -EINVAL;
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}
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@ -40,4 +40,11 @@ static inline void smccc_set_retval(struct kvm_vcpu *vcpu,
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vcpu_set_reg(vcpu, 3, a3);
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}
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struct kvm_one_reg;
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int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu);
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int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
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int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
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int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
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#endif
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@ -39,11 +39,4 @@ static inline int kvm_psci_version(struct kvm_vcpu *vcpu)
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int kvm_psci_call(struct kvm_vcpu *vcpu);
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struct kvm_one_reg;
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int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu);
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int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices);
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int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
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int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg);
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#endif /* __KVM_ARM_PSCI_H__ */
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