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pinctrl: moorefield: Adapt to Intel Tangier driver
Make use of Intel Tangier as a library driver for Moorefield. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Link: https://lore.kernel.org/r/20230814054033.12004-4-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
This commit is contained in:
Raag Jadav
Andy Shevchenko
parent
4e1edcc7a9
commit
8574e4d994
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@ -36,17 +36,6 @@ config PINCTRL_LYNXPOINT
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provides an interface that allows configuring of PCH pins and
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provides an interface that allows configuring of PCH pins and
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using them as GPIOs.
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using them as GPIOs.
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config PINCTRL_MOOREFIELD
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tristate "Intel Moorefield pinctrl driver"
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depends on X86_INTEL_MID
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select PINMUX
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select PINCONF
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select GENERIC_PINCONF
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help
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Moorefield Family-Level Interface Shim (FLIS) driver provides an
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interface that allows configuring of SoC pins and using them as
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GPIOs.
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config PINCTRL_INTEL
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config PINCTRL_INTEL
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tristate
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tristate
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select PINMUX
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select PINMUX
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@ -22,4 +22,12 @@ config PINCTRL_MERRIFIELD
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an interface that allows configuring of SoC pins and using them as
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an interface that allows configuring of SoC pins and using them as
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GPIOs.
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GPIOs.
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config PINCTRL_MOOREFIELD
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tristate "Intel Moorefield pinctrl driver"
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select PINCTRL_TANGIER
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help
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Intel Moorefield Family-Level Interface Shim (FLIS) driver provides
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an interface that allows configuring of SoC pins and using them as
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GPIOs.
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endif
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endif
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@ -6,77 +6,16 @@
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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* Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
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*/
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*/
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#include <linux/bits.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/mod_devicetable.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/seq_file.h>
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#include <linux/types.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include "pinctrl-intel.h"
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#include "pinctrl-tangier.h"
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#define MOFLD_FAMILY_NR 64
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#define MOFLD_FAMILY_LEN 0x400
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#define SLEW_OFFSET 0x000
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#define BUFCFG_OFFSET 0x100
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#define MISC_OFFSET 0x300
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#define BUFCFG_PINMODE_SHIFT 0
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#define BUFCFG_PINMODE_MASK GENMASK(2, 0)
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#define BUFCFG_PINMODE_GPIO 0
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#define BUFCFG_PUPD_VAL_SHIFT 4
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#define BUFCFG_PUPD_VAL_MASK GENMASK(5, 4)
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#define BUFCFG_PUPD_VAL_2K 0
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#define BUFCFG_PUPD_VAL_20K 1
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#define BUFCFG_PUPD_VAL_50K 2
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#define BUFCFG_PUPD_VAL_910 3
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#define BUFCFG_PU_EN BIT(8)
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#define BUFCFG_PD_EN BIT(9)
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#define BUFCFG_Px_EN_MASK GENMASK(9, 8)
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#define BUFCFG_SLEWSEL BIT(10)
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#define BUFCFG_OVINEN BIT(12)
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#define BUFCFG_OVINEN_EN BIT(13)
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#define BUFCFG_OVINEN_MASK GENMASK(13, 12)
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#define BUFCFG_OVOUTEN BIT(14)
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#define BUFCFG_OVOUTEN_EN BIT(15)
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#define BUFCFG_OVOUTEN_MASK GENMASK(15, 14)
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#define BUFCFG_INDATAOV_VAL BIT(16)
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#define BUFCFG_INDATAOV_EN BIT(17)
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#define BUFCFG_INDATAOV_MASK GENMASK(17, 16)
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#define BUFCFG_OUTDATAOV_VAL BIT(18)
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#define BUFCFG_OUTDATAOV_EN BIT(19)
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#define BUFCFG_OUTDATAOV_MASK GENMASK(19, 18)
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#define BUFCFG_OD_EN BIT(21)
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/**
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* struct mofld_family - Intel pin family description
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* @barno: MMIO BAR number where registers for this family reside
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* @pin_base: Starting pin of pins in this family
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* @npins: Number of pins in this family
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* @protected: True if family is protected by access
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* @regs: family specific common registers
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*/
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struct mofld_family {
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unsigned int barno;
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unsigned int pin_base;
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size_t npins;
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bool protected;
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void __iomem *regs;
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};
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#define MOFLD_FAMILY(b, s, e) \
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{ \
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.barno = (b), \
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.pin_base = (s), \
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.npins = (e) - (s) + 1, \
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}
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static const struct pinctrl_pin_desc mofld_pins[] = {
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static const struct pinctrl_pin_desc mofld_pins[] = {
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/* ULPI (13 pins) */
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/* ULPI (13 pins) */
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@ -347,561 +286,39 @@ static const struct pinctrl_pin_desc mofld_pins[] = {
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PINCTRL_PIN(250, "JTAG_TRST"),
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PINCTRL_PIN(250, "JTAG_TRST"),
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};
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};
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static const struct mofld_family mofld_families[] = {
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static const struct tng_family mofld_families[] = {
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MOFLD_FAMILY(0, 0, 12),
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TNG_FAMILY(0, 0, 12),
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MOFLD_FAMILY(1, 13, 24),
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TNG_FAMILY(1, 13, 24),
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MOFLD_FAMILY(2, 25, 44),
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TNG_FAMILY(2, 25, 44),
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MOFLD_FAMILY(3, 45, 52),
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TNG_FAMILY(3, 45, 52),
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MOFLD_FAMILY(4, 53, 66),
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TNG_FAMILY(4, 53, 66),
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MOFLD_FAMILY(5, 67, 88),
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TNG_FAMILY(5, 67, 88),
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MOFLD_FAMILY(6, 89, 108),
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TNG_FAMILY(6, 89, 108),
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MOFLD_FAMILY(7, 109, 131),
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TNG_FAMILY(7, 109, 131),
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MOFLD_FAMILY(8, 132, 151),
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TNG_FAMILY(8, 132, 151),
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MOFLD_FAMILY(9, 152, 166),
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TNG_FAMILY(9, 152, 166),
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MOFLD_FAMILY(10, 167, 180),
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TNG_FAMILY(10, 167, 180),
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MOFLD_FAMILY(11, 181, 195),
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TNG_FAMILY(11, 181, 195),
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MOFLD_FAMILY(12, 196, 215),
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TNG_FAMILY(12, 196, 215),
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MOFLD_FAMILY(13, 216, 228),
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TNG_FAMILY(13, 216, 228),
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MOFLD_FAMILY(14, 229, 250),
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TNG_FAMILY(14, 229, 250),
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};
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};
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/**
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static const struct tng_pinctrl mofld_soc_data = {
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* struct mofld_pinctrl - Intel Merrifield pinctrl private structure
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.pins = mofld_pins,
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* @dev: Pointer to the device structure
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.npins = ARRAY_SIZE(mofld_pins),
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* @lock: Lock to serialize register access
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.families = mofld_families,
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* @pctldesc: Pin controller description
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.nfamilies = ARRAY_SIZE(mofld_families),
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* @pctldev: Pointer to the pin controller device
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* @families: Array of families this pinctrl handles
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* @nfamilies: Number of families in the array
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* @functions: Array of functions
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* @nfunctions: Number of functions in the array
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* @groups: Array of pin groups
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* @ngroups: Number of groups in the array
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* @pins: Array of pins this pinctrl controls
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* @npins: Number of pins in the array
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*/
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struct mofld_pinctrl {
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struct device *dev;
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raw_spinlock_t lock;
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struct pinctrl_desc pctldesc;
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struct pinctrl_dev *pctldev;
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/* Pin controller configuration */
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const struct mofld_family *families;
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size_t nfamilies;
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const struct intel_function *functions;
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size_t nfunctions;
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const struct intel_pingroup *groups;
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size_t ngroups;
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const struct pinctrl_pin_desc *pins;
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size_t npins;
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};
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};
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#define pin_to_bufno(f, p) ((p) - (f)->pin_base)
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static const struct mofld_family *mofld_get_family(struct mofld_pinctrl *mp, unsigned int pin)
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{
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const struct mofld_family *family;
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unsigned int i;
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for (i = 0; i < mp->nfamilies; i++) {
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family = &mp->families[i];
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if (pin >= family->pin_base &&
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pin < family->pin_base + family->npins)
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return family;
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}
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dev_warn(mp->dev, "failed to find family for pin %u\n", pin);
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return NULL;
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}
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static bool mofld_buf_available(struct mofld_pinctrl *mp, unsigned int pin)
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{
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const struct mofld_family *family;
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family = mofld_get_family(mp, pin);
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if (!family)
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return false;
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return !family->protected;
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}
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static void __iomem *mofld_get_bufcfg(struct mofld_pinctrl *mp, unsigned int pin)
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{
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const struct mofld_family *family;
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unsigned int bufno;
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family = mofld_get_family(mp, pin);
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if (!family)
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return NULL;
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bufno = pin_to_bufno(family, pin);
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return family->regs + BUFCFG_OFFSET + bufno * 4;
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}
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static int mofld_read_bufcfg(struct mofld_pinctrl *mp, unsigned int pin, u32 *value)
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{
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void __iomem *bufcfg;
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if (!mofld_buf_available(mp, pin))
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return -EBUSY;
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bufcfg = mofld_get_bufcfg(mp, pin);
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*value = readl(bufcfg);
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return 0;
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}
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static void mofld_update_bufcfg(struct mofld_pinctrl *mp, unsigned int pin, u32 bits, u32 mask)
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{
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void __iomem *bufcfg;
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u32 value;
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bufcfg = mofld_get_bufcfg(mp, pin);
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value = readl(bufcfg);
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value &= ~mask;
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value |= bits & mask;
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writel(value, bufcfg);
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}
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static int mofld_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
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return mp->ngroups;
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}
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static const char *mofld_get_group_name(struct pinctrl_dev *pctldev, unsigned int group)
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{
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struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
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return mp->groups[group].grp.name;
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}
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static int mofld_get_group_pins(struct pinctrl_dev *pctldev, unsigned int group,
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const unsigned int **pins, unsigned int *npins)
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{
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struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
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*pins = mp->groups[group].grp.pins;
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*npins = mp->groups[group].grp.npins;
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return 0;
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}
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static void mofld_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned int pin)
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{
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struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
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u32 value, mode;
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int ret;
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ret = mofld_read_bufcfg(mp, pin, &value);
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if (ret) {
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seq_puts(s, "not available");
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return;
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}
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mode = (value & BUFCFG_PINMODE_MASK) >> BUFCFG_PINMODE_SHIFT;
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if (mode == BUFCFG_PINMODE_GPIO)
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seq_puts(s, "GPIO ");
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else
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seq_printf(s, "mode %d ", mode);
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seq_printf(s, "0x%08x", value);
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}
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static const struct pinctrl_ops mofld_pinctrl_ops = {
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.get_groups_count = mofld_get_groups_count,
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.get_group_name = mofld_get_group_name,
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.get_group_pins = mofld_get_group_pins,
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.pin_dbg_show = mofld_pin_dbg_show,
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};
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static int mofld_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
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return mp->nfunctions;
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}
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static const char *mofld_get_function_name(struct pinctrl_dev *pctldev, unsigned int function)
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{
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struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
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return mp->functions[function].func.name;
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}
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static int mofld_get_function_groups(struct pinctrl_dev *pctldev, unsigned int function,
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const char * const **groups, unsigned int * const ngroups)
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{
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struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
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*groups = mp->functions[function].func.groups;
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*ngroups = mp->functions[function].func.ngroups;
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return 0;
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}
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static int mofld_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
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unsigned int group)
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{
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struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
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const struct intel_pingroup *grp = &mp->groups[group];
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u32 bits = grp->mode << BUFCFG_PINMODE_SHIFT;
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u32 mask = BUFCFG_PINMODE_MASK;
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unsigned long flags;
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unsigned int i;
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/*
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* All pins in the groups needs to be accessible and writable
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* before we can enable the mux for this group.
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*/
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for (i = 0; i < grp->grp.npins; i++) {
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if (!mofld_buf_available(mp, grp->grp.pins[i]))
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return -EBUSY;
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}
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/* Now enable the mux setting for each pin in the group */
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raw_spin_lock_irqsave(&mp->lock, flags);
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for (i = 0; i < grp->grp.npins; i++)
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mofld_update_bufcfg(mp, grp->grp.pins[i], bits, mask);
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raw_spin_unlock_irqrestore(&mp->lock, flags);
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return 0;
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}
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static int mofld_gpio_request_enable(struct pinctrl_dev *pctldev,
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|
||||||
struct pinctrl_gpio_range *range,
|
|
||||||
unsigned int pin)
|
|
||||||
{
|
|
||||||
struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
|
|
||||||
u32 bits = BUFCFG_PINMODE_GPIO << BUFCFG_PINMODE_SHIFT;
|
|
||||||
u32 mask = BUFCFG_PINMODE_MASK;
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
if (!mofld_buf_available(mp, pin))
|
|
||||||
return -EBUSY;
|
|
||||||
|
|
||||||
raw_spin_lock_irqsave(&mp->lock, flags);
|
|
||||||
mofld_update_bufcfg(mp, pin, bits, mask);
|
|
||||||
raw_spin_unlock_irqrestore(&mp->lock, flags);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct pinmux_ops mofld_pinmux_ops = {
|
|
||||||
.get_functions_count = mofld_get_functions_count,
|
|
||||||
.get_function_name = mofld_get_function_name,
|
|
||||||
.get_function_groups = mofld_get_function_groups,
|
|
||||||
.set_mux = mofld_pinmux_set_mux,
|
|
||||||
.gpio_request_enable = mofld_gpio_request_enable,
|
|
||||||
};
|
|
||||||
|
|
||||||
static int mofld_config_get(struct pinctrl_dev *pctldev, unsigned int pin,
|
|
||||||
unsigned long *config)
|
|
||||||
{
|
|
||||||
struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
|
|
||||||
enum pin_config_param param = pinconf_to_config_param(*config);
|
|
||||||
u32 value, term;
|
|
||||||
u16 arg = 0;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = mofld_read_bufcfg(mp, pin, &value);
|
|
||||||
if (ret)
|
|
||||||
return -ENOTSUPP;
|
|
||||||
|
|
||||||
term = (value & BUFCFG_PUPD_VAL_MASK) >> BUFCFG_PUPD_VAL_SHIFT;
|
|
||||||
|
|
||||||
switch (param) {
|
|
||||||
case PIN_CONFIG_BIAS_DISABLE:
|
|
||||||
if (value & BUFCFG_Px_EN_MASK)
|
|
||||||
return -EINVAL;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_BIAS_PULL_UP:
|
|
||||||
if ((value & BUFCFG_Px_EN_MASK) != BUFCFG_PU_EN)
|
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
switch (term) {
|
|
||||||
case BUFCFG_PUPD_VAL_910:
|
|
||||||
arg = 910;
|
|
||||||
break;
|
|
||||||
case BUFCFG_PUPD_VAL_2K:
|
|
||||||
arg = 2000;
|
|
||||||
break;
|
|
||||||
case BUFCFG_PUPD_VAL_20K:
|
|
||||||
arg = 20000;
|
|
||||||
break;
|
|
||||||
case BUFCFG_PUPD_VAL_50K:
|
|
||||||
arg = 50000;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
||||||
if ((value & BUFCFG_Px_EN_MASK) != BUFCFG_PD_EN)
|
|
||||||
return -EINVAL;
|
|
||||||
|
|
||||||
switch (term) {
|
|
||||||
case BUFCFG_PUPD_VAL_910:
|
|
||||||
arg = 910;
|
|
||||||
break;
|
|
||||||
case BUFCFG_PUPD_VAL_2K:
|
|
||||||
arg = 2000;
|
|
||||||
break;
|
|
||||||
case BUFCFG_PUPD_VAL_20K:
|
|
||||||
arg = 20000;
|
|
||||||
break;
|
|
||||||
case BUFCFG_PUPD_VAL_50K:
|
|
||||||
arg = 50000;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_DRIVE_PUSH_PULL:
|
|
||||||
if (value & BUFCFG_OD_EN)
|
|
||||||
return -EINVAL;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
|
|
||||||
if (!(value & BUFCFG_OD_EN))
|
|
||||||
return -EINVAL;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_SLEW_RATE:
|
|
||||||
if (!(value & BUFCFG_SLEWSEL))
|
|
||||||
arg = 0;
|
|
||||||
else
|
|
||||||
arg = 1;
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
return -ENOTSUPP;
|
|
||||||
}
|
|
||||||
|
|
||||||
*config = pinconf_to_config_packed(param, arg);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int mofld_config_set_pin(struct mofld_pinctrl *mp, unsigned int pin,
|
|
||||||
unsigned long config)
|
|
||||||
{
|
|
||||||
unsigned int param = pinconf_to_config_param(config);
|
|
||||||
unsigned int arg = pinconf_to_config_argument(config);
|
|
||||||
u32 bits = 0, mask = 0;
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
switch (param) {
|
|
||||||
case PIN_CONFIG_BIAS_DISABLE:
|
|
||||||
mask |= BUFCFG_Px_EN_MASK | BUFCFG_PUPD_VAL_MASK;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_BIAS_PULL_UP:
|
|
||||||
mask |= BUFCFG_Px_EN_MASK | BUFCFG_PUPD_VAL_MASK;
|
|
||||||
bits |= BUFCFG_PU_EN;
|
|
||||||
|
|
||||||
switch (arg) {
|
|
||||||
case 50000:
|
|
||||||
bits |= BUFCFG_PUPD_VAL_50K << BUFCFG_PUPD_VAL_SHIFT;
|
|
||||||
break;
|
|
||||||
case 20000:
|
|
||||||
bits |= BUFCFG_PUPD_VAL_20K << BUFCFG_PUPD_VAL_SHIFT;
|
|
||||||
break;
|
|
||||||
case 2000:
|
|
||||||
bits |= BUFCFG_PUPD_VAL_2K << BUFCFG_PUPD_VAL_SHIFT;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
||||||
mask |= BUFCFG_Px_EN_MASK | BUFCFG_PUPD_VAL_MASK;
|
|
||||||
bits |= BUFCFG_PD_EN;
|
|
||||||
|
|
||||||
switch (arg) {
|
|
||||||
case 50000:
|
|
||||||
bits |= BUFCFG_PUPD_VAL_50K << BUFCFG_PUPD_VAL_SHIFT;
|
|
||||||
break;
|
|
||||||
case 20000:
|
|
||||||
bits |= BUFCFG_PUPD_VAL_20K << BUFCFG_PUPD_VAL_SHIFT;
|
|
||||||
break;
|
|
||||||
case 2000:
|
|
||||||
bits |= BUFCFG_PUPD_VAL_2K << BUFCFG_PUPD_VAL_SHIFT;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_DRIVE_PUSH_PULL:
|
|
||||||
mask |= BUFCFG_OD_EN;
|
|
||||||
bits &= ~BUFCFG_OD_EN;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
|
|
||||||
mask |= BUFCFG_OD_EN;
|
|
||||||
bits |= BUFCFG_OD_EN;
|
|
||||||
break;
|
|
||||||
|
|
||||||
case PIN_CONFIG_SLEW_RATE:
|
|
||||||
mask |= BUFCFG_SLEWSEL;
|
|
||||||
if (arg)
|
|
||||||
bits |= BUFCFG_SLEWSEL;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
raw_spin_lock_irqsave(&mp->lock, flags);
|
|
||||||
mofld_update_bufcfg(mp, pin, bits, mask);
|
|
||||||
raw_spin_unlock_irqrestore(&mp->lock, flags);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int mofld_config_set(struct pinctrl_dev *pctldev, unsigned int pin,
|
|
||||||
unsigned long *configs, unsigned int nconfigs)
|
|
||||||
{
|
|
||||||
struct mofld_pinctrl *mp = pinctrl_dev_get_drvdata(pctldev);
|
|
||||||
unsigned int i;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
if (!mofld_buf_available(mp, pin))
|
|
||||||
return -ENOTSUPP;
|
|
||||||
|
|
||||||
for (i = 0; i < nconfigs; i++) {
|
|
||||||
switch (pinconf_to_config_param(configs[i])) {
|
|
||||||
case PIN_CONFIG_BIAS_DISABLE:
|
|
||||||
case PIN_CONFIG_BIAS_PULL_UP:
|
|
||||||
case PIN_CONFIG_BIAS_PULL_DOWN:
|
|
||||||
case PIN_CONFIG_DRIVE_PUSH_PULL:
|
|
||||||
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
|
|
||||||
case PIN_CONFIG_SLEW_RATE:
|
|
||||||
ret = mofld_config_set_pin(mp, pin, configs[i]);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
return -ENOTSUPP;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int mofld_config_group_get(struct pinctrl_dev *pctldev, unsigned int group,
|
|
||||||
unsigned long *config)
|
|
||||||
{
|
|
||||||
const unsigned int *pins;
|
|
||||||
unsigned int npins;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = mofld_get_group_pins(pctldev, group, &pins, &npins);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
ret = mofld_config_get(pctldev, pins[0], config);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int mofld_config_group_set(struct pinctrl_dev *pctldev, unsigned int group,
|
|
||||||
unsigned long *configs, unsigned int num_configs)
|
|
||||||
{
|
|
||||||
const unsigned int *pins;
|
|
||||||
unsigned int npins;
|
|
||||||
int i, ret;
|
|
||||||
|
|
||||||
ret = mofld_get_group_pins(pctldev, group, &pins, &npins);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
for (i = 0; i < npins; i++) {
|
|
||||||
ret = mofld_config_set(pctldev, pins[i], configs, num_configs);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct pinconf_ops mofld_pinconf_ops = {
|
|
||||||
.is_generic = true,
|
|
||||||
.pin_config_get = mofld_config_get,
|
|
||||||
.pin_config_set = mofld_config_set,
|
|
||||||
.pin_config_group_get = mofld_config_group_get,
|
|
||||||
.pin_config_group_set = mofld_config_group_set,
|
|
||||||
};
|
|
||||||
|
|
||||||
static const struct pinctrl_desc mofld_pinctrl_desc = {
|
|
||||||
.pctlops = &mofld_pinctrl_ops,
|
|
||||||
.pmxops = &mofld_pinmux_ops,
|
|
||||||
.confops = &mofld_pinconf_ops,
|
|
||||||
.owner = THIS_MODULE,
|
|
||||||
};
|
|
||||||
|
|
||||||
static int mofld_pinctrl_probe(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct device *dev = &pdev->dev;
|
|
||||||
struct mofld_family *families;
|
|
||||||
struct mofld_pinctrl *mp;
|
|
||||||
void __iomem *regs;
|
|
||||||
size_t nfamilies;
|
|
||||||
unsigned int i;
|
|
||||||
|
|
||||||
mp = devm_kzalloc(dev, sizeof(*mp), GFP_KERNEL);
|
|
||||||
if (!mp)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
mp->dev = dev;
|
|
||||||
raw_spin_lock_init(&mp->lock);
|
|
||||||
|
|
||||||
regs = devm_platform_ioremap_resource(pdev, 0);
|
|
||||||
if (IS_ERR(regs))
|
|
||||||
return PTR_ERR(regs);
|
|
||||||
|
|
||||||
nfamilies = ARRAY_SIZE(mofld_families),
|
|
||||||
families = devm_kmemdup(dev, mofld_families, sizeof(mofld_families), GFP_KERNEL);
|
|
||||||
if (!families)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
/* Splice memory resource by chunk per family */
|
|
||||||
for (i = 0; i < nfamilies; i++) {
|
|
||||||
struct mofld_family *family = &families[i];
|
|
||||||
|
|
||||||
family->regs = regs + family->barno * MOFLD_FAMILY_LEN;
|
|
||||||
}
|
|
||||||
|
|
||||||
mp->families = families;
|
|
||||||
mp->nfamilies = nfamilies;
|
|
||||||
mp->pctldesc = mofld_pinctrl_desc;
|
|
||||||
mp->pctldesc.name = dev_name(dev);
|
|
||||||
mp->pctldesc.pins = mofld_pins;
|
|
||||||
mp->pctldesc.npins = ARRAY_SIZE(mofld_pins);
|
|
||||||
|
|
||||||
mp->pctldev = devm_pinctrl_register(dev, &mp->pctldesc, mp);
|
|
||||||
if (IS_ERR(mp->pctldev))
|
|
||||||
return PTR_ERR(mp->pctldev);
|
|
||||||
|
|
||||||
platform_set_drvdata(pdev, mp);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static const struct acpi_device_id mofld_acpi_table[] = {
|
static const struct acpi_device_id mofld_acpi_table[] = {
|
||||||
{ "INTC1003" },
|
{ "INTC1003", (kernel_ulong_t)&mofld_soc_data },
|
||||||
{ }
|
{ }
|
||||||
};
|
};
|
||||||
MODULE_DEVICE_TABLE(acpi, mofld_acpi_table);
|
MODULE_DEVICE_TABLE(acpi, mofld_acpi_table);
|
||||||
|
|
||||||
static struct platform_driver mofld_pinctrl_driver = {
|
static struct platform_driver mofld_pinctrl_driver = {
|
||||||
.probe = mofld_pinctrl_probe,
|
.probe = devm_tng_pinctrl_probe,
|
||||||
.driver = {
|
.driver = {
|
||||||
.name = "pinctrl-moorefield",
|
.name = "pinctrl-moorefield",
|
||||||
.acpi_match_table = mofld_acpi_table,
|
.acpi_match_table = mofld_acpi_table,
|
||||||
|
|
@ -924,3 +341,4 @@ MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");
|
||||||
MODULE_DESCRIPTION("Intel Moorefield SoC pinctrl driver");
|
MODULE_DESCRIPTION("Intel Moorefield SoC pinctrl driver");
|
||||||
MODULE_LICENSE("GPL v2");
|
MODULE_LICENSE("GPL v2");
|
||||||
MODULE_ALIAS("platform:pinctrl-moorefield");
|
MODULE_ALIAS("platform:pinctrl-moorefield");
|
||||||
|
MODULE_IMPORT_NS(PINCTRL_TANGIER);
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue
Block a user