sound updates for 6.1-rc1

Majority of changes at this PR are ASoC drivers (SOF, Intel, AMD,
 Mediatek, Qualcomm, TI, Apple Silicon, etc), while we see a few
 small fixes in ALSA / ASoC core side, too.
 
 Here are highlights:
 
 Core:
 - A new string helper parse_int_array_user() and cleanups with it
 - Continued cleanup of memory allocation helpers
 - PCM core optimization and hardening
 - Continued ASoC core code cleanups
 
 ASoC:
 - Improvements to the SOF IPC4 code, especially around trace
 - Support for AMD Rembrant DSPs, AMD Pink Sardine ACP 6.2, Apple
   Silicon systems, Everest ES8326, Intel Sky Lake and Kaby Lake,
   Mediatek MT8186 support, NXP i.MX8ULP DSPs, Qualcomm SC8280XP,
   SM8250 and SM8450 and Texas Instruments SRC4392
 
 HD- and USB-audio:
 - Cleanups for unification of hda-ext bus
 - HD-audio HDMI codec driver cleanups
 - Continued endpoint management fixes for USB-audio
 - New quirks as usual
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Merge tag 'sound-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "The majority of changes are ASoC drivers (SOF, Intel, AMD, Mediatek,
  Qualcomm, TI, Apple Silicon, etc), while we see a few small fixes in
  ALSA / ASoC core side, too.

  Here are highlights:

  Core:
   - A new string helper parse_int_array_user() and cleanups with it
   - Continued cleanup of memory allocation helpers
   - PCM core optimization and hardening
   - Continued ASoC core code cleanups

  ASoC:
   - Improvements to the SOF IPC4 code, especially around trace
   - Support for AMD Rembrant DSPs, AMD Pink Sardine ACP 6.2, Apple
     Silicon systems, Everest ES8326, Intel Sky Lake and Kaby Lake,
     Mediatek MT8186 support, NXP i.MX8ULP DSPs, Qualcomm SC8280XP,
     SM8250 and SM8450 and Texas Instruments SRC4392

  HD- and USB-audio:
   - Cleanups for unification of hda-ext bus
   - HD-audio HDMI codec driver cleanups
   - Continued endpoint management fixes for USB-audio
   - New quirks as usual"

* tag 'sound-6.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (422 commits)
  ALSA: hda: Fix position reporting on Poulsbo
  ALSA: hda/hdmi: Don't skip notification handling during PM operation
  ASoC: rockchip: i2s: use regmap_read_poll_timeout_atomic to poll I2S_CLR
  ASoC: dt-bindings: Document audio OF graph dai-tdm-slot-num dai-tdm-slot-width props
  ASoC: qcom: fix unmet direct dependencies for SND_SOC_QDSP6
  ALSA: usb-audio: Fix potential memory leaks
  ALSA: usb-audio: Fix NULL dererence at error path
  ASoC: mediatek: mt8192-mt6359: Set the driver name for the card
  ALSA: hda/realtek: More robust component matching for CS35L41
  ASoC: Intel: sof_rt5682: remove SOF_RT1015_SPEAKER_AMP_100FS flag
  ASoC: nau8825: Add TDM support
  ASoC: core: clarify the driver name initialization
  ASoC: mt6660: Fix PM disable depth imbalance in mt6660_i2c_probe
  ASoC: wm5102: Fix PM disable depth imbalance in wm5102_probe
  ASoC: wm5110: Fix PM disable depth imbalance in wm5110_probe
  ASoC: wm8997: Fix PM disable depth imbalance in wm8997_probe
  ASoC: wcd-mbhc-v2: Revert "ASoC: wcd-mbhc-v2: use pm_runtime_resume_and_get()"
  ASoC: mediatek: mt8186: Fix spelling mistake "slect" -> "select"
  ALSA: hda/realtek: Add quirk for HP Zbook Firefly 14 G9 model
  ALSA: asihpi - Remove unused struct hpi_subsys_response
  ...
This commit is contained in:
Linus Torvalds 2022-10-05 12:02:07 -07:00
commit 833477fce7
383 changed files with 14508 additions and 3441 deletions

View File

@ -20,6 +20,7 @@ properties:
- fsl,imx8qxp-dsp
- fsl,imx8qm-dsp
- fsl,imx8mp-dsp
- fsl,imx8ulp-dsp
- fsl,imx8qxp-hifi4
- fsl,imx8qm-hifi4
- fsl,imx8mp-hifi4

View File

@ -20,6 +20,9 @@ properties:
- qcom,apr-v2
- qcom,gpr
power-domains:
maxItems: 1
qcom,apr-domain:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2, 3, 4, 5, 6, 7]
@ -52,6 +55,26 @@ properties:
2 = Audio DSP Domain
3 = Application Processor Domain
qcom,glink-channels:
$ref: /schemas/types.yaml#/definitions/string-array
description: Channel name used for the communication
items:
- const: apr_audio_svc
qcom,intents:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
List of (size, amount) pairs describing what intents should be
preallocated for this virtual channel. This can be used to tweak the
default intents available for the channel to meet expectations of the
remote.
qcom,smd-channels:
$ref: /schemas/types.yaml#/definitions/string-array
description: Channel name used for the communication
items:
- const: apr_audio_svc
'#address-cells':
const: 1
@ -97,6 +120,26 @@ patternProperties:
3 = AMDB Service.
4 = Voice processing manager.
clock-controller:
$ref: /schemas/sound/qcom,q6dsp-lpass-clocks.yaml#
description: Qualcomm DSP LPASS clock controller
unevaluatedProperties: false
dais:
type: object
oneOf:
- $ref: /schemas/sound/qcom,q6apm-dai.yaml#
- $ref: /schemas/sound/qcom,q6dsp-lpass-ports.yaml#
- $ref: /schemas/sound/qcom,q6asm-dais.yaml#
unevaluatedProperties: false
description: Qualcomm DSP audio ports
routing:
type: object
$ref: /schemas/sound/qcom,q6adm-routing.yaml#
unevaluatedProperties: false
description: Qualcomm DSP LPASS audio routing
qcom,protection-domain:
$ref: /schemas/types.yaml#/definitions/string-array
description: protection domain service name and path for apr service
@ -107,17 +150,44 @@ patternProperties:
"tms/servreg", "msm/modem/wlan_pd".
"tms/servreg", "msm/slpi/sensor_pd".
'#address-cells':
const: 1
allOf:
- if:
properties:
compatible:
enum:
- qcom,q6afe
then:
properties:
dais:
properties:
compatible:
const: qcom,q6afe-dais
'#size-cells':
const: 0
- if:
properties:
compatible:
enum:
- qcom,q6apm
then:
properties:
dais:
properties:
compatible:
enum:
- qcom,q6apm-dais
- qcom,q6apm-lpass-dais
patternProperties:
"^.*@[0-9a-f]+$":
type: object
description:
Service based devices like clock controllers or digital audio interfaces.
- if:
properties:
compatible:
enum:
- qcom,q6asm
then:
properties:
dais:
properties:
compatible:
const: qcom,q6asm-dais
additionalProperties: false
@ -125,6 +195,30 @@ required:
- compatible
- qcom,domain
allOf:
- if:
properties:
compatible:
enum:
- qcom,gpr
then:
properties:
power-domains: false
- if:
required:
- qcom,glink-channels
then:
properties:
qcom,smd-channels: false
- if:
required:
- qcom,smd-channels
then:
properties:
qcom,glink-channels: false
additionalProperties: false
examples:

View File

@ -78,6 +78,40 @@ properties:
interleaved on a single output channel.
type: boolean
adi,dmon-stuck-enable:
description:
Enables the "data monitor stuck" feature. Once the data monitor is
enabled, it actively monitors the selected input data (from DIN) to the
speaker amplifier. Once a data error is detected, the data monitor
automatically places the device into software shutdown.
type: boolean
adi,dmon-stuck-threshold-bits:
description:
Sets the threshold for the "data monitor stuck" feature, in bits.
enum: [9, 11, 13, 15]
default: 15
adi,dmon-magnitude-enable:
description:
Enables the "data monitor magnitude" feature. Once the data monitor is
enabled, it actively monitors the selected input data (from DIN) to the
speaker amplifier. Once a data error is detected, the data monitor
automatically places the device into software shutdown.
type: boolean
adi,dmon-magnitude-threshold-bits:
description:
Sets the threshold for the "data monitor magnitude" feature, in bits.
enum: [2, 3, 4, 5]
default: 5
adi,dmon-duration-ms:
description:
Sets the duration for the "data monitor" feature, in milliseconds.
enum: [64, 256, 1024, 4096]
default: 64
reset-gpios:
maxItems: 1

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@ -0,0 +1,79 @@
# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/allwinner,sun50i-h6-dmic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Allwinner H6 DMIC
maintainers:
- Ban Tao <fengzheng923@gmail.com>
properties:
compatible:
const: allwinner,sun50i-h6-dmic
"#sound-dai-cells":
const: 0
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
items:
- description: Bus Clock
- description: Module Clock
clock-names:
items:
- const: bus
- const: mod
dmas:
items:
- description: RX DMA Channel
dma-names:
items:
- const: rx
resets:
maxItems: 1
required:
- "#sound-dai-cells"
- compatible
- reg
- interrupts
- clocks
- clock-names
- dmas
- dma-names
- resets
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/sun50i-h6-ccu.h>
#include <dt-bindings/reset/sun50i-h6-ccu.h>
dmic: dmic@5095000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-h6-dmic";
reg = <0x05095000 0x400>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_DMIC>, <&ccu CLK_DMIC>;
clock-names = "bus", "mod";
dmas = <&dma 7>;
dma-names = "rx";
resets = <&ccu RST_BUS_DMIC>;
};
...

View File

@ -40,6 +40,7 @@ properties:
patternProperties:
"^dai-link-[0-9]+$":
type: object
additionalProperties: false
description: |-
dai-link child nodes:
Container for dai-link level properties and the CODEC sub-nodes.
@ -63,6 +64,7 @@ patternProperties:
patternProperties:
"^codec-[0-9]+$":
type: object
additionalProperties: false
description: |-
Codecs:
dai-link representing backend links should have at least one subnode.

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@ -0,0 +1,131 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/apple,mca.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple MCA I2S transceiver
description: |
MCA is an I2S transceiver peripheral found on M1 and other Apple chips. It is
composed of a number of identical clusters which can operate independently
or in an interlinked fashion. Up to 6 clusters have been seen on an MCA.
maintainers:
- Martin Povišer <povik+lin@cutebit.org>
properties:
compatible:
items:
- enum:
- apple,t6000-mca
- apple,t8103-mca
- const: apple,mca
reg:
items:
- description: Register region of the MCA clusters proper
- description: Register region of the DMA glue and its FIFOs
interrupts:
minItems: 4
maxItems: 6
description:
One interrupt per each cluster
'#address-cells':
const: 1
'#size-cells':
const: 0
dmas:
minItems: 16
maxItems: 24
description:
DMA channels corresponding to the SERDES units in the peripheral. They are
listed in groups of four per cluster, and within the group they are given
as associated to the TXA, RXA, TXB, RXB units.
dma-names:
minItems: 16
items:
- const: tx0a
- const: rx0a
- const: tx0b
- const: rx0b
- const: tx1a
- const: rx1a
- const: tx1b
- const: rx1b
- const: tx2a
- const: rx2a
- const: tx2b
- const: rx2b
- const: tx3a
- const: rx3a
- const: tx3b
- const: rx3b
- const: tx4a
- const: rx4a
- const: tx4b
- const: rx4b
- const: tx5a
- const: rx5a
- const: tx5b
- const: rx5b
description: |
Names for the DMA channels: 'tx'/'rx', then cluster number, then 'a'/'b'
based on the associated SERDES unit.
clocks:
minItems: 4
maxItems: 6
description:
Clusters' input reference clock.
resets:
maxItems: 1
power-domains:
minItems: 5
maxItems: 7
description:
First a general power domain for register access, then the power
domains of individual clusters for their operation.
'#sound-dai-cells':
const: 1
required:
- compatible
- reg
- dmas
- dma-names
- clocks
- power-domains
- '#sound-dai-cells'
additionalProperties: false
examples:
- |
mca: i2s@9b600000 {
compatible = "apple,t6000-mca", "apple,mca";
reg = <0x9b600000 0x10000>,
<0x9b200000 0x20000>;
clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>;
power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>,
<&ps_mca2>, <&ps_mca3>;
dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>,
<&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>,
<&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>,
<&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>;
dma-names = "tx0a", "rx0a", "tx0b", "rx0b",
"tx1a", "rx1a", "tx1b", "rx1b",
"tx2a", "rx2a", "tx2b", "rx2b",
"tx3a", "rx3a", "tx3b", "rx3b";
#sound-dai-cells = <1>;
};

View File

@ -19,14 +19,17 @@ properties:
description: "device name prefix"
$ref: /schemas/types.yaml#/definitions/string
convert-rate:
description: CPU to Codec rate convert.
$ref: /schemas/types.yaml#/definitions/uint32
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
convert-channels:
description: CPU to Codec rate channels.
$ref: /schemas/types.yaml#/definitions/uint32
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
convert-sample-format:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
patternProperties:
"^endpoint(@[0-9a-f]+)?":
$ref: /schemas/graph.yaml#/$defs/endpoint-base
unevaluatedProperties: false
properties:
mclk-fs:
description: |
@ -65,12 +68,18 @@ patternProperties:
- msb
- lsb
convert-rate:
description: CPU to Codec rate convert.
$ref: /schemas/types.yaml#/definitions/uint32
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
convert-channels:
description: CPU to Codec rate channels.
$ref: /schemas/types.yaml#/definitions/uint32
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
convert-sample-format:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
dai-tdm-slot-num:
description: Number of slots in use.
$ref: /schemas/types.yaml#/definitions/uint32
dai-tdm-slot-width:
description: Width in bits for each slot.
$ref: /schemas/types.yaml#/definitions/uint32
dai-tdm-slot-width-map:
description: Mapping of sample widths to slot widths. For hardware
that cannot support a fixed slot width or a slot width always

View File

@ -27,11 +27,12 @@ properties:
description: User specified audio sound widgets.
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
convert-rate:
description: CPU to Codec rate convert.
$ref: /schemas/types.yaml#/definitions/uint32
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-rate"
convert-channels:
description: CPU to Codec rate channels.
$ref: /schemas/types.yaml#/definitions/uint32
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-channels"
convert-sample-format:
$ref: "/schemas/sound/dai-params.yaml#/$defs/dai-sample-format"
pa-gpios:
maxItems: 1
hp-det-gpio:

View File

@ -19,6 +19,7 @@ properties:
compatible:
enum:
- cirrus,cs42l42
- cirrus,cs42l83
reg:
description:

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@ -0,0 +1,40 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/dai-params.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Digital Audio Interface (DAI) Stream Parameters
maintainers:
- Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
select: false
$defs:
dai-channels:
description: Number of audio channels used by DAI
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 1
maximum: 32
dai-sample-format:
description: Audio sample format used by DAI
$ref: /schemas/types.yaml#/definitions/string
enum:
- s8
- s16_le
- s24_le
- s24_3le
- s32_le
dai-sample-rate:
description: Audio sample rate used by DAI
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 8000
maximum: 192000
properties: {}
additionalProperties: true

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@ -0,0 +1,116 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/everest,es8326.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Everest ES8326 audio CODEC
maintainers:
- David Yang <yangxiaohua@everest-semi.com>
properties:
compatible:
const: everest,es8326
reg:
maxItems: 1
clocks:
items:
- description: clock for master clock (MCLK)
clock-names:
items:
- const: mclk
"#sound-dai-cells":
const: 0
everest,jack-pol:
$ref: /schemas/types.yaml#/definitions/uint8
description: |
just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
Bit(2) decides whether the button on the headset is inverted.
Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto.
minimum: 0x00
maximum: 0x0f
default: 0x0f
everest,mic1-src:
$ref: /schemas/types.yaml#/definitions/uint8
description:
the value of reg 2A when headset plugged.
minimum: 0x00
maximum: 0x77
default: 0x22
everest,mic2-src:
$ref: /schemas/types.yaml#/definitions/uint8
description:
the value of reg 2A when headset unplugged.
minimum: 0x00
maximum: 0x77
default: 0x44
everest,jack-detect-inverted:
$ref: /schemas/types.yaml#/definitions/flag
description:
Defined to invert the jack detection.
everest,interrupt-src:
$ref: /schemas/types.yaml#/definitions/uint8
description: |
value of reg 0x58, Defines the interrupt source.
Bit(2) 1 means button press triggers irq, 0 means not.
Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,
bias change on PIN9 do not triggers irq.
Bit(4) 1 means PIN27 is the irq source for jack detection.
Bit(5) 1 means PIN9 is the irq source after MIC detect.
Bit(6) 1 means PIN27 is the irq source after MIC detect.
minimum: 0
maximum: 0x3c
default: 0x08
everest,interrupt-clk:
$ref: /schemas/types.yaml#/definitions/uint8
description: |
value of reg 0x59, Defines the interrupt output behavior.
Bit(0-3) 0 means irq pulse equals 512*internal clock
1 means irq pulse equals 1024*internal clock
2 means ...
7 means irq pulse equals 65536*internal clock
8 means irq mutes PA
9 means irq mutes PA and DAC output
Bit(4) 1 means we invert the interrupt output.
Bit(6) 1 means the chip do not detect jack type after button released.
0 means the chip detect jack type again after button released.
minimum: 0
maximum: 0x7f
default: 0x45
required:
- compatible
- reg
- "#sound-dai-cells"
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
es8326: codec@19 {
compatible = "everest,es8326";
reg = <0x19>;
clocks = <&clks 10>;
clock-names = "mclk";
#sound-dai-cells = <0>;
everest,mic1-src = [22];
everest,mic2-src = [44];
everest,jack-pol = [0e];
everest,interrupt-src = [08];
everest,interrupt-clk = [45];
};
};

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@ -0,0 +1,216 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/fsl,sai.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale Synchronous Audio Interface (SAI).
maintainers:
- Shengjiu Wang <shengjiu.wang@nxp.com>
description: |
The SAI is based on I2S module that used communicating with audio codecs,
which provides a synchronous audio interface that supports fullduplex
serial interfaces with frame synchronization such as I2S, AC97, TDM, and
codec/DSP interfaces.
properties:
compatible:
oneOf:
- enum:
- fsl,vf610-sai
- fsl,imx6sx-sai
- fsl,imx6ul-sai
- fsl,imx7ulp-sai
- fsl,imx8mq-sai
- fsl,imx8qm-sai
- fsl,imx8ulp-sai
- items:
- enum:
- fsl,imx8mm-sai
- fsl,imx8mn-sai
- fsl,imx8mp-sai
- const: fsl,imx8mq-sai
reg:
maxItems: 1
interrupts:
items:
- description: receive and transmit interrupt
dmas:
maxItems: 2
dma-names:
maxItems: 2
clocks:
items:
- description: The ipg clock for register access
- description: master clock source 0 (obsoleted)
- description: master clock source 1
- description: master clock source 2
- description: master clock source 3
- description: PLL clock source for 8kHz series
- description: PLL clock source for 11kHz series
minItems: 4
clock-names:
oneOf:
- items:
- const: bus
- const: mclk0
- const: mclk1
- const: mclk2
- const: mclk3
- const: pll8k
- const: pll11k
minItems: 4
- items:
- const: bus
- const: mclk1
- const: mclk2
- const: mclk3
- const: pll8k
- const: pll11k
minItems: 4
lsb-first:
description: |
Configures whether the LSB or the MSB is transmitted
first for the fifo data. If this property is absent,
the MSB is transmitted first as default, or the LSB
is transmitted first.
type: boolean
big-endian:
description: |
required if all the SAI registers are big-endian rather than little-endian.
type: boolean
fsl,sai-synchronous-rx:
description: |
SAI will work in the synchronous mode (sync Tx with Rx) which means
both the transmitter and the receiver will send and receive data by
following receiver's bit clocks and frame sync clocks.
type: boolean
fsl,sai-asynchronous:
description: |
SAI will work in the asynchronous mode, which means both transmitter
and receiver will send and receive data by following their own bit clocks
and frame sync clocks separately.
If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
default synchronous mode (sync Rx with Tx) will be used, which means both
transmitter and receiver will send and receive data by following clocks
of transmitter.
type: boolean
fsl,dataline:
$ref: /schemas/types.yaml#/definitions/uint32-matrix
description: |
Configure the dataline. It has 3 value for each configuration
maxItems: 16
items:
items:
- description: format Default(0), I2S(1) or PDM(2)
enum: [0, 1, 2]
- description: dataline mask for 'rx'
- description: dataline mask for 'tx'
fsl,sai-mclk-direction-output:
description: SAI will output the SAI MCLK clock.
type: boolean
fsl,shared-interrupt:
description: Interrupt is shared with other modules.
type: boolean
"#sound-dai-cells":
const: 0
description: optional, some dts node didn't add it.
allOf:
- if:
properties:
compatible:
contains:
const: fsl,vf610-sai
then:
properties:
dmas:
items:
- description: DMA controller phandle and request line for TX
- description: DMA controller phandle and request line for RX
dma-names:
items:
- const: tx
- const: rx
else:
properties:
dmas:
items:
- description: DMA controller phandle and request line for RX
- description: DMA controller phandle and request line for TX
dma-names:
items:
- const: rx
- const: tx
- if:
required:
- fsl,sai-asynchronous
then:
properties:
fsl,sai-synchronous-rx: false
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/vf610-clock.h>
sai2: sai@40031000 {
compatible = "fsl,vf610-sai";
reg = <0x40031000 0x1000>;
interrupts = <86 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2_1>;
clocks = <&clks VF610_CLK_PLATFORM_BUS>,
<&clks VF610_CLK_SAI2>,
<&clks 0>, <&clks 0>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <&edma0 0 21>,
<&edma0 0 20>;
big-endian;
lsb-first;
};
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imx8mm-clock.h>
sai1: sai@30010000 {
compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
reg = <0x30010000 0x10000>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_SAI1_IPG>,
<&clk IMX8MM_CLK_DUMMY>,
<&clk IMX8MM_CLK_SAI1_ROOT>,
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
dmas = <&sdma2 0 2 0>, <&sdma2 1 2 0>;
dma-names = "rx", "tx";
fsl,dataline = <1 0xff 0xff 2 0xff 0x11>;
#sound-dai-cells = <0>;
};

View File

@ -1,95 +0,0 @@
Freescale Synchronous Audio Interface (SAI).
The SAI is based on I2S module that used communicating with audio codecs,
which provides a synchronous audio interface that supports fullduplex
serial interfaces with frame synchronization such as I2S, AC97, TDM, and
codec/DSP interfaces.
Required properties:
- compatible : Compatible list, contains "fsl,vf610-sai",
"fsl,imx6sx-sai", "fsl,imx6ul-sai",
"fsl,imx7ulp-sai", "fsl,imx8mq-sai",
"fsl,imx8qm-sai", "fsl,imx8mm-sai",
"fsl,imx8mn-sai", "fsl,imx8mp-sai", or
"fsl,imx8ulp-sai".
- reg : Offset and length of the register set for the device.
- clocks : Must contain an entry for each entry in clock-names.
- clock-names : Must include the "bus" for register access and
"mclk1", "mclk2", "mclk3" for bit clock and frame
clock providing.
"pll8k", "pll11k" are optional, they are the clock
source for root clock, one is for 8kHz series rates
another one is for 11kHz series rates.
- dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
- dma-names : Two dmas have to be defined, "tx" and "rx".
- pinctrl-names : Must contain a "default" entry.
- pinctrl-NNN : One property must exist for each entry in
pinctrl-names. See ../pinctrl/pinctrl-bindings.txt
for details of the property values.
- lsb-first : Configures whether the LSB or the MSB is transmitted
first for the fifo data. If this property is absent,
the MSB is transmitted first as default, or the LSB
is transmitted first.
- fsl,sai-synchronous-rx: This is a boolean property. If present, indicating
that SAI will work in the synchronous mode (sync Tx
with Rx) which means both the transmitter and the
receiver will send and receive data by following
receiver's bit clocks and frame sync clocks.
- fsl,sai-asynchronous: This is a boolean property. If present, indicating
that SAI will work in the asynchronous mode, which
means both transmitter and receiver will send and
receive data by following their own bit clocks and
frame sync clocks separately.
- fsl,dataline : configure the dataline. it has 3 value for each configuration
first one means the type: I2S(1) or PDM(2)
second one is dataline mask for 'rx'
third one is dataline mask for 'tx'.
for example: fsl,dataline = <1 0xff 0xff 2 0xff 0x11>;
it means I2S type rx mask is 0xff, tx mask is 0xff, PDM type
rx mask is 0xff, tx mask is 0x11 (dataline 1 and 4 enabled).
Optional properties:
- big-endian : Boolean property, required if all the SAI
registers are big-endian rather than little-endian.
Optional properties (for mx6ul):
- fsl,sai-mclk-direction-output: This is a boolean property. If present,
indicates that SAI will output the SAI MCLK clock.
Note:
- If both fsl,sai-asynchronous and fsl,sai-synchronous-rx are absent, the
default synchronous mode (sync Rx with Tx) will be used, which means both
transmitter and receiver will send and receive data by following clocks
of transmitter.
- fsl,sai-asynchronous and fsl,sai-synchronous-rx are exclusive.
Example:
sai2: sai@40031000 {
compatible = "fsl,vf610-sai";
reg = <0x40031000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2_1>;
clocks = <&clks VF610_CLK_PLATFORM_BUS>,
<&clks VF610_CLK_SAI2>,
<&clks 0>, <&clks 0>;
clock-names = "bus", "mclk1", "mclk2", "mclk3";
dma-names = "tx", "rx";
dmas = <&edma0 0 VF610_EDMA_MUXID0_SAI2_TX>,
<&edma0 0 VF610_EDMA_MUXID0_SAI2_RX>;
big-endian;
lsb-first;
};

View File

@ -61,6 +61,8 @@ patternProperties:
cpu:
description: Holds subnode which indicates cpu dai.
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
@ -68,6 +70,8 @@ patternProperties:
codec:
description: Holds subnode which indicates codec dai.
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1

View File

@ -58,6 +58,7 @@ patternProperties:
cpu:
description: Holds subnode which indicates cpu dai.
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
@ -65,6 +66,7 @@ patternProperties:
codec:
description: Holds subnode which indicates codec dai.
type: object
additionalProperties: false
properties:
sound-dai:
minItems: 1

View File

@ -43,6 +43,16 @@ properties:
required:
- sound-dai
mediatek,adsp:
$ref: /schemas/types.yaml#/definitions/phandle
description: The phandle of MT8186 ADSP platform.
mediatek,dai-link:
$ref: /schemas/types.yaml#/definitions/string-array
description:
A list of the desired dai-links in the sound card. Each entry is a
name defined in the machine driver.
additionalProperties: false
required:

View File

@ -43,6 +43,16 @@ properties:
required:
- sound-dai
mediatek,adsp:
$ref: /schemas/types.yaml#/definitions/phandle
description: The phandle of MT8186 ADSP platform.
mediatek,dai-link:
$ref: /schemas/types.yaml#/definitions/string-array
description:
A list of the desired dai-links in the sound card. Each entry is a
name defined in the machine driver.
additionalProperties: false
required:

View File

@ -30,6 +30,8 @@ properties:
headset-codec:
type: object
additionalProperties: false
properties:
sound-dai:
$ref: /schemas/types.yaml#/definitions/phandle
@ -38,6 +40,8 @@ properties:
speaker-codecs:
type: object
additionalProperties: false
properties:
sound-dai:
minItems: 1

View File

@ -71,6 +71,9 @@ Optional properties:
- nuvoton,crosstalk-enable: make crosstalk function enable if set.
- nuvoton,adcout-drive-strong: make the drive strength of ADCOUT IO PIN strong if set.
Otherwise, the drive keeps normal strength.
- clocks: list of phandle and clock specifier pairs according to common clock bindings for the
clocks described in clock-names
- clock-names: should include "mclk" for the MCLK master clock

View File

@ -14,6 +14,8 @@ properties:
enum:
- qcom,sc7280-lpass-rx-macro
- qcom,sm8250-lpass-rx-macro
- qcom,sm8450-lpass-rx-macro
- qcom,sc8280xp-lpass-rx-macro
reg:
maxItems: 1

View File

@ -14,6 +14,8 @@ properties:
enum:
- qcom,sc7280-lpass-tx-macro
- qcom,sm8250-lpass-tx-macro
- qcom,sm8450-lpass-tx-macro
- qcom,sc8280xp-lpass-tx-macro
reg:
maxItems: 1

View File

@ -14,6 +14,8 @@ properties:
enum:
- qcom,sc7280-lpass-va-macro
- qcom,sm8250-lpass-va-macro
- qcom,sm8450-lpass-va-macro
- qcom,sc8280xp-lpass-va-macro
reg:
maxItems: 1

View File

@ -14,6 +14,8 @@ properties:
enum:
- qcom,sc7280-lpass-wsa-macro
- qcom,sm8250-lpass-wsa-macro
- qcom,sm8450-lpass-wsa-macro
- qcom,sc8280xp-lpass-wsa-macro
reg:
maxItems: 1

View File

@ -0,0 +1,52 @@
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/qcom,q6adm-routing.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Audio Device Manager (Q6ADM) routing
maintainers:
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
description:
Qualcomm Audio Device Manager (Q6ADM) routing node represents routing
specific configuration.
properties:
compatible:
enum:
- qcom,q6adm-routing
"#sound-dai-cells":
const: 0
required:
- compatible
- "#sound-dai-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/soc/qcom,apr.h>
#include <dt-bindings/sound/qcom,q6asm.h>
apr {
compatible = "qcom,apr-v2";
qcom,domain = <APR_DOMAIN_ADSP>;
#address-cells = <1>;
#size-cells = <0>;
service@8 {
compatible = "qcom,q6adm";
reg = <APR_SVC_ADM>;
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
routing {
compatible = "qcom,q6adm-routing";
#sound-dai-cells = <0>;
};
};
};

View File

@ -1,39 +0,0 @@
Qualcomm Audio Device Manager (Q6ADM) binding
Q6ADM is one of the APR audio service on Q6DSP.
Please refer to qcom,apr.txt for details of the coommon apr service bindings
used by the apr service device.
- but must contain the following property:
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,q6adm-v<MAJOR-NUMBER>.<MINOR-NUMBER>".
Or "qcom,q6adm" where the version number can be queried
from DSP.
example "qcom,q6adm-v2.0"
= ADM routing
"routing" subnode of the ADM node represents adm routing specific configuration
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,q6adm-routing".
- #sound-dai-cells
Usage: required
Value type: <u32>
Definition: Must be 0
= EXAMPLE
apr-service@8 {
compatible = "qcom,q6adm";
reg = <APR_SVC_ADM>;
q6routing: routing {
compatible = "qcom,q6adm-routing";
#sound-dai-cells = <0>;
};
};

View File

@ -1,20 +0,0 @@
Qualcomm Audio Front End (Q6AFE) binding
AFE is one of the APR audio service on Q6DSP
Please refer to qcom,apr.txt for details of the common apr service bindings
used by all apr services. Must contain the following properties.
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,q6afe-v<MAJOR-NUMBER>.<MINOR-NUMBER>"
Or "qcom,q6afe" where the version number can be queried
from DSP.
example "qcom,q6afe"
= EXAMPLE
apr-service@4 {
compatible = "qcom,q6afe";
reg = <APR_SVC_AFE>;
};

View File

@ -16,16 +16,12 @@ properties:
compatible:
const: qcom,q6apm-dais
reg:
maxItems: 1
iommus:
maxItems: 1
required:
- compatible
- iommus
- reg
additionalProperties: false
@ -37,17 +33,14 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
service@1 {
compatible = "qcom,q6apm";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
apm-dai@1 {
compatible = "qcom,q6apm-dais";
iommus = <&apps_smmu 0x1801 0x0>;
compatible = "qcom,q6apm";
reg = <1>;
};
dais {
compatible = "qcom,q6apm-dais";
iommus = <&apps_smmu 0x1801 0x0>;
};
};
};

View File

@ -0,0 +1,112 @@
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/qcom,q6asm-dais.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Audio Stream Manager (Q6ASM)
maintainers:
- Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
description:
Q6ASM is one of the APR audio services on Q6DSP. Each of its subnodes
represent a dai with board specific configuration.
properties:
compatible:
enum:
- qcom,q6asm-dais
iommus:
maxItems: 1
"#sound-dai-cells":
const: 1
"#address-cells":
const: 1
"#size-cells":
const: 0
patternProperties:
"^dai@[0-9]+$":
type: object
description:
Q6ASM Digital Audio Interface
properties:
reg:
maxItems: 1
direction:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2]
description: |
The direction of the dai stream::
- Q6ASM_DAI_TX_RX (0) for both tx and rx
- Q6ASM_DAI_TX (1) for only tx (Capture/Encode)
- Q6ASM_DAI_RX (2) for only rx (Playback/Decode)
is-compress-dai:
type: boolean
description:
Compress offload dai.
dependencies:
is-compress-dai: ["direction"]
required:
- reg
additionalProperties: false
required:
- compatible
- "#sound-dai-cells"
- "#address-cells"
- "#size-cells"
additionalProperties: false
examples:
- |
#include <dt-bindings/soc/qcom,apr.h>
#include <dt-bindings/sound/qcom,q6asm.h>
apr {
compatible = "qcom,apr-v2";
qcom,domain = <APR_DOMAIN_ADSP>;
#address-cells = <1>;
#size-cells = <0>;
service@7 {
compatible = "qcom,q6asm";
reg = <APR_SVC_ASM>;
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
dais {
compatible = "qcom,q6asm-dais";
iommus = <&apps_smmu 0x1821 0x0>;
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
dai@0 {
reg = <0>;
};
dai@1 {
reg = <1>;
};
dai@2 {
reg = <2>;
is-compress-dai;
direction = <1>;
};
};
};
};

View File

@ -1,70 +0,0 @@
Qualcomm Audio Stream Manager (Q6ASM) binding
Q6ASM is one of the APR audio service on Q6DSP.
Please refer to qcom,apr.txt for details of the common apr service bindings
used by the apr service device.
- but must contain the following property:
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,q6asm-v<MAJOR-NUMBER>.<MINOR-NUMBER>".
Or "qcom,q6asm" where the version number can be queried
from DSP.
example "qcom,q6asm-v2.0"
= ASM DAIs (Digital Audio Interface)
"dais" subnode of the ASM node represents dai specific configuration
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,q6asm-dais".
- #sound-dai-cells
Usage: required
Value type: <u32>
Definition: Must be 1
== ASM DAI is subnode of "dais" and represent a dai, it includes board specific
configuration of each dai. Must contain the following properties.
- reg
Usage: required
Value type: <u32>
Definition: Must be dai id
- direction:
Usage: Required for Compress offload dais
Value type: <u32>
Definition: Specifies the direction of the dai stream
Q6ASM_DAI_TX_RX (0) for both tx and rx
Q6ASM_DAI_TX (1) for only tx (Capture/Encode)
Q6ASM_DAI_RX (2) for only rx (Playback/Decode)
- is-compress-dai:
Usage: Required for Compress offload dais
Value type: <boolean>
Definition: present for Compress offload dais
= EXAMPLE
#include <dt-bindings/sound/qcom,q6asm.h>
apr-service@7 {
compatible = "qcom,q6asm";
reg = <APR_SVC_ASM>;
q6asmdai: dais {
compatible = "qcom,q6asm-dais";
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
dai@0 {
reg = <0>;
direction = <Q6ASM_DAI_RX>;
is-compress-dai;
};
};
};

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@ -1,21 +0,0 @@
Qualcomm ADSP Core service binding
Q6CORE is one of the APR audio service on Q6DSP.
Please refer to qcom,apr.txt for details of the common apr service bindings
used by the apr service device.
- but must contain the following property:
- compatible:
Usage: required
Value type: <stringlist>
Definition: must be "qcom,q6core-v<MAJOR-NUMBER>.<MINOR-NUMBER>".
Or "qcom,q6core" where the version number can be queried
from DSP.
example "qcom,q6core-v2.0"
= EXAMPLE
apr-service@3 {
compatible = "qcom,q6core";
reg = <APR_SVC_ADSP_CORE>;
};

View File

@ -18,9 +18,6 @@ properties:
- qcom,q6afe-clocks
- qcom,q6prm-lpass-clocks
reg:
maxItems: 1
'#clock-cells':
const: 2
description:
@ -32,7 +29,6 @@ properties:
required:
- compatible
- reg
- "#clock-cells"
additionalProperties: false
@ -42,19 +38,22 @@ examples:
#include <dt-bindings/soc/qcom,apr.h>
#include <dt-bindings/sound/qcom,q6afe.h>
apr {
compatible = "qcom,apr-v2";
qcom,domain = <APR_DOMAIN_ADSP>;
#address-cells = <1>;
#size-cells = <0>;
apr-service@4 {
service@4 {
compatible = "qcom,q6afe";
reg = <APR_SVC_AFE>;
#address-cells = <1>;
#size-cells = <0>;
clock-controller@2 {
compatible = "qcom,q6afe-clocks";
reg = <2>;
#clock-cells = <2>;
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
clock-controller {
compatible = "qcom,q6afe-clocks";
#clock-cells = <2>;
};
};
};
};
- |
#include <dt-bindings/soc/qcom,gpr.h>
@ -63,15 +62,14 @@ examples:
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
#address-cells = <1>;
#size-cells = <0>;
service@2 {
reg = <GPR_PRM_MODULE_IID>;
compatible = "qcom,q6prm";
#address-cells = <1>;
#size-cells = <0>;
clock-controller@2 {
compatible = "qcom,q6prm-lpass-clocks";
reg = <2>;
#clock-cells = <2>;
clock-controller {
compatible = "qcom,q6prm-lpass-clocks";
#clock-cells = <2>;
};
};
};
};

View File

@ -18,9 +18,6 @@ properties:
- qcom,q6afe-dais
- qcom,q6apm-lpass-dais
reg:
maxItems: 1
'#sound-dai-cells':
const: 1
@ -145,7 +142,6 @@ patternProperties:
required:
- compatible
- reg
- "#sound-dai-cells"
- "#address-cells"
- "#size-cells"
@ -157,26 +153,29 @@ examples:
#include <dt-bindings/soc/qcom,apr.h>
#include <dt-bindings/sound/qcom,q6afe.h>
apr {
compatible = "qcom,apr-v2";
#address-cells = <1>;
#size-cells = <0>;
apr-service@4 {
reg = <APR_SVC_AFE>;
#address-cells = <1>;
#size-cells = <0>;
q6afedai@1 {
compatible = "qcom,q6afe-dais";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
qcom,domain = <APR_DOMAIN_ADSP>;
dai@22 {
reg = <QUATERNARY_MI2S_RX>;
qcom,sd-lines = <0 1 2 3>;
};
service@4 {
compatible = "qcom,q6afe";
reg = <APR_SVC_AFE>;
qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
dais {
compatible = "qcom,q6afe-dais";
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
dai@22 {
reg = <QUATERNARY_MI2S_RX>;
qcom,sd-lines = <0 1 2 3>;
};
};
};
};
};
- |
#include <dt-bindings/soc/qcom,gpr.h>
gpr {
@ -184,22 +183,21 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
qcom,domain = <GPR_DOMAIN_ID_ADSP>;
service@1 {
compatible = "qcom,q6apm";
reg = <GPR_APM_MODULE_IID>;
#address-cells = <1>;
#size-cells = <0>;
q6apmdai@1 {
compatible = "qcom,q6apm-lpass-dais";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
dai@22 {
reg = <QUATERNARY_MI2S_RX>;
qcom,sd-lines = <0 1 2 3>;
};
dais {
compatible = "qcom,q6apm-lpass-dais";
#address-cells = <1>;
#size-cells = <0>;
#sound-dai-cells = <1>;
dai@22 {
reg = <QUATERNARY_MI2S_RX>;
qcom,sd-lines = <0 1 2 3>;
};
};
};
};
};

View File

@ -20,9 +20,11 @@ properties:
- qcom,apq8016-sbc-sndcard
- qcom,db845c-sndcard
- qcom,msm8916-qdsp6-sndcard
- qcom,qrb5165-rb5-sndcard
- qcom,sc8280xp-sndcard
- qcom,sdm845-sndcard
- qcom,sm8250-sndcard
- qcom,qrb5165-rb5-sndcard
- qcom,sm8450-sndcard
audio-routing:
$ref: /schemas/types.yaml#/definitions/non-unique-string-array
@ -71,6 +73,8 @@ patternProperties:
cpu:
description: Holds subnode which indicates cpu dai.
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
@ -78,6 +82,8 @@ patternProperties:
platform:
description: Holds subnode which indicates platform dai.
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
@ -85,6 +91,8 @@ patternProperties:
codec:
description: Holds subnode which indicates codec dai.
type: object
additionalProperties: false
properties:
sound-dai:
minItems: 1

View File

@ -129,6 +129,8 @@ properties:
patternProperties:
"^dvc-[0-1]$":
type: object
additionalProperties: false
properties:
dmas:
maxItems: 1
@ -145,7 +147,7 @@ properties:
patternProperties:
"^mix-[0-1]$":
type: object
# no properties
additionalProperties: false
additionalProperties: false
rcar_sound,ctu:
@ -154,7 +156,7 @@ properties:
patternProperties:
"^ctu-[0-7]$":
type: object
# no properties
additionalProperties: false
additionalProperties: false
rcar_sound,src:
@ -163,6 +165,8 @@ properties:
patternProperties:
"^src-[0-9]$":
type: object
additionalProperties: false
properties:
interrupts:
maxItems: 1
@ -186,6 +190,8 @@ properties:
patternProperties:
"^ssiu-[0-9]+$":
type: object
additionalProperties: false
properties:
dmas:
maxItems: 2
@ -206,6 +212,8 @@ properties:
patternProperties:
"^ssi-[0-9]$":
type: object
additionalProperties: false
properties:
interrupts:
maxItems: 1
@ -243,6 +251,8 @@ properties:
patternProperties:
"^dai([0-9]+)?$":
type: object
additionalProperties: false
properties:
playback:
$ref: /schemas/types.yaml#/definitions/phandle-array

View File

@ -23,6 +23,7 @@ properties:
cpu:
type: object
additionalProperties: false
properties:
sound-dai:
minItems: 2
@ -34,6 +35,7 @@ properties:
- sound-dai
codec:
additionalProperties: false
type: object
properties:
sound-dai:

View File

@ -19,6 +19,7 @@ properties:
cpu:
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1
@ -28,6 +29,7 @@ properties:
codec:
type: object
additionalProperties: false
properties:
sound-dai:
maxItems: 1

View File

@ -19,6 +19,7 @@ properties:
codec:
type: object
additionalProperties: false
properties:
sound-dai:
description: List of phandles to the CODEC and HDMI IP nodes.
@ -30,6 +31,7 @@ properties:
cpu:
type: object
additionalProperties: false
properties:
sound-dai:
description: Phandle to the Samsung I2S controller.

View File

@ -60,6 +60,7 @@ required:
patternProperties:
"^audio-controller@[0-9a-f]+$":
type: object
additionalProperties: false
description:
Two subnodes corresponding to SAI sub-block instances A et B
can be defined. Subnode can be omitted for unsused sub-block.
@ -121,6 +122,10 @@ patternProperties:
description: Configure the SAI device as master clock provider.
const: 0
port:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
required:
- compatible
- "#sound-dai-cells"

View File

@ -0,0 +1,48 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/ti,src4xxx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments SRC4392 Device Tree Bindings
description: |
The SRC4392 is a digital audio codec that can be connected via
I2C or SPI. Currently, only I2C bus is supported.
maintainers:
- Matt Flax <flatmax@flatmax.com>
allOf:
- $ref: name-prefix.yaml#
properties:
compatible:
const: ti,src4392
"#sound-dai-cells":
const: 0
reg:
maxItems: 1
required:
- "#sound-dai-cells"
- compatible
- reg
additionalProperties: false
examples:
- |
i2c {
#address-cells = <1>;
#size-cells = <0>;
audio-codec@70 {
#sound-dai-cells = <0>;
compatible = "ti,src4392";
reg = <0x70>;
};
};
...

View File

@ -0,0 +1,94 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/ti,ts3a227e.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments TS3A227E
Autonomous Audio Accessory Detection and Configuration Switch
maintainers:
- Dylan Reid <dgreid@chromium.org>
description: |
The TS3A227E detect headsets of 3-ring and 4-ring standards and
switches automatically to route the microphone correctly. It also
handles key press detection in accordance with the Android audio
headset specification v1.0.
properties:
compatible:
enum:
- ti,ts3a227e
reg:
const: 0x3b
interrupts:
maxItems: 1
ti,micbias:
$ref: /schemas/types.yaml#/definitions/uint32
description: Intended MICBIAS voltage (datasheet section 9.6.7).
enum:
- 0 # 2.1 V
- 1 # 2.2 V
- 2 # 2.3 V
- 3 # 2.4 V
- 4 # 2.5 V
- 5 # 2.6 V
- 6 # 2.7 V
- 7 # 2.8 V
default: 1
ti,debounce-release-ms:
description: key release debounce time in ms (datasheet section 9.6.7).
enum:
- 0
- 20
default: 20
ti,debounce-press-ms:
description: key press debounce time in ms (datasheet section 9.6.7).
enum:
- 2
- 40
- 80
- 120
default: 80
ti,debounce-insertion-ms:
description: headset insertion debounce time in ms (datasheet section 9.6.5).
enum:
- 2
- 30
- 60
- 90
- 120
- 150
- 1000
- 2000
default: 90
required:
- compatible
- reg
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c {
#address-cells = <1>;
#size-cells = <0>;
codec: audio-controller@3b {
compatible = "ti,ts3a227e";
reg = <0x3b>;
interrupt-parent = <&gpio1>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
};
};
...

View File

@ -1,30 +0,0 @@
Texas Instruments TS3A227E
Autonomous Audio Accessory Detection and Configuration Switch
The TS3A227E detect headsets of 3-ring and 4-ring standards and
switches automatically to route the microphone correctly. It also
handles key press detection in accordance with the Android audio
headset specification v1.0.
Required properties:
- compatible: Should contain "ti,ts3a227e".
- reg: The i2c address. Should contain <0x3b>.
- interrupts: Interrupt number for /INT pin from the 227e
Optional properies:
- ti,micbias: Intended MICBIAS voltage (datasheet section 9.6.7).
Select 0/1/2/3/4/5/6/7 to specify MICBIAS voltage
2.1V/2.2V/2.3V/2.4V/2.5V/2.6V/2.7V/2.8V
Default value is "1" (2.2V).
Examples:
i2c {
ts3a227e@3b {
compatible = "ti,ts3a227e";
reg = <0x3b>;
interrupt-parent = <&gpio>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
};
};

View File

@ -85,8 +85,9 @@ examples:
compatible = "mediatek,mt8173-nor";
reg = <0 0x1100d000 0 0xe0>;
interrupts = <1>;
clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
clock-names = "spi", "sf";
clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>,
<&pericfg CLK_PERI_NFI>;
clock-names = "spi", "sf", "axi";
#address-cells = <1>;
#size-cells = <0>;

View File

@ -3565,13 +3565,17 @@ given size.
The second argument (type) and the third argument (device pointer) are
dependent on the bus. For normal devices, pass the device pointer
(typically identical as ``card->dev``) to the third argument with
``SNDRV_DMA_TYPE_DEV`` type. For the continuous buffer unrelated to the
``SNDRV_DMA_TYPE_DEV`` type.
For the continuous buffer unrelated to the
bus can be pre-allocated with ``SNDRV_DMA_TYPE_CONTINUOUS`` type.
You can pass NULL to the device pointer in that case, which is the
default mode implying to allocate with ``GFP_KERNEL`` flag.
If you need a different GFP flag, you can pass it by encoding the flag
into the device pointer via a special macro
:c:func:`snd_dma_continuous_data()`.
If you need a restricted (lower) address, set up the coherent DMA mask
bits for the device, and pass the device pointer, like the normal
device memory allocations. For this type, it's still allowed to pass
NULL to the device pointer, too, if no address restriction is needed.
For the scatter-gather buffers, use ``SNDRV_DMA_TYPE_DEV_SG`` with the
device pointer (see the `Non-Contiguous Buffers`_ section).
@ -3811,15 +3815,6 @@ arguments here. Since each vmalloc call should succeed at any time,
we don't need to pre-allocate the buffers like other continuous
pages.
If you need the 32bit DMA allocation, pass the device pointer encoded
by :c:func:`snd_dma_continuous_data()` with ``GFP_KERNEL|__GFP_DMA32``
argument.
::
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC,
snd_dma_continuous_data(GFP_KERNEL | __GFP_DMA32), 0, 0);
Proc Interface
==============

View File

@ -819,6 +819,13 @@ L: linux-media@vger.kernel.org
S: Maintained
F: drivers/staging/media/sunxi/cedrus/
ALLWINNER DMIC DRIVERS
M: Ban Tao <fengzheng923@gmail.com>
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/sound/allwinner,sun50i-h6-dmic.yaml
F: sound/soc/sunxi/sun50i-dmic.c
ALPHA PORT
M: Richard Henderson <richard.henderson@linaro.org>
M: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
@ -1920,6 +1927,15 @@ F: include/dt-bindings/pinctrl/apple.h
F: include/linux/apple-mailbox.h
F: include/linux/soc/apple/*
ARM/APPLE MACHINE SOUND DRIVERS
M: Martin Povišer <povik+lin@cutebit.org>
L: asahi@lists.linux.dev
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Maintained
F: Documentation/devicetree/bindings/sound/apple,*
F: sound/soc/apple/*
F: sound/soc/codecs/cs42l83-i2c.c
ARM/ARTPEC MACHINE SUPPORT
M: Jesper Nilsson <jesper.nilsson@axis.com>
M: Lars Persson <lars.persson@axis.com>
@ -16646,6 +16662,9 @@ M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
M: Banajit Goswami <bgoswami@quicinc.com>
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
S: Supported
F: Documentation/devicetree/bindings/soc/qcom/qcom,apr.yaml
F: Documentation/devicetree/bindings/sound/qcom,*
F: drivers/soc/qcom/apr.c
F: include/dt-bindings/sound/qcom,wcd9335.h
F: sound/soc/codecs/lpass-rx-macro.*
F: sound/soc/codecs/lpass-tx-macro.*

View File

@ -297,6 +297,38 @@ int sdw_transfer(struct sdw_bus *bus, struct sdw_msg *msg)
return ret;
}
/**
* sdw_show_ping_status() - Direct report of PING status, to be used by Peripheral drivers
* @bus: SDW bus
* @sync_delay: Delay before reading status
*/
void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay)
{
u32 status;
if (!bus->ops->read_ping_status)
return;
/*
* wait for peripheral to sync if desired. 10-15ms should be more than
* enough in most cases.
*/
if (sync_delay)
usleep_range(10000, 15000);
mutex_lock(&bus->msg_lock);
status = bus->ops->read_ping_status(bus);
mutex_unlock(&bus->msg_lock);
if (!status)
dev_warn(bus->dev, "%s: no peripherals attached\n", __func__);
else
dev_dbg(bus->dev, "PING status: %#x\n", status);
}
EXPORT_SYMBOL(sdw_show_ping_status);
/**
* sdw_transfer_defer() - Asynchronously transfer message to a SDW Slave device
* @bus: SDW bus

View File

@ -756,6 +756,14 @@ cdns_reset_page_addr(struct sdw_bus *bus, unsigned int dev_num)
}
EXPORT_SYMBOL(cdns_reset_page_addr);
u32 cdns_read_ping_status(struct sdw_bus *bus)
{
struct sdw_cdns *cdns = bus_to_cdns(bus);
return cdns_readl(cdns, CDNS_MCP_SLAVE_STAT);
}
EXPORT_SYMBOL(cdns_read_ping_status);
/*
* IRQ handling
*/

View File

@ -177,6 +177,8 @@ enum sdw_command_response
cdns_xfer_msg_defer(struct sdw_bus *bus,
struct sdw_msg *msg, struct sdw_defer *defer);
u32 cdns_read_ping_status(struct sdw_bus *bus);
int cdns_bus_conf(struct sdw_bus *bus, struct sdw_bus_params *params);
int cdns_set_sdw_stream(struct snd_soc_dai *dai,

View File

@ -1262,6 +1262,7 @@ static struct sdw_master_ops sdw_intel_ops = {
.set_bus_conf = cdns_bus_conf,
.pre_bank_switch = intel_pre_bank_switch,
.post_bank_switch = intel_post_bank_switch,
.read_ping_status = cdns_read_ping_status,
};
static int intel_init(struct sdw_intel *sdw)

View File

@ -158,8 +158,8 @@ size_t u_audio_playback(struct gaudio *card, void *buf, size_t count)
snd_pcm_sframes_t frames;
try_again:
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
if (runtime->state == SNDRV_PCM_STATE_XRUN ||
runtime->state == SNDRV_PCM_STATE_SUSPENDED) {
result = snd_pcm_kernel_ioctl(substream,
SNDRV_PCM_IOCTL_PREPARE, NULL);
if (result < 0) {

View File

@ -193,6 +193,24 @@
#define LPASS_CLK_ID_RX_CORE_MCLK 59
#define LPASS_CLK_ID_RX_CORE_NPL_MCLK 60
#define LPASS_CLK_ID_VA_CORE_2X_MCLK 61
/* Clock ID for MCLK for WSA2 core */
#define LPASS_CLK_ID_WSA2_CORE_MCLK 62
/* Clock ID for NPL MCLK for WSA2 core */
#define LPASS_CLK_ID_WSA2_CORE_2X_MCLK 63
/* Clock ID for RX Core TX MCLK */
#define LPASS_CLK_ID_RX_CORE_TX_MCLK 64
/* Clock ID for RX CORE TX 2X MCLK */
#define LPASS_CLK_ID_RX_CORE_TX_2X_MCLK 65
/* Clock ID for WSA core TX MCLK */
#define LPASS_CLK_ID_WSA_CORE_TX_MCLK 66
/* Clock ID for WSA core TX 2X MCLK */
#define LPASS_CLK_ID_WSA_CORE_TX_2X_MCLK 67
/* Clock ID for WSA2 core TX MCLK */
#define LPASS_CLK_ID_WSA2_CORE_TX_MCLK 68
/* Clock ID for WSA2 core TX 2X MCLK */
#define LPASS_CLK_ID_WSA2_CORE_TX_2X_MCLK 69
/* Clock ID for RX CORE MCLK2 2X MCLK */
#define LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK 70
#define LPASS_HW_AVTIMER_VOTE 101
#define LPASS_HW_MACRO_VOTE 102

View File

@ -1,21 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* SSM2518 amplifier audio driver
*
* Copyright 2013 Analog Devices Inc.
* Author: Lars-Peter Clausen <lars@metafoo.de>
*/
#ifndef __LINUX_PLATFORM_DATA_SSM2518_H__
#define __LINUX_PLATFORM_DATA_SSM2518_H__
/**
* struct ssm2518_platform_data - Platform data for the ssm2518 driver
* @enable_gpio: GPIO connected to the nSD pin. Set to -1 if the nSD pin is
* hardwired.
*/
struct ssm2518_platform_data {
int enable_gpio;
};
#endif

View File

@ -839,6 +839,8 @@ struct sdw_defer {
* @set_bus_conf: Set the bus configuration
* @pre_bank_switch: Callback for pre bank switch
* @post_bank_switch: Callback for post bank switch
* @read_ping_status: Read status from PING frames, reported with two bits per Device.
* Bits 31:24 are reserved.
*/
struct sdw_master_ops {
int (*read_prop)(struct sdw_bus *bus);
@ -855,6 +857,7 @@ struct sdw_master_ops {
struct sdw_bus_params *params);
int (*pre_bank_switch)(struct sdw_bus *bus);
int (*post_bank_switch)(struct sdw_bus *bus);
u32 (*read_ping_status)(struct sdw_bus *bus);
};
@ -919,6 +922,8 @@ int sdw_bus_master_add(struct sdw_bus *bus, struct device *parent,
struct fwnode_handle *fwnode);
void sdw_bus_master_delete(struct sdw_bus *bus);
void sdw_show_ping_status(struct sdw_bus *bus, bool sync_delay);
/**
* sdw_port_config: Master or Slave Port configuration
*

View File

@ -21,6 +21,8 @@ enum string_size_units {
void string_get_size(u64 size, u64 blk_size, enum string_size_units units,
char *buf, int len);
int parse_int_array_user(const char __user *from, size_t count, int **array);
#define UNESCAPE_SPACE BIT(0)
#define UNESCAPE_OCTAL BIT(1)
#define UNESCAPE_HEX BIT(2)

View File

@ -0,0 +1,444 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* AMD ACP 6.2 Register Documentation
*
* Copyright 2022 Advanced Micro Devices, Inc.
*/
#ifndef _acp_ip_OFFSET_HEADER
#define _acp_ip_OFFSET_HEADER
/* Registers from ACP_DMA block */
#define ACP_DMA_CNTL_0 0x0000000
#define ACP_DMA_CNTL_1 0x0000004
#define ACP_DMA_CNTL_2 0x0000008
#define ACP_DMA_CNTL_3 0x000000C
#define ACP_DMA_CNTL_4 0x0000010
#define ACP_DMA_CNTL_5 0x0000014
#define ACP_DMA_CNTL_6 0x0000018
#define ACP_DMA_CNTL_7 0x000001C
#define ACP_DMA_DSCR_STRT_IDX_0 0x0000020
#define ACP_DMA_DSCR_STRT_IDX_1 0x0000024
#define ACP_DMA_DSCR_STRT_IDX_2 0x0000028
#define ACP_DMA_DSCR_STRT_IDX_3 0x000002C
#define ACP_DMA_DSCR_STRT_IDX_4 0x0000030
#define ACP_DMA_DSCR_STRT_IDX_5 0x0000034
#define ACP_DMA_DSCR_STRT_IDX_6 0x0000038
#define ACP_DMA_DSCR_STRT_IDX_7 0x000003C
#define ACP_DMA_DSCR_CNT_0 0x0000040
#define ACP_DMA_DSCR_CNT_1 0x0000044
#define ACP_DMA_DSCR_CNT_2 0x0000048
#define ACP_DMA_DSCR_CNT_3 0x000004C
#define ACP_DMA_DSCR_CNT_4 0x0000050
#define ACP_DMA_DSCR_CNT_5 0x0000054
#define ACP_DMA_DSCR_CNT_6 0x0000058
#define ACP_DMA_DSCR_CNT_7 0x000005C
#define ACP_DMA_PRIO_0 0x0000060
#define ACP_DMA_PRIO_1 0x0000064
#define ACP_DMA_PRIO_2 0x0000068
#define ACP_DMA_PRIO_3 0x000006C
#define ACP_DMA_PRIO_4 0x0000070
#define ACP_DMA_PRIO_5 0x0000074
#define ACP_DMA_PRIO_6 0x0000078
#define ACP_DMA_PRIO_7 0x000007C
#define ACP_DMA_CUR_DSCR_0 0x0000080
#define ACP_DMA_CUR_DSCR_1 0x0000084
#define ACP_DMA_CUR_DSCR_2 0x0000088
#define ACP_DMA_CUR_DSCR_3 0x000008C
#define ACP_DMA_CUR_DSCR_4 0x0000090
#define ACP_DMA_CUR_DSCR_5 0x0000094
#define ACP_DMA_CUR_DSCR_6 0x0000098
#define ACP_DMA_CUR_DSCR_7 0x000009C
#define ACP_DMA_CUR_TRANS_CNT_0 0x00000A0
#define ACP_DMA_CUR_TRANS_CNT_1 0x00000A4
#define ACP_DMA_CUR_TRANS_CNT_2 0x00000A8
#define ACP_DMA_CUR_TRANS_CNT_3 0x00000AC
#define ACP_DMA_CUR_TRANS_CNT_4 0x00000B0
#define ACP_DMA_CUR_TRANS_CNT_5 0x00000B4
#define ACP_DMA_CUR_TRANS_CNT_6 0x00000B8
#define ACP_DMA_CUR_TRANS_CNT_7 0x00000BC
#define ACP_DMA_ERR_STS_0 0x00000C0
#define ACP_DMA_ERR_STS_1 0x00000C4
#define ACP_DMA_ERR_STS_2 0x00000C8
#define ACP_DMA_ERR_STS_3 0x00000CC
#define ACP_DMA_ERR_STS_4 0x00000D0
#define ACP_DMA_ERR_STS_5 0x00000D4
#define ACP_DMA_ERR_STS_6 0x00000D8
#define ACP_DMA_ERR_STS_7 0x00000DC
#define ACP_DMA_DESC_BASE_ADDR 0x00000E0
#define ACP_DMA_DESC_MAX_NUM_DSCR 0x00000E4
#define ACP_DMA_CH_STS 0x00000E8
#define ACP_DMA_CH_GROUP 0x00000EC
#define ACP_DMA_CH_RST_STS 0x00000F0
/* Registers from ACP_AXI2AXIATU block */
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_1 0x0000C00
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_1 0x0000C04
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_2 0x0000C08
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_2 0x0000C0C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_3 0x0000C10
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_3 0x0000C14
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_4 0x0000C18
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_4 0x0000C1C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_5 0x0000C20
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_5 0x0000C24
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_6 0x0000C28
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_6 0x0000C2C
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_7 0x0000C30
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_7 0x0000C34
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_8 0x0000C38
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_8 0x0000C3C
#define ACPAXI2AXI_ATU_CTRL 0x0000C40
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_9 0x0000C44
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_9 0x0000C48
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_10 0x0000C4C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_10 0x0000C50
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_11 0x0000C54
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_11 0x0000C58
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_12 0x0000C5C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_12 0x0000C60
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_13 0x0000C64
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_13 0x0000C68
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_14 0x0000C6C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_14 0x0000C70
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_15 0x0000C74
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_15 0x0000C78
#define ACPAXI2AXI_ATU_PAGE_SIZE_GRP_16 0x0000C7C
#define ACPAXI2AXI_ATU_BASE_ADDR_GRP_16 0x0000C80
/* Registers from ACP_CLKRST block */
#define ACP_SOFT_RESET 0x0001000
#define ACP_CONTROL 0x0001004
#define ACP_STATUS 0x0001008
#define ACP_DYNAMIC_CG_MASTER_CONTROL 0x0001010
#define ACP_ZSC_DSP_CTRL 0x0001014
#define ACP_ZSC_STS 0x0001018
#define ACP_PGFSM_CONTROL 0x0001024
#define ACP_PGFSM_STATUS 0x0001028
#define ACP_CLKMUX_SEL 0x000102C
/* Registers from ACP_AON block */
#define ACP_PME_EN 0x0001400
#define ACP_DEVICE_STATE 0x0001404
#define AZ_DEVICE_STATE 0x0001408
#define ACP_PIN_CONFIG 0x0001440
#define ACP_PAD_PULLUP_CTRL 0x0001444
#define ACP_PAD_PULLDOWN_CTRL 0x0001448
#define ACP_PAD_DRIVE_STRENGTH_CTRL 0x000144C
#define ACP_PAD_SCHMEN_CTRL 0x0001450
#define ACP_SW_PAD_KEEPER_EN 0x0001454
#define ACP_SW_WAKE_EN 0x0001458
#define ACP_I2S_WAKE_EN 0x000145C
#define ACP_SW1_WAKE_EN 0x0001460
/* Registers from ACP_P1_MISC block */
#define ACP_EXTERNAL_INTR_ENB 0x0001A00
#define ACP_EXTERNAL_INTR_CNTL 0x0001A04
#define ACP_EXTERNAL_INTR_CNTL1 0x0001A08
#define ACP_EXTERNAL_INTR_STAT 0x0001A0C
#define ACP_EXTERNAL_INTR_STAT1 0x0001A10
#define ACP_ERROR_STATUS 0x0001A4C
#define ACP_P1_SW_I2S_ERROR_REASON 0x0001A50
#define ACP_P1_SW_POS_TRACK_I2S_TX_CTRL 0x0001A6C
#define ACP_P1_SW_I2S_TX_DMA_POS 0x0001A70
#define ACP_P1_SW_POS_TRACK_I2S_RX_CTRL 0x0001A74
#define ACP_P1_SW_I2S_RX_DMA_POS 0x0001A78
#define ACP_P1_DMIC_I2S_GPIO_INTR_CTRL 0x0001A7C
#define ACP_P1_DMIC_I2S_GPIO_INTR_STATUS 0x0001A80
#define ACP_SCRATCH_REG_BASE_ADDR 0x0001A84
#define ACP_P1_SW_POS_TRACK_BT_TX_CTRL 0x0001A88
#define ACP_P1_SW_BT_TX_DMA_POS 0x0001A8C
#define ACP_P1_SW_POS_TRACK_HS_TX_CTRL 0x0001A90
#define ACP_P1_SW_HS_TX_DMA_POS 0x0001A94
#define ACP_P1_SW_POS_TRACK_BT_RX_CTRL 0x0001A98
#define ACP_P1_SW_BT_RX_DMA_POS 0x0001A9C
#define ACP_P1_SW_POS_TRACK_HS_RX_CTRL 0x0001AA0
#define ACP_P1_SW_HS_RX_DMA_POS 0x0001AA4
/* Registers from ACP_AUDIO_BUFFERS block */
#define ACP_I2S_RX_RINGBUFADDR 0x0002000
#define ACP_I2S_RX_RINGBUFSIZE 0x0002004
#define ACP_I2S_RX_LINKPOSITIONCNTR 0x0002008
#define ACP_I2S_RX_FIFOADDR 0x000200C
#define ACP_I2S_RX_FIFOSIZE 0x0002010
#define ACP_I2S_RX_DMA_SIZE 0x0002014
#define ACP_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x0002018
#define ACP_I2S_RX_LINEARPOSITIONCNTR_LOW 0x000201C
#define ACP_I2S_RX_INTR_WATERMARK_SIZE 0x0002020
#define ACP_I2S_TX_RINGBUFADDR 0x0002024
#define ACP_I2S_TX_RINGBUFSIZE 0x0002028
#define ACP_I2S_TX_LINKPOSITIONCNTR 0x000202C
#define ACP_I2S_TX_FIFOADDR 0x0002030
#define ACP_I2S_TX_FIFOSIZE 0x0002034
#define ACP_I2S_TX_DMA_SIZE 0x0002038
#define ACP_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x000203C
#define ACP_I2S_TX_LINEARPOSITIONCNTR_LOW 0x0002040
#define ACP_I2S_TX_INTR_WATERMARK_SIZE 0x0002044
#define ACP_BT_RX_RINGBUFADDR 0x0002048
#define ACP_BT_RX_RINGBUFSIZE 0x000204C
#define ACP_BT_RX_LINKPOSITIONCNTR 0x0002050
#define ACP_BT_RX_FIFOADDR 0x0002054
#define ACP_BT_RX_FIFOSIZE 0x0002058
#define ACP_BT_RX_DMA_SIZE 0x000205C
#define ACP_BT_RX_LINEARPOSITIONCNTR_HIGH 0x0002060
#define ACP_BT_RX_LINEARPOSITIONCNTR_LOW 0x0002064
#define ACP_BT_RX_INTR_WATERMARK_SIZE 0x0002068
#define ACP_BT_TX_RINGBUFADDR 0x000206C
#define ACP_BT_TX_RINGBUFSIZE 0x0002070
#define ACP_BT_TX_LINKPOSITIONCNTR 0x0002074
#define ACP_BT_TX_FIFOADDR 0x0002078
#define ACP_BT_TX_FIFOSIZE 0x000207C
#define ACP_BT_TX_DMA_SIZE 0x0002080
#define ACP_BT_TX_LINEARPOSITIONCNTR_HIGH 0x0002084
#define ACP_BT_TX_LINEARPOSITIONCNTR_LOW 0x0002088
#define ACP_BT_TX_INTR_WATERMARK_SIZE 0x000208C
#define ACP_HS_RX_RINGBUFADDR 0x0002090
#define ACP_HS_RX_RINGBUFSIZE 0x0002094
#define ACP_HS_RX_LINKPOSITIONCNTR 0x0002098
#define ACP_HS_RX_FIFOADDR 0x000209C
#define ACP_HS_RX_FIFOSIZE 0x00020A0
#define ACP_HS_RX_DMA_SIZE 0x00020A4
#define ACP_HS_RX_LINEARPOSITIONCNTR_HIGH 0x00020A8
#define ACP_HS_RX_LINEARPOSITIONCNTR_LOW 0x00020AC
#define ACP_HS_RX_INTR_WATERMARK_SIZE 0x00020B0
#define ACP_HS_TX_RINGBUFADDR 0x00020B4
#define ACP_HS_TX_RINGBUFSIZE 0x00020B8
#define ACP_HS_TX_LINKPOSITIONCNTR 0x00020BC
#define ACP_HS_TX_FIFOADDR 0x00020C0
#define ACP_HS_TX_FIFOSIZE 0x00020C4
#define ACP_HS_TX_DMA_SIZE 0x00020C8
#define ACP_HS_TX_LINEARPOSITIONCNTR_HIGH 0x00020CC
#define ACP_HS_TX_LINEARPOSITIONCNTR_LOW 0x00020D0
#define ACP_HS_TX_INTR_WATERMARK_SIZE 0x00020D4
/* Registers from ACP_I2S_TDM block */
#define ACP_I2STDM_IER 0x0002400
#define ACP_I2STDM_IRER 0x0002404
#define ACP_I2STDM_RXFRMT 0x0002408
#define ACP_I2STDM_ITER 0x000240C
#define ACP_I2STDM_TXFRMT 0x0002410
#define ACP_I2STDM0_MSTRCLKGEN 0x0002414
#define ACP_I2STDM1_MSTRCLKGEN 0x0002418
#define ACP_I2STDM2_MSTRCLKGEN 0x000241C
#define ACP_I2STDM_REFCLKGEN 0x0002420
/* Registers from ACP_BT_TDM block */
#define ACP_BTTDM_IER 0x0002800
#define ACP_BTTDM_IRER 0x0002804
#define ACP_BTTDM_RXFRMT 0x0002808
#define ACP_BTTDM_ITER 0x000280C
#define ACP_BTTDM_TXFRMT 0x0002810
#define ACP_HSTDM_IER 0x0002814
#define ACP_HSTDM_IRER 0x0002818
#define ACP_HSTDM_RXFRMT 0x000281C
#define ACP_HSTDM_ITER 0x0002820
#define ACP_HSTDM_TXFRMT 0x0002824
/* Registers from ACP_WOV block */
#define ACP_WOV_PDM_ENABLE 0x0002C04
#define ACP_WOV_PDM_DMA_ENABLE 0x0002C08
#define ACP_WOV_RX_RINGBUFADDR 0x0002C0C
#define ACP_WOV_RX_RINGBUFSIZE 0x0002C10
#define ACP_WOV_RX_LINKPOSITIONCNTR 0x0002C14
#define ACP_WOV_RX_LINEARPOSITIONCNTR_HIGH 0x0002C18
#define ACP_WOV_RX_LINEARPOSITIONCNTR_LOW 0x0002C1C
#define ACP_WOV_RX_INTR_WATERMARK_SIZE 0x0002C20
#define ACP_WOV_PDM_FIFO_FLUSH 0x0002C24
#define ACP_WOV_PDM_NO_OF_CHANNELS 0x0002C28
#define ACP_WOV_PDM_DECIMATION_FACTOR 0x0002C2C
#define ACP_WOV_PDM_VAD_CTRL 0x0002C30
#define ACP_WOV_WAKE 0x0002C54
#define ACP_WOV_BUFFER_STATUS 0x0002C58
#define ACP_WOV_MISC_CTRL 0x0002C5C
#define ACP_WOV_CLK_CTRL 0x0002C60
#define ACP_PDM_VAD_DYNAMIC_CLK_GATING_EN 0x0002C64
#define ACP_WOV_ERROR_STATUS_REGISTER 0x0002C68
#define ACP_PDM_CLKDIV 0x0002C6C
/* Registers from ACP_P1_AUDIO_BUFFERS block */
#define ACP_P1_I2S_RX_RINGBUFADDR 0x0003A00
#define ACP_P1_I2S_RX_RINGBUFSIZE 0x0003A04
#define ACP_P1_I2S_RX_LINKPOSITIONCNTR 0x0003A08
#define ACP_P1_I2S_RX_FIFOADDR 0x0003A0C
#define ACP_P1_I2S_RX_FIFOSIZE 0x0003A10
#define ACP_P1_I2S_RX_DMA_SIZE 0x0003A14
#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_HIGH 0x0003A18
#define ACP_P1_I2S_RX_LINEARPOSITIONCNTR_LOW 0x0003A1C
#define ACP_P1_I2S_RX_INTR_WATERMARK_SIZE 0x0003A20
#define ACP_P1_I2S_TX_RINGBUFADDR 0x0003A24
#define ACP_P1_I2S_TX_RINGBUFSIZE 0x0003A28
#define ACP_P1_I2S_TX_LINKPOSITIONCNTR 0x0003A2C
#define ACP_P1_I2S_TX_FIFOADDR 0x0003A30
#define ACP_P1_I2S_TX_FIFOSIZE 0x0003A34
#define ACP_P1_I2S_TX_DMA_SIZE 0x0003A38
#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_HIGH 0x0003A3C
#define ACP_P1_I2S_TX_LINEARPOSITIONCNTR_LOW 0x0003A40
#define ACP_P1_I2S_TX_INTR_WATERMARK_SIZE 0x0003A44
#define ACP_P1_BT_RX_RINGBUFADDR 0x0003A48
#define ACP_P1_BT_RX_RINGBUFSIZE 0x0003A4C
#define ACP_P1_BT_RX_LINKPOSITIONCNTR 0x0003A50
#define ACP_P1_BT_RX_FIFOADDR 0x0003A54
#define ACP_P1_BT_RX_FIFOSIZE 0x0003A58
#define ACP_P1_BT_RX_DMA_SIZE 0x0003A5C
#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_HIGH 0x0003A60
#define ACP_P1_BT_RX_LINEARPOSITIONCNTR_LOW 0x0003A64
#define ACP_P1_BT_RX_INTR_WATERMARK_SIZE 0x0003A68
#define ACP_P1_BT_TX_RINGBUFADDR 0x0003A6C
#define ACP_P1_BT_TX_RINGBUFSIZE 0x0003A70
#define ACP_P1_BT_TX_LINKPOSITIONCNTR 0x0003A74
#define ACP_P1_BT_TX_FIFOADDR 0x0003A78
#define ACP_P1_BT_TX_FIFOSIZE 0x0003A7C
#define ACP_P1_BT_TX_DMA_SIZE 0x0003A80
#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_HIGH 0x0003A84
#define ACP_P1_BT_TX_LINEARPOSITIONCNTR_LOW 0x0003A88
#define ACP_P1_BT_TX_INTR_WATERMARK_SIZE 0x0003A8C
#define ACP_P1_HS_RX_RINGBUFADDR 0x0003A90
#define ACP_P1_HS_RX_RINGBUFSIZE 0x0003A94
#define ACP_P1_HS_RX_LINKPOSITIONCNTR 0x0003A98
#define ACP_P1_HS_RX_FIFOADDR 0x0003A9C
#define ACP_P1_HS_RX_FIFOSIZE 0x0003AA0
#define ACP_P1_HS_RX_DMA_SIZE 0x0003AA4
#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_HIGH 0x0003AA8
#define ACP_P1_HS_RX_LINEARPOSITIONCNTR_LOW 0x0003AAC
#define ACP_P1_HS_RX_INTR_WATERMARK_SIZE 0x0003AB0
#define ACP_P1_HS_TX_RINGBUFADDR 0x0003AB4
#define ACP_P1_HS_TX_RINGBUFSIZE 0x0003AB8
#define ACP_P1_HS_TX_LINKPOSITIONCNTR 0x0003ABC
#define ACP_P1_HS_TX_FIFOADDR 0x0003AC0
#define ACP_P1_HS_TX_FIFOSIZE 0x0003AC4
#define ACP_P1_HS_TX_DMA_SIZE 0x0003AC8
#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_HIGH 0x0003ACC
#define ACP_P1_HS_TX_LINEARPOSITIONCNTR_LOW 0x0003AD0
#define ACP_P1_HS_TX_INTR_WATERMARK_SIZE 0x0003AD4
/* Registers from ACP_SCRATCH block */
#define ACP_SCRATCH_REG_0 0x0010000
#define ACP_SCRATCH_REG_1 0x0010004
#define ACP_SCRATCH_REG_2 0x0010008
#define ACP_SCRATCH_REG_3 0x001000C
#define ACP_SCRATCH_REG_4 0x0010010
#define ACP_SCRATCH_REG_5 0x0010014
#define ACP_SCRATCH_REG_6 0x0010018
#define ACP_SCRATCH_REG_7 0x001001C
#define ACP_SCRATCH_REG_8 0x0010020
#define ACP_SCRATCH_REG_9 0x0010024
#define ACP_SCRATCH_REG_10 0x0010028
#define ACP_SCRATCH_REG_11 0x001002C
#define ACP_SCRATCH_REG_12 0x0010030
#define ACP_SCRATCH_REG_13 0x0010034
#define ACP_SCRATCH_REG_14 0x0010038
#define ACP_SCRATCH_REG_15 0x001003C
#define ACP_SCRATCH_REG_16 0x0010040
#define ACP_SCRATCH_REG_17 0x0010044
#define ACP_SCRATCH_REG_18 0x0010048
#define ACP_SCRATCH_REG_19 0x001004C
#define ACP_SCRATCH_REG_20 0x0010050
#define ACP_SCRATCH_REG_21 0x0010054
#define ACP_SCRATCH_REG_22 0x0010058
#define ACP_SCRATCH_REG_23 0x001005C
#define ACP_SCRATCH_REG_24 0x0010060
#define ACP_SCRATCH_REG_25 0x0010064
#define ACP_SCRATCH_REG_26 0x0010068
#define ACP_SCRATCH_REG_27 0x001006C
#define ACP_SCRATCH_REG_28 0x0010070
#define ACP_SCRATCH_REG_29 0x0010074
#define ACP_SCRATCH_REG_30 0x0010078
#define ACP_SCRATCH_REG_31 0x001007C
#define ACP_SCRATCH_REG_32 0x0010080
#define ACP_SCRATCH_REG_33 0x0010084
#define ACP_SCRATCH_REG_34 0x0010088
#define ACP_SCRATCH_REG_35 0x001008C
#define ACP_SCRATCH_REG_36 0x0010090
#define ACP_SCRATCH_REG_37 0x0010094
#define ACP_SCRATCH_REG_38 0x0010098
#define ACP_SCRATCH_REG_39 0x001009C
#define ACP_SCRATCH_REG_40 0x00100A0
#define ACP_SCRATCH_REG_41 0x00100A4
#define ACP_SCRATCH_REG_42 0x00100A8
#define ACP_SCRATCH_REG_43 0x00100AC
#define ACP_SCRATCH_REG_44 0x00100B0
#define ACP_SCRATCH_REG_45 0x00100B4
#define ACP_SCRATCH_REG_46 0x00100B8
#define ACP_SCRATCH_REG_47 0x00100BC
#define ACP_SCRATCH_REG_48 0x00100C0
#define ACP_SCRATCH_REG_49 0x00100C4
#define ACP_SCRATCH_REG_50 0x00100C8
#define ACP_SCRATCH_REG_51 0x00100CC
#define ACP_SCRATCH_REG_52 0x00100D0
#define ACP_SCRATCH_REG_53 0x00100D4
#define ACP_SCRATCH_REG_54 0x00100D8
#define ACP_SCRATCH_REG_55 0x00100DC
#define ACP_SCRATCH_REG_56 0x00100E0
#define ACP_SCRATCH_REG_57 0x00100E4
#define ACP_SCRATCH_REG_58 0x00100E8
#define ACP_SCRATCH_REG_59 0x00100EC
#define ACP_SCRATCH_REG_60 0x00100F0
#define ACP_SCRATCH_REG_61 0x00100F4
#define ACP_SCRATCH_REG_62 0x00100F8
#define ACP_SCRATCH_REG_63 0x00100FC
#define ACP_SCRATCH_REG_64 0x0010100
#define ACP_SCRATCH_REG_65 0x0010104
#define ACP_SCRATCH_REG_66 0x0010108
#define ACP_SCRATCH_REG_67 0x001010C
#define ACP_SCRATCH_REG_68 0x0010110
#define ACP_SCRATCH_REG_69 0x0010114
#define ACP_SCRATCH_REG_70 0x0010118
#define ACP_SCRATCH_REG_71 0x001011C
#define ACP_SCRATCH_REG_72 0x0010120
#define ACP_SCRATCH_REG_73 0x0010124
#define ACP_SCRATCH_REG_74 0x0010128
#define ACP_SCRATCH_REG_75 0x001012C
#define ACP_SCRATCH_REG_76 0x0010130
#define ACP_SCRATCH_REG_77 0x0010134
#define ACP_SCRATCH_REG_78 0x0010138
#define ACP_SCRATCH_REG_79 0x001013C
#define ACP_SCRATCH_REG_80 0x0010140
#define ACP_SCRATCH_REG_81 0x0010144
#define ACP_SCRATCH_REG_82 0x0010148
#define ACP_SCRATCH_REG_83 0x001014C
#define ACP_SCRATCH_REG_84 0x0010150
#define ACP_SCRATCH_REG_85 0x0010154
#define ACP_SCRATCH_REG_86 0x0010158
#define ACP_SCRATCH_REG_87 0x001015C
#define ACP_SCRATCH_REG_88 0x0010160
#define ACP_SCRATCH_REG_89 0x0010164
#define ACP_SCRATCH_REG_90 0x0010168
#define ACP_SCRATCH_REG_91 0x001016C
#define ACP_SCRATCH_REG_92 0x0010170
#define ACP_SCRATCH_REG_93 0x0010174
#define ACP_SCRATCH_REG_94 0x0010178
#define ACP_SCRATCH_REG_95 0x001017C
#define ACP_SCRATCH_REG_96 0x0010180
#define ACP_SCRATCH_REG_97 0x0010184
#define ACP_SCRATCH_REG_98 0x0010188
#define ACP_SCRATCH_REG_99 0x001018C
#define ACP_SCRATCH_REG_100 0x0010190
#define ACP_SCRATCH_REG_101 0x0010194
#define ACP_SCRATCH_REG_102 0x0010198
#define ACP_SCRATCH_REG_103 0x001019C
#define ACP_SCRATCH_REG_104 0x00101A0
#define ACP_SCRATCH_REG_105 0x00101A4
#define ACP_SCRATCH_REG_106 0x00101A8
#define ACP_SCRATCH_REG_107 0x00101AC
#define ACP_SCRATCH_REG_108 0x00101B0
#define ACP_SCRATCH_REG_109 0x00101B4
#define ACP_SCRATCH_REG_110 0x00101B8
#define ACP_SCRATCH_REG_111 0x00101BC
#define ACP_SCRATCH_REG_112 0x00101C0
#define ACP_SCRATCH_REG_113 0x00101C4
#define ACP_SCRATCH_REG_114 0x00101C8
#define ACP_SCRATCH_REG_115 0x00101CC
#define ACP_SCRATCH_REG_116 0x00101D0
#define ACP_SCRATCH_REG_117 0x00101D4
#define ACP_SCRATCH_REG_118 0x00101D8
#define ACP_SCRATCH_REG_119 0x00101DC
#define ACP_SCRATCH_REG_120 0x00101E0
#define ACP_SCRATCH_REG_121 0x00101E4
#define ACP_SCRATCH_REG_122 0x00101E8
#define ACP_SCRATCH_REG_123 0x00101EC
#define ACP_SCRATCH_REG_124 0x00101F0
#define ACP_SCRATCH_REG_125 0x00101F4
#define ACP_SCRATCH_REG_126 0x00101F8
#define ACP_SCRATCH_REG_127 0x00101FC
#define ACP_SCRATCH_REG_128 0x0010200
#endif

View File

@ -40,6 +40,7 @@
#define CS42L42_PAGE_30 0x3000
#define CS42L42_CHIP_ID 0x42A42
#define CS42L83_CHIP_ID 0x42A83
/* Page 0x10 Global Registers */
#define CS42L42_DEVID_AB (CS42L42_PAGE_10 + 0x01)

View File

@ -258,7 +258,6 @@ struct hda_codec {
unsigned int link_down_at_suspend:1; /* link down at runtime suspend */
unsigned int relaxed_resume:1; /* don't resume forcibly for jack */
unsigned int forced_resume:1; /* forced resume for jack */
unsigned int mst_no_extra_pcms:1; /* no backup PCMs for DP-MST */
#ifdef CONFIG_PM
unsigned long power_on_acct;
@ -293,8 +292,6 @@ struct hda_codec {
#define dev_to_hda_codec(_dev) container_of(_dev, struct hda_codec, core.dev)
#define hda_codec_dev(_dev) (&(_dev)->core.dev)
#define hdac_to_hda_priv(_hdac) \
container_of(_hdac, struct hdac_hda_priv, codec.core)
#define hdac_to_hda_codec(_hdac) container_of(_hdac, struct hda_codec, core)
#define list_for_each_codec(c, bus) \

View File

@ -260,7 +260,18 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_REG_ML_LCAP 0x00
#define AZX_REG_ML_LCTL 0x04
#define AZX_ML_LCTL_CPA BIT(23)
#define AZX_ML_LCTL_CPA_SHIFT 23
#define AZX_ML_LCTL_SPA BIT(16)
#define AZX_ML_LCTL_SPA_SHIFT 16
#define AZX_ML_LCTL_SCF GENMASK(3, 0)
#define AZX_REG_ML_LOSIDV 0x08
/* bit0 is reserved, with BIT(1) mapping to stream1 */
#define AZX_ML_LOSIDV_STREAM_MASK 0xFFFE
#define AZX_REG_ML_LSDIID 0x0C
#define AZX_REG_ML_LPSOO 0x10
#define AZX_REG_ML_LPSIO 0x12
@ -268,15 +279,6 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
#define AZX_REG_ML_LOUTPAY 0x20
#define AZX_REG_ML_LINPAY 0x30
/* bit0 is reserved, with BIT(1) mapping to stream1 */
#define ML_LOSIDV_STREAM_MASK 0xFFFE
#define ML_LCTL_SCF_MASK 0xF
#define AZX_MLCTL_SPA (0x1 << 16)
#define AZX_MLCTL_CPA (0x1 << 23)
#define AZX_MLCTL_SPA_SHIFT 16
#define AZX_MLCTL_CPA_SHIFT 23
/* registers for DMA Resume Capability Structure */
#define AZX_DRSM_CAP_ID 0x5
#define AZX_REG_DRSM_CTL 0x4

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@ -10,6 +10,7 @@
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/io-64-nonatomic-lo-hi.h>
#include <linux/iopoll.h>
#include <linux/pm_runtime.h>
#include <linux/timecounter.h>
#include <sound/core.h>
@ -550,6 +551,7 @@ void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
int idx, int direction, int tag);
struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
struct snd_pcm_substream *substream);
void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev);
void snd_hdac_stream_release(struct hdac_stream *azx_dev);
struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
int dir, int stream_tag);
@ -560,8 +562,8 @@ int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
unsigned int format_val);
void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
void snd_hdac_stop_streams(struct hdac_bus *bus);
void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus);
void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
@ -589,6 +591,12 @@ int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
#define snd_hdac_stream_readb(dev, reg) \
snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
#define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us, timeout_us) \
readb_poll_timeout((dev)->sd_addr + AZX_REG_ ## reg, val, cond, \
delay_us, timeout_us)
#define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us, timeout_us) \
readl_poll_timeout((dev)->sd_addr + AZX_REG_ ## reg, val, cond, \
delay_us, timeout_us)
/* update a register, pass without AZX_REG_ prefix */
#define snd_hdac_stream_updatel(dev, reg, mask, val) \

View File

@ -11,9 +11,6 @@ int snd_hdac_ext_bus_init(struct hdac_bus *bus, struct device *dev,
const struct hdac_ext_bus_ops *ext_ops);
void snd_hdac_ext_bus_exit(struct hdac_bus *bus);
int snd_hdac_ext_bus_device_init(struct hdac_bus *bus, int addr,
struct hdac_device *hdev, int type);
void snd_hdac_ext_bus_device_exit(struct hdac_device *hdev);
void snd_hdac_ext_bus_device_remove(struct hdac_bus *bus);
#define HDA_CODEC_REV_EXT_ENTRY(_vid, _rev, _name, drv_data) \
@ -80,12 +77,9 @@ struct hdac_ext_stream {
#define stream_to_hdac_ext_stream(s) \
container_of(s, struct hdac_ext_stream, hstream)
void snd_hdac_ext_stream_init(struct hdac_bus *bus,
struct hdac_ext_stream *hext_stream, int idx,
int direction, int tag);
int snd_hdac_ext_stream_init_all(struct hdac_bus *bus, int start_idx,
int num_stream, int dir);
void snd_hdac_stream_free_all(struct hdac_bus *bus);
void snd_hdac_ext_stream_free_all(struct hdac_bus *bus);
void snd_hdac_link_free_all(struct hdac_bus *bus);
struct hdac_ext_stream *snd_hdac_ext_stream_assign(struct hdac_bus *bus,
struct snd_pcm_substream *substream,
@ -188,12 +182,6 @@ void snd_hdac_ext_bus_link_power(struct hdac_device *codec, bool enable);
#define snd_hdac_adsp_readq_poll(chip, reg, val, cond, delay_us, timeout_us) \
readq_poll_timeout((chip)->dsp_ba + (reg), val, cond, \
delay_us, timeout_us)
#define snd_hdac_stream_readb_poll(strm, reg, val, cond, delay_us, timeout_us) \
readb_poll_timeout((strm)->sd_addr + AZX_REG_ ## reg, val, cond, \
delay_us, timeout_us)
#define snd_hdac_stream_readl_poll(strm, reg, val, cond, delay_us, timeout_us) \
readl_poll_timeout((strm)->sd_addr + AZX_REG_ ## reg, val, cond, \
delay_us, timeout_us)
struct hdac_ext_device;

View File

@ -136,6 +136,8 @@ bool intel_nhlt_has_endpoint_type(struct nhlt_acpi_table *nhlt, u8 link_type);
int intel_nhlt_ssp_endpoint_mask(struct nhlt_acpi_table *nhlt, u8 device_type);
int intel_nhlt_ssp_mclk_mask(struct nhlt_acpi_table *nhlt, int ssp_num);
struct nhlt_specific_cfg *
intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt,
u32 bus_id, u8 link_type, u8 vbps, u8 bps,
@ -169,6 +171,11 @@ static inline int intel_nhlt_ssp_endpoint_mask(struct nhlt_acpi_table *nhlt, u8
return 0;
}
static inline int intel_nhlt_ssp_mclk_mask(struct nhlt_acpi_table *nhlt, int ssp_num)
{
return 0;
}
static inline struct nhlt_specific_cfg *
intel_nhlt_get_endpoint_blob(struct device *dev, struct nhlt_acpi_table *nhlt,
u32 bus_id, u8 link_type, u8 vbps, u8 bps,

View File

@ -26,9 +26,6 @@ struct snd_dma_device {
struct device *dev; /* generic device */
};
#define snd_dma_continuous_data(x) ((struct device *)(__force unsigned long)(x))
/*
* buffer types
*/

View File

@ -346,6 +346,8 @@ static inline void snd_pcm_pack_audio_tstamp_report(__u32 *data, __u32 *accuracy
struct snd_pcm_runtime {
/* -- Status -- */
snd_pcm_state_t state; /* stream state */
snd_pcm_state_t suspended_state; /* suspended stream state */
struct snd_pcm_substream *trigger_master;
struct timespec64 trigger_tstamp; /* trigger timestamp */
bool trigger_tstamp_latched; /* trigger timestamp latched in low-level driver/hardware */
@ -678,11 +680,25 @@ void snd_pcm_stream_unlock_irqrestore(struct snd_pcm_substream *substream,
*/
static inline int snd_pcm_running(struct snd_pcm_substream *substream)
{
return (substream->runtime->status->state == SNDRV_PCM_STATE_RUNNING ||
(substream->runtime->status->state == SNDRV_PCM_STATE_DRAINING &&
return (substream->runtime->state == SNDRV_PCM_STATE_RUNNING ||
(substream->runtime->state == SNDRV_PCM_STATE_DRAINING &&
substream->stream == SNDRV_PCM_STREAM_PLAYBACK));
}
/**
* __snd_pcm_set_state - Change the current PCM state
* @runtime: PCM runtime to set
* @state: the current state to set
*
* Call within the stream lock
*/
static inline void __snd_pcm_set_state(struct snd_pcm_runtime *runtime,
snd_pcm_state_t state)
{
runtime->state = state;
runtime->status->state = state; /* copy for mmap */
}
/**
* bytes_to_samples - Unit conversion of the size from bytes to samples
* @runtime: PCM runtime instance

View File

@ -39,6 +39,7 @@ struct asoc_simple_dai {
struct asoc_simple_data {
u32 convert_rate;
u32 convert_channels;
const char *convert_sample_format;
};
struct asoc_simple_jack {

View File

@ -14,7 +14,6 @@
* these tables are not constants, some fields can be used for
* pdata or machine ops
*/
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_haswell_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_broadwell_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_baytrail_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_cherrytrail_machines[];
@ -30,6 +29,7 @@ extern struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_ehl_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_jsl_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_adl_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_rpl_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_mtl_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_cnl_sdw_machines[];
@ -38,6 +38,7 @@ extern struct snd_soc_acpi_mach snd_soc_acpi_intel_cml_sdw_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_icl_sdw_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_adl_sdw_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_rpl_sdw_machines[];
extern struct snd_soc_acpi_mach snd_soc_acpi_intel_mtl_sdw_machines[];
/*

View File

@ -31,31 +31,31 @@
#define SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, xmax, xinvert, xautodisable) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = shift_left, \
.rshift = shift_right, .max = xmax, .platform_max = xmax, \
.rshift = shift_right, .max = xmax, \
.invert = xinvert, .autodisable = xautodisable})
#define SOC_DOUBLE_S_VALUE(xreg, shift_left, shift_right, xmin, xmax, xsign_bit, xinvert, xautodisable) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = shift_left, \
.rshift = shift_right, .min = xmin, .max = xmax, .platform_max = xmax, \
.rshift = shift_right, .min = xmin, .max = xmax, \
.sign_bit = xsign_bit, .invert = xinvert, .autodisable = xautodisable})
#define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert, xautodisable) \
SOC_DOUBLE_VALUE(xreg, xshift, xshift, xmax, xinvert, xautodisable)
#define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
{.reg = xreg, .max = xmax, .invert = xinvert})
#define SOC_DOUBLE_R_VALUE(xlreg, xrreg, xshift, xmax, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
.max = xmax, .platform_max = xmax, .invert = xinvert})
.max = xmax, .invert = xinvert})
#define SOC_DOUBLE_R_S_VALUE(xlreg, xrreg, xshift, xmin, xmax, xsign_bit, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
.max = xmax, .min = xmin, .platform_max = xmax, .sign_bit = xsign_bit, \
.max = xmax, .min = xmin, .sign_bit = xsign_bit, \
.invert = xinvert})
#define SOC_DOUBLE_R_RANGE_VALUE(xlreg, xrreg, xshift, xmin, xmax, xinvert) \
((unsigned long)&(struct soc_mixer_control) \
{.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \
.min = xmin, .max = xmax, .platform_max = xmax, .invert = xinvert})
.min = xmin, .max = xmax, .invert = xinvert})
#define SOC_SINGLE(xname, reg, shift, max, invert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
@ -68,7 +68,7 @@
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = xshift, \
.rshift = xshift, .min = xmin, .max = xmax, \
.platform_max = xmax, .invert = xinvert} }
.invert = xinvert} }
#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
@ -99,7 +99,7 @@
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = xshift, \
.rshift = xshift, .min = xmin, .max = xmax, \
.platform_max = xmax, .invert = xinvert} }
.invert = xinvert} }
#define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
.info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
@ -199,7 +199,7 @@
.put = snd_soc_put_volsw, \
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, \
.min = xmin, .max = xmax, .platform_max = xmax, \
.min = xmin, .max = xmax, \
.sign_bit = 7,} }
#define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
@ -273,7 +273,7 @@
.private_value = (unsigned long)&(struct soc_mixer_control) \
{.reg = xreg, .rreg = xreg, .shift = xshift, \
.rshift = xshift, .min = xmin, .max = xmax, \
.platform_max = xmax, .invert = xinvert} }
.invert = xinvert} }
#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
xhandler_get, xhandler_put, tlv_array) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
@ -1062,7 +1062,8 @@ struct snd_soc_pcm_runtime {
unsigned int params_select; /* currently selected param for dai link */
/* Dynamic PCM BE runtime data */
struct snd_soc_dpcm_runtime dpcm[2];
struct snd_soc_dpcm_runtime dpcm[SNDRV_PCM_STREAM_LAST + 1];
struct snd_soc_dapm_widget *c2c_widget[SNDRV_PCM_STREAM_LAST + 1];
long pmdown_time;
@ -1078,11 +1079,6 @@ struct snd_soc_pcm_runtime {
* asoc_rtd_to_codec()
*/
struct snd_soc_dai **dais;
unsigned int num_codecs;
unsigned int num_cpus;
struct snd_soc_dapm_widget *playback_widget;
struct snd_soc_dapm_widget *capture_widget;
struct delayed_work delayed_work;
void (*close_delayed_work_func)(struct snd_soc_pcm_runtime *rtd);
@ -1108,7 +1104,7 @@ struct snd_soc_pcm_runtime {
};
/* see soc_new_pcm_runtime() */
#define asoc_rtd_to_cpu(rtd, n) (rtd)->dais[n]
#define asoc_rtd_to_codec(rtd, n) (rtd)->dais[n + (rtd)->num_cpus]
#define asoc_rtd_to_codec(rtd, n) (rtd)->dais[n + (rtd)->dai_link->num_cpus]
#define asoc_substream_to_rtd(substream) \
(struct snd_soc_pcm_runtime *)snd_pcm_substream_chip(substream)
@ -1118,15 +1114,15 @@ struct snd_soc_pcm_runtime {
(i)++)
#define for_each_rtd_cpu_dais(rtd, i, dai) \
for ((i) = 0; \
((i) < rtd->num_cpus) && ((dai) = asoc_rtd_to_cpu(rtd, i)); \
((i) < rtd->dai_link->num_cpus) && ((dai) = asoc_rtd_to_cpu(rtd, i)); \
(i)++)
#define for_each_rtd_codec_dais(rtd, i, dai) \
for ((i) = 0; \
((i) < rtd->num_codecs) && ((dai) = asoc_rtd_to_codec(rtd, i)); \
((i) < rtd->dai_link->num_codecs) && ((dai) = asoc_rtd_to_codec(rtd, i)); \
(i)++)
#define for_each_rtd_dais(rtd, i, dai) \
for ((i) = 0; \
((i) < (rtd)->num_cpus + (rtd)->num_codecs) && \
((i) < (rtd)->dai_link->num_cpus + (rtd)->dai_link->num_codecs) && \
((dai) = (rtd)->dais[i]); \
(i)++)

View File

@ -89,6 +89,7 @@ struct snd_sof_pdata {
/* machine */
struct platform_device *pdev_mach;
const struct snd_soc_acpi_mach *machine;
const struct snd_sof_of_mach *of_machine;
void *hw_pdata;
@ -102,6 +103,7 @@ struct snd_sof_pdata {
struct sof_dev_desc {
/* list of machines using this configuration */
struct snd_soc_acpi_mach *machines;
struct snd_sof_of_mach *of_machines;
/* alternate list of machines using this configuration */
struct snd_soc_acpi_mach *alt_machines;

View File

@ -117,11 +117,11 @@ struct sof_ipc_ctrl_data {
/* control data - add new types if needed */
union {
/* channel values can be used by volume type controls */
struct sof_ipc_ctrl_value_chan chanv[0];
DECLARE_FLEX_ARRAY(struct sof_ipc_ctrl_value_chan, chanv);
/* component values used by routing controls like mux, mixer */
struct sof_ipc_ctrl_value_comp compv[0];
DECLARE_FLEX_ARRAY(struct sof_ipc_ctrl_value_comp, compv);
/* data can be used by binary controls */
struct sof_abi_hdr data[0];
DECLARE_FLEX_ARRAY(struct sof_abi_hdr, data);
};
} __packed;

View File

@ -84,6 +84,7 @@ enum sof_ipc_dai_type {
SOF_DAI_AMD_BT, /**< AMD ACP BT*/
SOF_DAI_AMD_SP, /**< AMD ACP SP */
SOF_DAI_AMD_DMIC, /**< AMD ACP DMIC */
SOF_DAI_AMD_HS, /**< Amd HS */
SOF_DAI_MEDIATEK_AFE, /**< Mediatek AFE */
};
@ -112,6 +113,7 @@ struct sof_ipc_dai_config {
struct sof_ipc_dai_acp_params acpbt;
struct sof_ipc_dai_acp_params acpsp;
struct sof_ipc_dai_acpdmic_params acpdmic;
struct sof_ipc_dai_acp_params acphs;
struct sof_ipc_dai_mtk_afe_params afe;
};
} __packed;

View File

@ -427,6 +427,11 @@ struct sof_ipc4_dx_state_info {
#define SOF_IPC4_NOTIFICATION_TYPE_GET(x) (((x) & SOF_IPC4_NOTIFICATION_TYPE_MASK) >> \
SOF_IPC4_NOTIFICATION_TYPE_SHIFT)
#define SOF_IPC4_LOG_CORE_SHIFT 12
#define SOF_IPC4_LOG_CORE_MASK GENMASK(15, 12)
#define SOF_IPC4_LOG_CORE_GET(x) (((x) & SOF_IPC4_LOG_CORE_MASK) >> \
SOF_IPC4_LOG_CORE_SHIFT)
/* Value of notification type field - must fit into 8 bits */
enum sof_ipc4_notification_type {
/* Phrase detected (notification from WoV module) */

121
include/trace/events/sof.h Normal file
View File

@ -0,0 +1,121 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright(c) 2022 Intel Corporation. All rights reserved.
*
* Author: Noah Klayman <noah.klayman@intel.com>
*/
#undef TRACE_SYSTEM
#define TRACE_SYSTEM sof
#if !defined(_TRACE_SOF_H) || defined(TRACE_HEADER_MULTI_READ)
#define _TRACE_SOF_H
#include <linux/tracepoint.h>
#include <linux/types.h>
#include <sound/sof/stream.h>
#include "../../../sound/soc/sof/sof-audio.h"
DECLARE_EVENT_CLASS(sof_widget_template,
TP_PROTO(struct snd_sof_widget *swidget),
TP_ARGS(swidget),
TP_STRUCT__entry(
__string(name, swidget->widget->name)
__field(int, use_count)
),
TP_fast_assign(
__assign_str(name, swidget->widget->name);
__entry->use_count = swidget->use_count;
),
TP_printk("name=%s use_count=%d", __get_str(name), __entry->use_count)
);
DEFINE_EVENT(sof_widget_template, sof_widget_setup,
TP_PROTO(struct snd_sof_widget *swidget),
TP_ARGS(swidget)
);
DEFINE_EVENT(sof_widget_template, sof_widget_free,
TP_PROTO(struct snd_sof_widget *swidget),
TP_ARGS(swidget)
);
TRACE_EVENT(sof_ipc3_period_elapsed_position,
TP_PROTO(struct snd_sof_dev *sdev, struct sof_ipc_stream_posn *posn),
TP_ARGS(sdev, posn),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__field(u64, host_posn)
__field(u64, dai_posn)
__field(u64, wallclock)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__entry->host_posn = posn->host_posn;
__entry->dai_posn = posn->dai_posn;
__entry->wallclock = posn->wallclock;
),
TP_printk("device_name=%s host_posn=%#llx dai_posn=%#llx wallclock=%#llx",
__get_str(device_name), __entry->host_posn, __entry->dai_posn,
__entry->wallclock)
);
TRACE_EVENT(sof_pcm_pointer_position,
TP_PROTO(struct snd_sof_dev *sdev,
struct snd_sof_pcm *spcm,
struct snd_pcm_substream *substream,
snd_pcm_uframes_t dma_posn,
snd_pcm_uframes_t dai_posn
),
TP_ARGS(sdev, spcm, substream, dma_posn, dai_posn),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__field(u32, pcm_id)
__field(int, stream)
__field(unsigned long, dma_posn)
__field(unsigned long, dai_posn)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__entry->pcm_id = le32_to_cpu(spcm->pcm.pcm_id);
__entry->stream = substream->stream;
__entry->dma_posn = dma_posn;
__entry->dai_posn = dai_posn;
),
TP_printk("device_name=%s pcm_id=%d stream=%d dma_posn=%lu dai_posn=%lu",
__get_str(device_name), __entry->pcm_id, __entry->stream,
__entry->dma_posn, __entry->dai_posn)
);
TRACE_EVENT(sof_stream_position_ipc_rx,
TP_PROTO(struct device *dev),
TP_ARGS(dev),
TP_STRUCT__entry(
__string(device_name, dev_name(dev))
),
TP_fast_assign(
__assign_str(device_name, dev_name(dev));
),
TP_printk("device_name=%s", __get_str(device_name))
);
TRACE_EVENT(sof_ipc4_fw_config,
TP_PROTO(struct snd_sof_dev *sdev, char *key, u32 value),
TP_ARGS(sdev, key, value),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__string(key, key)
__field(u32, value)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__assign_str(key, key);
__entry->value = value;
),
TP_printk("device_name=%s key=%s value=%d",
__get_str(device_name), __get_str(key), __entry->value)
);
#endif /* _TRACE_SOF_H */
/* This part must be outside protection */
#include <trace/define_trace.h>

View File

@ -0,0 +1,148 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright(c) 2022 Intel Corporation. All rights reserved.
*
* Author: Noah Klayman <noah.klayman@intel.com>
*/
#undef TRACE_SYSTEM
#define TRACE_SYSTEM sof_intel
#if !defined(_TRACE_SOF_INTEL_H) || defined(TRACE_HEADER_MULTI_READ)
#define _TRACE_SOF_INTEL_H
#include <linux/tracepoint.h>
#include <sound/hdaudio.h>
#include "../../../sound/soc/sof/sof-audio.h"
TRACE_EVENT(sof_intel_hda_irq,
TP_PROTO(struct snd_sof_dev *sdev, char *source),
TP_ARGS(sdev, source),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__string(source, source)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__assign_str(source, source);
),
TP_printk("device_name=%s source=%s",
__get_str(device_name), __get_str(source))
);
DECLARE_EVENT_CLASS(sof_intel_ipc_firmware_template,
TP_ARGS(struct snd_sof_dev *sdev, u32 msg, u32 msg_ext),
TP_PROTO(sdev, msg, msg_ext),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__field(u32, msg)
__field(u32, msg_ext)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__entry->msg = msg;
__entry->msg_ext = msg_ext;
),
TP_printk("device_name=%s msg=%#x msg_ext=%#x",
__get_str(device_name), __entry->msg, __entry->msg_ext)
);
DEFINE_EVENT(sof_intel_ipc_firmware_template, sof_intel_ipc_firmware_response,
TP_PROTO(struct snd_sof_dev *sdev, u32 msg, u32 msg_ext),
TP_ARGS(sdev, msg, msg_ext)
);
DEFINE_EVENT(sof_intel_ipc_firmware_template, sof_intel_ipc_firmware_initiated,
TP_PROTO(struct snd_sof_dev *sdev, u32 msg, u32 msg_ext),
TP_ARGS(sdev, msg, msg_ext)
);
TRACE_EVENT(sof_intel_D0I3C_updated,
TP_PROTO(struct snd_sof_dev *sdev, u8 reg),
TP_ARGS(sdev, reg),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__field(u8, reg)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__entry->reg = reg;
),
TP_printk("device_name=%s register=%#x",
__get_str(device_name), __entry->reg)
);
TRACE_EVENT(sof_intel_hda_irq_ipc_check,
TP_PROTO(struct snd_sof_dev *sdev, u32 irq_status),
TP_ARGS(sdev, irq_status),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__field(u32, irq_status)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__entry->irq_status = irq_status;
),
TP_printk("device_name=%s irq_status=%#x",
__get_str(device_name), __entry->irq_status)
);
TRACE_EVENT(sof_intel_hda_dsp_pcm,
TP_PROTO(struct snd_sof_dev *sdev,
struct hdac_stream *hstream,
struct snd_pcm_substream *substream,
snd_pcm_uframes_t pos
),
TP_ARGS(sdev, hstream, substream, pos),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__field(u32, hstream_index)
__field(u32, substream)
__field(unsigned long, pos)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__entry->hstream_index = hstream->index;
__entry->substream = substream->stream;
__entry->pos = pos;
),
TP_printk("device_name=%s hstream_index=%d substream=%d pos=%lu",
__get_str(device_name), __entry->hstream_index,
__entry->substream, __entry->pos)
);
TRACE_EVENT(sof_intel_hda_dsp_stream_status,
TP_PROTO(struct device *dev, struct hdac_stream *s, u32 status),
TP_ARGS(dev, s, status),
TP_STRUCT__entry(
__string(device_name, dev_name(dev))
__field(u32, stream)
__field(u32, status)
),
TP_fast_assign(
__assign_str(device_name, dev_name(dev));
__entry->stream = s->index;
__entry->status = status;
),
TP_printk("device_name=%s stream=%d status=%#x",
__get_str(device_name), __entry->stream, __entry->status)
);
TRACE_EVENT(sof_intel_hda_dsp_check_stream_irq,
TP_PROTO(struct snd_sof_dev *sdev, u32 status),
TP_ARGS(sdev, status),
TP_STRUCT__entry(
__string(device_name, dev_name(sdev->dev))
__field(u32, status)
),
TP_fast_assign(
__assign_str(device_name, dev_name(sdev->dev));
__entry->status = status;
),
TP_printk("device_name=%s status=%#x",
__get_str(device_name), __entry->status)
);
#endif /* _TRACE_SOF_INTEL_H */
/* This part must be outside protection */
#include <trace/define_trace.h>

View File

@ -3,22 +3,6 @@
* Main header file for the ALSA sequencer
* Copyright (c) 1998-1999 by Frank van de Pol <fvdpol@coil.demon.nl>
* (c) 1998-1999 by Jaroslav Kysela <perex@perex.cz>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef _UAPI__SOUND_ASEQUENCER_H
#define _UAPI__SOUND_ASEQUENCER_H

View File

@ -5,10 +5,6 @@
* Copyright (C) 2012 Texas Instruments Inc.
* Copyright (C) 2015 Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Simple file API to load FW that includes mixers, coefficients, DAPM graphs,
* algorithms, equalisers, DAIs, widgets etc.
*/

View File

@ -3,22 +3,6 @@
* Advanced Linux Sound Architecture - ALSA - Driver
* Copyright (c) 1994-2003 by Jaroslav Kysela <perex@perex.cz>,
* Abramo Bagnara <abramo@alsa-project.org>
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef _UAPI__SOUND_ASOUND_H

View File

@ -10,21 +10,6 @@
* 4Front Technologies
*
* Direct FM control
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#define SNDRV_DM_FM_MODE_OPL2 0x00

View File

@ -5,23 +5,6 @@
* Copyright (C) 2011 Intel Corporation
* Authors: Vinod Koul <vinod.koul@linux.intel.com>
* Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
*
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*
*/
#ifndef __COMPRESS_OFFLOAD_H
#define __COMPRESS_OFFLOAD_H

View File

@ -7,47 +7,13 @@
* Authors: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
* Vinod Koul <vinod.koul@linux.intel.com>
*
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
*
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*
* The definitions in this file are derived from the OpenMAX AL version 1.1
* and OpenMAX IL v 1.1.2 header files which contain the copyright notice below.
* and OpenMAX IL v 1.1.2 header files which contain the copyright notice below
* and are licensed under the MIT license.
*
* Copyright (c) 2007-2010 The Khronos Group Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and/or associated documentation files (the
* "Materials "), to deal in the Materials without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sublicense, and/or sell copies of the Materials, and to
* permit persons to whom the Materials are furnished to do so, subject to
* the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Materials.
*
* THE MATERIALS ARE PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* MATERIALS OR THE USE OR OTHER DEALINGS IN THE MATERIALS.
*
*/
#ifndef __SND_COMPRESS_PARAMS_H
#define __SND_COMPRESS_PARAMS_H

View File

@ -3,22 +3,6 @@
* Copyright (c) by Jaroslav Kysela <perex@perex.cz>,
* Creative Labs, Inc.
* Definitions for EMU10K1 (SB Live!) chips
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef _UAPI__SOUND_EMU10K1_H
#define _UAPI__SOUND_EMU10K1_H

View File

@ -4,20 +4,6 @@
/*
* Copyright (C) 2003 Thomas Charbonnel (thomas@undata.org)
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifdef __linux__

View File

@ -4,21 +4,6 @@
/*
* Copyright (C) 2003 Winfried Ritsch (IEM)
* based on hdsp.h from Thomas Charbonnel (thomas@undata.org)
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifdef __linux__

View File

@ -4,21 +4,6 @@
* Takashi Iwai <tiwai@suse.de>
*
* SB16ASP/AWE32 CSP control
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#ifndef _UAPI__SOUND_SB16_CSP_H
#define _UAPI__SOUND_SB16_CSP_H

View File

@ -6,21 +6,6 @@
* Patch record compatible with AWE driver on OSS
*
* Copyright (C) 1999-2000 Takashi Iwai
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <sound/asound.h>

View File

@ -4,16 +4,6 @@
*
* Copyright (C) 2016 Intel Corp
* Author: Shreyas NC <shreyas.nc@intel.com>
* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as version 2, as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*/
#ifndef __SND_SST_TOKENS_H__
#define __SND_SST_TOKENS_H__

View File

@ -1,15 +1,4 @@
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __UAPI_SOUND_TLV_H
#define __UAPI_SOUND_TLV_H

View File

@ -1,20 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
/*
* Copyright (C) 2007, 2008 Karsten Wiese <fzu@wemgehoertderstaat.de>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software Foundation,
* Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#ifndef _UAPI__SOUND_USB_STREAM_H

View File

@ -131,6 +131,50 @@ void string_get_size(u64 size, u64 blk_size, const enum string_size_units units,
}
EXPORT_SYMBOL(string_get_size);
/**
* parse_int_array_user - Split string into a sequence of integers
* @from: The user space buffer to read from
* @count: The maximum number of bytes to read
* @array: Returned pointer to sequence of integers
*
* On success @array is allocated and initialized with a sequence of
* integers extracted from the @from plus an additional element that
* begins the sequence and specifies the integers count.
*
* Caller takes responsibility for freeing @array when it is no longer
* needed.
*/
int parse_int_array_user(const char __user *from, size_t count, int **array)
{
int *ints, nints;
char *buf;
int ret = 0;
buf = memdup_user_nul(from, count);
if (IS_ERR(buf))
return PTR_ERR(buf);
get_options(buf, 0, &nints);
if (!nints) {
ret = -ENOENT;
goto free_buf;
}
ints = kcalloc(nints + 1, sizeof(*ints), GFP_KERNEL);
if (!ints) {
ret = -ENOMEM;
goto free_buf;
}
get_options(buf, nints + 1, ints);
*array = ints;
free_buf:
kfree(buf);
return ret;
}
EXPORT_SYMBOL(parse_int_array_user);
static bool unescape_space(char **src, char **dst)
{
char *p = *dst, *q = *src;

View File

@ -18,25 +18,18 @@
#include <sound/memalloc.h>
#include "memalloc_local.h"
#define DEFAULT_GFP \
(GFP_KERNEL | \
__GFP_COMP | /* compound page lets parts be mapped */ \
__GFP_RETRY_MAYFAIL | /* don't trigger OOM-killer */ \
__GFP_NOWARN) /* no stack trace print - this call is non-critical */
static const struct snd_malloc_ops *snd_dma_get_ops(struct snd_dma_buffer *dmab);
#ifdef CONFIG_SND_DMA_SGBUF
static void *do_alloc_fallback_pages(struct device *dev, size_t size,
dma_addr_t *addr, bool wc);
static void do_free_fallback_pages(void *p, size_t size, bool wc);
static void *snd_dma_sg_fallback_alloc(struct snd_dma_buffer *dmab, size_t size);
#endif
/* a cast to gfp flag from the dev pointer; for CONTINUOUS and VMALLOC types */
static inline gfp_t snd_mem_get_gfp_flags(const struct snd_dma_buffer *dmab,
gfp_t default_gfp)
{
if (!dmab->dev.dev)
return default_gfp;
else
return (__force gfp_t)(unsigned long)dmab->dev.dev;
}
static void *__snd_dma_alloc_pages(struct snd_dma_buffer *dmab, size_t size)
{
const struct snd_malloc_ops *ops = snd_dma_get_ops(dmab);
@ -284,24 +277,54 @@ EXPORT_SYMBOL(snd_sgbuf_get_chunk_size);
/*
* Continuous pages allocator
*/
static void *do_alloc_pages(size_t size, dma_addr_t *addr, gfp_t gfp)
static void *do_alloc_pages(struct device *dev, size_t size, dma_addr_t *addr,
bool wc)
{
void *p = alloc_pages_exact(size, gfp);
void *p;
gfp_t gfp = GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN;
if (p)
*addr = page_to_phys(virt_to_page(p));
again:
p = alloc_pages_exact(size, gfp);
if (!p)
return NULL;
*addr = page_to_phys(virt_to_page(p));
if (!dev)
return p;
if ((*addr + size - 1) & ~dev->coherent_dma_mask) {
if (IS_ENABLED(CONFIG_ZONE_DMA32) && !(gfp & GFP_DMA32)) {
gfp |= GFP_DMA32;
goto again;
}
if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
goto again;
}
}
#ifdef CONFIG_X86
if (wc)
set_memory_wc((unsigned long)(p), size >> PAGE_SHIFT);
#endif
return p;
}
static void do_free_pages(void *p, size_t size, bool wc)
{
#ifdef CONFIG_X86
if (wc)
set_memory_wb((unsigned long)(p), size >> PAGE_SHIFT);
#endif
free_pages_exact(p, size);
}
static void *snd_dma_continuous_alloc(struct snd_dma_buffer *dmab, size_t size)
{
return do_alloc_pages(size, &dmab->addr,
snd_mem_get_gfp_flags(dmab, GFP_KERNEL));
return do_alloc_pages(dmab->dev.dev, size, &dmab->addr, false);
}
static void snd_dma_continuous_free(struct snd_dma_buffer *dmab)
{
free_pages_exact(dmab->area, dmab->bytes);
do_free_pages(dmab->area, dmab->bytes, false);
}
static int snd_dma_continuous_mmap(struct snd_dma_buffer *dmab,
@ -324,9 +347,7 @@ static const struct snd_malloc_ops snd_dma_continuous_ops = {
*/
static void *snd_dma_vmalloc_alloc(struct snd_dma_buffer *dmab, size_t size)
{
gfp_t gfp = snd_mem_get_gfp_flags(dmab, GFP_KERNEL | __GFP_HIGHMEM);
return __vmalloc(size, gfp);
return vmalloc(size);
}
static void snd_dma_vmalloc_free(struct snd_dma_buffer *dmab)
@ -440,12 +461,6 @@ static const struct snd_malloc_ops snd_dma_iram_ops = {
};
#endif /* CONFIG_GENERIC_ALLOCATOR */
#define DEFAULT_GFP \
(GFP_KERNEL | \
__GFP_COMP | /* compound page lets parts be mapped */ \
__GFP_NORETRY | /* don't trigger OOM-killer */ \
__GFP_NOWARN) /* no stack trace print - this call is non-critical */
/*
* Coherent device pages allocator
*/
@ -479,12 +494,12 @@ static const struct snd_malloc_ops snd_dma_dev_ops = {
#ifdef CONFIG_SND_DMA_SGBUF
static void *snd_dma_wc_alloc(struct snd_dma_buffer *dmab, size_t size)
{
return do_alloc_fallback_pages(dmab->dev.dev, size, &dmab->addr, true);
return do_alloc_pages(dmab->dev.dev, size, &dmab->addr, true);
}
static void snd_dma_wc_free(struct snd_dma_buffer *dmab)
{
do_free_fallback_pages(dmab->area, dmab->bytes, true);
do_free_pages(dmab->area, dmab->bytes, true);
}
static int snd_dma_wc_mmap(struct snd_dma_buffer *dmab,
@ -700,37 +715,6 @@ static const struct snd_malloc_ops snd_dma_sg_wc_ops = {
.get_chunk_size = snd_dma_noncontig_get_chunk_size,
};
/* manual page allocations with wc setup */
static void *do_alloc_fallback_pages(struct device *dev, size_t size,
dma_addr_t *addr, bool wc)
{
gfp_t gfp = GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN;
void *p;
again:
p = do_alloc_pages(size, addr, gfp);
if (!p || (*addr + size - 1) & ~dev->coherent_dma_mask) {
if (IS_ENABLED(CONFIG_ZONE_DMA32) && !(gfp & GFP_DMA32)) {
gfp |= GFP_DMA32;
goto again;
}
if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
goto again;
}
}
if (p && wc)
set_memory_wc((unsigned long)(p), size >> PAGE_SHIFT);
return p;
}
static void do_free_fallback_pages(void *p, size_t size, bool wc)
{
if (wc)
set_memory_wb((unsigned long)(p), size >> PAGE_SHIFT);
free_pages_exact(p, size);
}
/* Fallback SG-buffer allocations for x86 */
struct snd_dma_sg_fallback {
size_t count;
@ -745,7 +729,7 @@ static void __snd_dma_sg_fallback_free(struct snd_dma_buffer *dmab,
size_t i;
for (i = 0; i < sgbuf->count && sgbuf->pages[i]; i++)
do_free_fallback_pages(page_address(sgbuf->pages[i]), PAGE_SIZE, wc);
do_free_pages(page_address(sgbuf->pages[i]), PAGE_SIZE, wc);
kvfree(sgbuf->pages);
kvfree(sgbuf->addrs);
kfree(sgbuf);
@ -772,8 +756,7 @@ static void *snd_dma_sg_fallback_alloc(struct snd_dma_buffer *dmab, size_t size)
goto error;
for (i = 0; i < count; sgbuf->count++, i++) {
p = do_alloc_fallback_pages(dmab->dev.dev, PAGE_SIZE,
&sgbuf->addrs[i], wc);
p = do_alloc_pages(dmab->dev.dev, PAGE_SIZE, &sgbuf->addrs[i], wc);
if (!p)
goto error;
sgbuf->pages[i] = virt_to_page(p);

View File

@ -13,8 +13,4 @@ struct snd_malloc_ops {
void (*sync)(struct snd_dma_buffer *dmab, enum snd_dma_sync_mode mode);
};
#ifdef CONFIG_SND_DMA_SGBUF
extern const struct snd_malloc_ops snd_dma_sg_ops;
#endif
#endif /* __MEMALLOC_LOCAL_H */

View File

@ -1237,12 +1237,12 @@ snd_pcm_sframes_t snd_pcm_oss_write3(struct snd_pcm_substream *substream, const
struct snd_pcm_runtime *runtime = substream->runtime;
int ret;
while (1) {
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
if (runtime->state == SNDRV_PCM_STATE_XRUN ||
runtime->state == SNDRV_PCM_STATE_SUSPENDED) {
#ifdef OSS_DEBUG
pcm_dbg(substream->pcm,
"pcm_oss: write: recovering from %s\n",
runtime->status->state == SNDRV_PCM_STATE_XRUN ?
runtime->state == SNDRV_PCM_STATE_XRUN ?
"XRUN" : "SUSPEND");
#endif
ret = snd_pcm_oss_prepare(substream);
@ -1257,7 +1257,7 @@ snd_pcm_sframes_t snd_pcm_oss_write3(struct snd_pcm_substream *substream, const
break;
/* test, if we can't store new data, because the stream */
/* has not been started */
if (runtime->status->state == SNDRV_PCM_STATE_PREPARED)
if (runtime->state == SNDRV_PCM_STATE_PREPARED)
return -EAGAIN;
}
return ret;
@ -1269,18 +1269,18 @@ snd_pcm_sframes_t snd_pcm_oss_read3(struct snd_pcm_substream *substream, char *p
snd_pcm_sframes_t delay;
int ret;
while (1) {
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
if (runtime->state == SNDRV_PCM_STATE_XRUN ||
runtime->state == SNDRV_PCM_STATE_SUSPENDED) {
#ifdef OSS_DEBUG
pcm_dbg(substream->pcm,
"pcm_oss: read: recovering from %s\n",
runtime->status->state == SNDRV_PCM_STATE_XRUN ?
runtime->state == SNDRV_PCM_STATE_XRUN ?
"XRUN" : "SUSPEND");
#endif
ret = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DRAIN, NULL);
if (ret < 0)
break;
} else if (runtime->status->state == SNDRV_PCM_STATE_SETUP) {
} else if (runtime->state == SNDRV_PCM_STATE_SETUP) {
ret = snd_pcm_oss_prepare(substream);
if (ret < 0)
break;
@ -1293,7 +1293,7 @@ snd_pcm_sframes_t snd_pcm_oss_read3(struct snd_pcm_substream *substream, char *p
frames, in_kernel);
mutex_lock(&runtime->oss.params_lock);
if (ret == -EPIPE) {
if (runtime->status->state == SNDRV_PCM_STATE_DRAINING) {
if (runtime->state == SNDRV_PCM_STATE_DRAINING) {
ret = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DROP, NULL);
if (ret < 0)
break;
@ -1312,12 +1312,12 @@ snd_pcm_sframes_t snd_pcm_oss_writev3(struct snd_pcm_substream *substream, void
struct snd_pcm_runtime *runtime = substream->runtime;
int ret;
while (1) {
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
if (runtime->state == SNDRV_PCM_STATE_XRUN ||
runtime->state == SNDRV_PCM_STATE_SUSPENDED) {
#ifdef OSS_DEBUG
pcm_dbg(substream->pcm,
"pcm_oss: writev: recovering from %s\n",
runtime->status->state == SNDRV_PCM_STATE_XRUN ?
runtime->state == SNDRV_PCM_STATE_XRUN ?
"XRUN" : "SUSPEND");
#endif
ret = snd_pcm_oss_prepare(substream);
@ -1330,7 +1330,7 @@ snd_pcm_sframes_t snd_pcm_oss_writev3(struct snd_pcm_substream *substream, void
/* test, if we can't store new data, because the stream */
/* has not been started */
if (runtime->status->state == SNDRV_PCM_STATE_PREPARED)
if (runtime->state == SNDRV_PCM_STATE_PREPARED)
return -EAGAIN;
}
return ret;
@ -1341,18 +1341,18 @@ snd_pcm_sframes_t snd_pcm_oss_readv3(struct snd_pcm_substream *substream, void *
struct snd_pcm_runtime *runtime = substream->runtime;
int ret;
while (1) {
if (runtime->status->state == SNDRV_PCM_STATE_XRUN ||
runtime->status->state == SNDRV_PCM_STATE_SUSPENDED) {
if (runtime->state == SNDRV_PCM_STATE_XRUN ||
runtime->state == SNDRV_PCM_STATE_SUSPENDED) {
#ifdef OSS_DEBUG
pcm_dbg(substream->pcm,
"pcm_oss: readv: recovering from %s\n",
runtime->status->state == SNDRV_PCM_STATE_XRUN ?
runtime->state == SNDRV_PCM_STATE_XRUN ?
"XRUN" : "SUSPEND");
#endif
ret = snd_pcm_kernel_ioctl(substream, SNDRV_PCM_IOCTL_DRAIN, NULL);
if (ret < 0)
break;
} else if (runtime->status->state == SNDRV_PCM_STATE_SETUP) {
} else if (runtime->state == SNDRV_PCM_STATE_SETUP) {
ret = snd_pcm_oss_prepare(substream);
if (ret < 0)
break;
@ -1635,7 +1635,7 @@ static int snd_pcm_oss_sync1(struct snd_pcm_substream *substream, size_t size)
result = 0;
set_current_state(TASK_INTERRUPTIBLE);
snd_pcm_stream_lock_irq(substream);
state = runtime->status->state;
state = runtime->state;
snd_pcm_stream_unlock_irq(substream);
if (state != SNDRV_PCM_STATE_RUNNING) {
set_current_state(TASK_RUNNING);
@ -2854,8 +2854,8 @@ static __poll_t snd_pcm_oss_poll(struct file *file, poll_table * wait)
struct snd_pcm_runtime *runtime = psubstream->runtime;
poll_wait(file, &runtime->sleep, wait);
snd_pcm_stream_lock_irq(psubstream);
if (runtime->status->state != SNDRV_PCM_STATE_DRAINING &&
(runtime->status->state != SNDRV_PCM_STATE_RUNNING ||
if (runtime->state != SNDRV_PCM_STATE_DRAINING &&
(runtime->state != SNDRV_PCM_STATE_RUNNING ||
snd_pcm_oss_playback_ready(psubstream)))
mask |= EPOLLOUT | EPOLLWRNORM;
snd_pcm_stream_unlock_irq(psubstream);
@ -2865,7 +2865,7 @@ static __poll_t snd_pcm_oss_poll(struct file *file, poll_table * wait)
snd_pcm_state_t ostate;
poll_wait(file, &runtime->sleep, wait);
snd_pcm_stream_lock_irq(csubstream);
ostate = runtime->status->state;
ostate = runtime->state;
if (ostate != SNDRV_PCM_STATE_RUNNING ||
snd_pcm_oss_capture_ready(csubstream))
mask |= EPOLLIN | EPOLLRDNORM;

View File

@ -387,7 +387,7 @@ static void snd_pcm_substream_proc_hw_params_read(struct snd_info_entry *entry,
snd_iprintf(buffer, "closed\n");
goto unlock;
}
if (runtime->status->state == SNDRV_PCM_STATE_OPEN) {
if (runtime->state == SNDRV_PCM_STATE_OPEN) {
snd_iprintf(buffer, "no setup\n");
goto unlock;
}
@ -424,7 +424,7 @@ static void snd_pcm_substream_proc_sw_params_read(struct snd_info_entry *entry,
snd_iprintf(buffer, "closed\n");
goto unlock;
}
if (runtime->status->state == SNDRV_PCM_STATE_OPEN) {
if (runtime->state == SNDRV_PCM_STATE_OPEN) {
snd_iprintf(buffer, "no setup\n");
goto unlock;
}
@ -970,7 +970,7 @@ int snd_pcm_attach_substream(struct snd_pcm *pcm, int stream,
init_waitqueue_head(&runtime->sleep);
init_waitqueue_head(&runtime->tsleep);
runtime->status->state = SNDRV_PCM_STATE_OPEN;
__snd_pcm_set_state(runtime, SNDRV_PCM_STATE_OPEN);
mutex_init(&runtime->buffer_mutex);
atomic_set(&runtime->buffer_accessing, 0);
@ -1112,7 +1112,8 @@ static int snd_pcm_dev_disconnect(struct snd_device *device)
if (snd_pcm_running(substream))
snd_pcm_stop(substream, SNDRV_PCM_STATE_DISCONNECTED);
/* to be sure, set the state unconditionally */
substream->runtime->status->state = SNDRV_PCM_STATE_DISCONNECTED;
__snd_pcm_set_state(substream->runtime,
SNDRV_PCM_STATE_DISCONNECTED);
wake_up(&substream->runtime->sleep);
wake_up(&substream->runtime->tsleep);
}

View File

@ -295,7 +295,7 @@ static int snd_pcm_ioctl_xferi_compat(struct snd_pcm_substream *substream,
return -ENOTTY;
if (substream->stream != dir)
return -EINVAL;
if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN)
if (substream->runtime->state == SNDRV_PCM_STATE_OPEN)
return -EBADFD;
if (get_user(buf, &data32->buf) ||
@ -341,7 +341,7 @@ static int snd_pcm_ioctl_xfern_compat(struct snd_pcm_substream *substream,
return -ENOTTY;
if (substream->stream != dir)
return -EINVAL;
if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN)
if (substream->runtime->state == SNDRV_PCM_STATE_OPEN)
return -EBADFD;
ch = substream->runtime->channels;

View File

@ -133,12 +133,14 @@ EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_set_config_from_dai_data);
static void dmaengine_pcm_dma_complete(void *arg)
{
unsigned int new_pos;
struct snd_pcm_substream *substream = arg;
struct dmaengine_pcm_runtime_data *prtd = substream_to_prtd(substream);
prtd->pos += snd_pcm_lib_period_bytes(substream);
if (prtd->pos >= snd_pcm_lib_buffer_bytes(substream))
prtd->pos = 0;
new_pos = prtd->pos + snd_pcm_lib_period_bytes(substream);
if (new_pos >= snd_pcm_lib_buffer_bytes(substream))
new_pos = 0;
prtd->pos = new_pos;
snd_pcm_period_elapsed(substream);
}

View File

@ -186,7 +186,7 @@ int snd_pcm_update_state(struct snd_pcm_substream *substream,
avail = snd_pcm_avail(substream);
if (avail > runtime->avail_max)
runtime->avail_max = avail;
if (runtime->status->state == SNDRV_PCM_STATE_DRAINING) {
if (runtime->state == SNDRV_PCM_STATE_DRAINING) {
if (avail >= runtime->buffer_size) {
snd_pcm_drain_done(substream);
return -EPIPE;
@ -1911,7 +1911,7 @@ static int wait_for_avail(struct snd_pcm_substream *substream,
snd_pcm_stream_lock_irq(substream);
set_current_state(TASK_INTERRUPTIBLE);
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_SUSPENDED:
err = -ESTRPIPE;
goto _endloop;
@ -2099,14 +2099,14 @@ static int pcm_sanity_check(struct snd_pcm_substream *substream)
runtime = substream->runtime;
if (snd_BUG_ON(!substream->ops->copy_user && !runtime->dma_area))
return -EINVAL;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN)
if (runtime->state == SNDRV_PCM_STATE_OPEN)
return -EBADFD;
return 0;
}
static int pcm_accessible_state(struct snd_pcm_runtime *runtime)
{
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_PREPARED:
case SNDRV_PCM_STATE_RUNNING:
case SNDRV_PCM_STATE_PAUSED:
@ -2225,7 +2225,7 @@ snd_pcm_sframes_t __snd_pcm_lib_xfer(struct snd_pcm_substream *substream,
goto _end_unlock;
runtime->twake = runtime->control->avail_min ? : 1;
if (runtime->status->state == SNDRV_PCM_STATE_RUNNING)
if (runtime->state == SNDRV_PCM_STATE_RUNNING)
snd_pcm_update_hw_ptr(substream);
/*
@ -2233,7 +2233,7 @@ snd_pcm_sframes_t __snd_pcm_lib_xfer(struct snd_pcm_substream *substream,
* thread may start capture
*/
if (!is_playback &&
runtime->status->state == SNDRV_PCM_STATE_PREPARED &&
runtime->state == SNDRV_PCM_STATE_PREPARED &&
size >= runtime->start_threshold) {
err = snd_pcm_start(substream);
if (err < 0)
@ -2247,7 +2247,7 @@ snd_pcm_sframes_t __snd_pcm_lib_xfer(struct snd_pcm_substream *substream,
snd_pcm_uframes_t cont;
if (!avail) {
if (!is_playback &&
runtime->status->state == SNDRV_PCM_STATE_DRAINING) {
runtime->state == SNDRV_PCM_STATE_DRAINING) {
snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
goto _end_unlock;
}
@ -2303,7 +2303,7 @@ snd_pcm_sframes_t __snd_pcm_lib_xfer(struct snd_pcm_substream *substream,
xfer += frames;
avail -= frames;
if (is_playback &&
runtime->status->state == SNDRV_PCM_STATE_PREPARED &&
runtime->state == SNDRV_PCM_STATE_PREPARED &&
snd_pcm_playback_hw_avail(runtime) >= (snd_pcm_sframes_t)runtime->start_threshold) {
err = snd_pcm_start(substream);
if (err < 0)

View File

@ -595,8 +595,8 @@ static void snd_pcm_set_state(struct snd_pcm_substream *substream,
snd_pcm_state_t state)
{
snd_pcm_stream_lock_irq(substream);
if (substream->runtime->status->state != SNDRV_PCM_STATE_DISCONNECTED)
substream->runtime->status->state = state;
if (substream->runtime->state != SNDRV_PCM_STATE_DISCONNECTED)
__snd_pcm_set_state(substream->runtime, state);
snd_pcm_stream_unlock_irq(substream);
}
@ -724,7 +724,7 @@ static int snd_pcm_hw_params(struct snd_pcm_substream *substream,
if (err < 0)
return err;
snd_pcm_stream_lock_irq(substream);
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_OPEN:
case SNDRV_PCM_STATE_SETUP:
case SNDRV_PCM_STATE_PREPARED:
@ -889,7 +889,7 @@ static int snd_pcm_hw_free(struct snd_pcm_substream *substream)
if (result < 0)
return result;
snd_pcm_stream_lock_irq(substream);
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_SETUP:
case SNDRV_PCM_STATE_PREPARED:
if (atomic_read(&substream->mmap_count))
@ -920,7 +920,7 @@ static int snd_pcm_sw_params(struct snd_pcm_substream *substream,
return -ENXIO;
runtime = substream->runtime;
snd_pcm_stream_lock_irq(substream);
if (runtime->status->state == SNDRV_PCM_STATE_OPEN) {
if (runtime->state == SNDRV_PCM_STATE_OPEN) {
snd_pcm_stream_unlock_irq(substream);
return -EBADFD;
}
@ -1013,8 +1013,8 @@ int snd_pcm_status64(struct snd_pcm_substream *substream,
} else
runtime->audio_tstamp_report.valid = 1;
status->state = runtime->status->state;
status->suspended_state = runtime->status->suspended_state;
status->state = runtime->state;
status->suspended_state = runtime->suspended_state;
if (status->state == SNDRV_PCM_STATE_OPEN)
goto _end;
status->trigger_tstamp_sec = runtime->trigger_tstamp.tv_sec;
@ -1148,7 +1148,7 @@ static int snd_pcm_channel_info(struct snd_pcm_substream *substream,
channel = info->channel;
runtime = substream->runtime;
snd_pcm_stream_lock_irq(substream);
if (runtime->status->state == SNDRV_PCM_STATE_OPEN) {
if (runtime->state == SNDRV_PCM_STATE_OPEN) {
snd_pcm_stream_unlock_irq(substream);
return -EBADFD;
}
@ -1411,7 +1411,7 @@ static int snd_pcm_pre_start(struct snd_pcm_substream *substream,
snd_pcm_state_t state)
{
struct snd_pcm_runtime *runtime = substream->runtime;
if (runtime->status->state != SNDRV_PCM_STATE_PREPARED)
if (runtime->state != SNDRV_PCM_STATE_PREPARED)
return -EBADFD;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
!snd_pcm_playback_data(substream))
@ -1444,7 +1444,7 @@ static void snd_pcm_post_start(struct snd_pcm_substream *substream,
runtime->hw_ptr_jiffies = jiffies;
runtime->hw_ptr_buffer_jiffies = (runtime->buffer_size * HZ) /
runtime->rate;
runtime->status->state = state;
__snd_pcm_set_state(runtime, state);
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK &&
runtime->silence_size > 0)
snd_pcm_playback_silence(substream, ULONG_MAX);
@ -1485,7 +1485,7 @@ static int snd_pcm_pre_stop(struct snd_pcm_substream *substream,
snd_pcm_state_t state)
{
struct snd_pcm_runtime *runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN)
if (runtime->state == SNDRV_PCM_STATE_OPEN)
return -EBADFD;
runtime->trigger_master = substream;
return 0;
@ -1506,9 +1506,9 @@ static void snd_pcm_post_stop(struct snd_pcm_substream *substream,
snd_pcm_state_t state)
{
struct snd_pcm_runtime *runtime = substream->runtime;
if (runtime->status->state != state) {
if (runtime->state != state) {
snd_pcm_trigger_tstamp(substream);
runtime->status->state = state;
__snd_pcm_set_state(runtime, state);
snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MSTOP);
}
wake_up(&runtime->sleep);
@ -1584,9 +1584,9 @@ static int snd_pcm_pre_pause(struct snd_pcm_substream *substream,
if (!(runtime->info & SNDRV_PCM_INFO_PAUSE))
return -ENOSYS;
if (pause_pushed(state)) {
if (runtime->status->state != SNDRV_PCM_STATE_RUNNING)
if (runtime->state != SNDRV_PCM_STATE_RUNNING)
return -EBADFD;
} else if (runtime->status->state != SNDRV_PCM_STATE_PAUSED)
} else if (runtime->state != SNDRV_PCM_STATE_PAUSED)
return -EBADFD;
runtime->trigger_master = substream;
return 0;
@ -1628,12 +1628,12 @@ static void snd_pcm_post_pause(struct snd_pcm_substream *substream,
struct snd_pcm_runtime *runtime = substream->runtime;
snd_pcm_trigger_tstamp(substream);
if (pause_pushed(state)) {
runtime->status->state = SNDRV_PCM_STATE_PAUSED;
__snd_pcm_set_state(runtime, SNDRV_PCM_STATE_PAUSED);
snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MPAUSE);
wake_up(&runtime->sleep);
wake_up(&runtime->tsleep);
} else {
runtime->status->state = SNDRV_PCM_STATE_RUNNING;
__snd_pcm_set_state(runtime, SNDRV_PCM_STATE_RUNNING);
snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MCONTINUE);
}
}
@ -1668,7 +1668,7 @@ static int snd_pcm_pre_suspend(struct snd_pcm_substream *substream,
snd_pcm_state_t state)
{
struct snd_pcm_runtime *runtime = substream->runtime;
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_SUSPENDED:
return -EBUSY;
/* unresumable PCM state; return -EBUSY for skipping suspend */
@ -1699,8 +1699,9 @@ static void snd_pcm_post_suspend(struct snd_pcm_substream *substream,
{
struct snd_pcm_runtime *runtime = substream->runtime;
snd_pcm_trigger_tstamp(substream);
runtime->status->suspended_state = runtime->status->state;
runtime->status->state = SNDRV_PCM_STATE_SUSPENDED;
runtime->suspended_state = runtime->state;
runtime->status->suspended_state = runtime->suspended_state;
__snd_pcm_set_state(runtime, SNDRV_PCM_STATE_SUSPENDED);
snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MSUSPEND);
wake_up(&runtime->sleep);
wake_up(&runtime->tsleep);
@ -1791,8 +1792,8 @@ static int snd_pcm_do_resume(struct snd_pcm_substream *substream,
if (runtime->trigger_master != substream)
return 0;
/* DMA not running previously? */
if (runtime->status->suspended_state != SNDRV_PCM_STATE_RUNNING &&
(runtime->status->suspended_state != SNDRV_PCM_STATE_DRAINING ||
if (runtime->suspended_state != SNDRV_PCM_STATE_RUNNING &&
(runtime->suspended_state != SNDRV_PCM_STATE_DRAINING ||
substream->stream != SNDRV_PCM_STREAM_PLAYBACK))
return 0;
return substream->ops->trigger(substream, SNDRV_PCM_TRIGGER_RESUME);
@ -1811,7 +1812,7 @@ static void snd_pcm_post_resume(struct snd_pcm_substream *substream,
{
struct snd_pcm_runtime *runtime = substream->runtime;
snd_pcm_trigger_tstamp(substream);
runtime->status->state = runtime->status->suspended_state;
__snd_pcm_set_state(runtime, runtime->suspended_state);
snd_pcm_timer_notify(substream, SNDRV_TIMER_EVENT_MRESUME);
}
@ -1848,7 +1849,7 @@ static int snd_pcm_xrun(struct snd_pcm_substream *substream)
int result;
snd_pcm_stream_lock_irq(substream);
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_XRUN:
result = 0; /* already there */
break;
@ -1871,7 +1872,7 @@ static int snd_pcm_pre_reset(struct snd_pcm_substream *substream,
snd_pcm_state_t state)
{
struct snd_pcm_runtime *runtime = substream->runtime;
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_RUNNING:
case SNDRV_PCM_STATE_PREPARED:
case SNDRV_PCM_STATE_PAUSED:
@ -1933,8 +1934,8 @@ static int snd_pcm_pre_prepare(struct snd_pcm_substream *substream,
struct snd_pcm_runtime *runtime = substream->runtime;
int f_flags = (__force int)state;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN ||
runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (runtime->state == SNDRV_PCM_STATE_OPEN ||
runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
if (snd_pcm_running(substream))
return -EBUSY;
@ -1985,7 +1986,7 @@ static int snd_pcm_prepare(struct snd_pcm_substream *substream,
f_flags = substream->f_flags;
snd_pcm_stream_lock_irq(substream);
switch (substream->runtime->status->state) {
switch (substream->runtime->state) {
case SNDRV_PCM_STATE_PAUSED:
snd_pcm_pause(substream, false);
fallthrough;
@ -2009,7 +2010,7 @@ static int snd_pcm_pre_drain_init(struct snd_pcm_substream *substream,
snd_pcm_state_t state)
{
struct snd_pcm_runtime *runtime = substream->runtime;
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_OPEN:
case SNDRV_PCM_STATE_DISCONNECTED:
case SNDRV_PCM_STATE_SUSPENDED:
@ -2024,28 +2025,28 @@ static int snd_pcm_do_drain_init(struct snd_pcm_substream *substream,
{
struct snd_pcm_runtime *runtime = substream->runtime;
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_PREPARED:
/* start playback stream if possible */
if (! snd_pcm_playback_empty(substream)) {
snd_pcm_do_start(substream, SNDRV_PCM_STATE_DRAINING);
snd_pcm_post_start(substream, SNDRV_PCM_STATE_DRAINING);
} else {
runtime->status->state = SNDRV_PCM_STATE_SETUP;
__snd_pcm_set_state(runtime, SNDRV_PCM_STATE_SETUP);
}
break;
case SNDRV_PCM_STATE_RUNNING:
runtime->status->state = SNDRV_PCM_STATE_DRAINING;
__snd_pcm_set_state(runtime, SNDRV_PCM_STATE_DRAINING);
break;
case SNDRV_PCM_STATE_XRUN:
runtime->status->state = SNDRV_PCM_STATE_SETUP;
__snd_pcm_set_state(runtime, SNDRV_PCM_STATE_SETUP);
break;
default:
break;
}
} else {
/* stop running stream */
if (runtime->status->state == SNDRV_PCM_STATE_RUNNING) {
if (runtime->state == SNDRV_PCM_STATE_RUNNING) {
snd_pcm_state_t new_state;
new_state = snd_pcm_capture_avail(runtime) > 0 ?
@ -2055,7 +2056,7 @@ static int snd_pcm_do_drain_init(struct snd_pcm_substream *substream,
}
}
if (runtime->status->state == SNDRV_PCM_STATE_DRAINING &&
if (runtime->state == SNDRV_PCM_STATE_DRAINING &&
runtime->trigger_master == substream &&
(runtime->hw.info & SNDRV_PCM_INFO_DRAIN_TRIGGER))
return substream->ops->trigger(substream,
@ -2096,7 +2097,7 @@ static int snd_pcm_drain(struct snd_pcm_substream *substream,
card = substream->pcm->card;
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN)
if (runtime->state == SNDRV_PCM_STATE_OPEN)
return -EBADFD;
if (file) {
@ -2107,7 +2108,7 @@ static int snd_pcm_drain(struct snd_pcm_substream *substream,
snd_pcm_stream_lock_irq(substream);
/* resume pause */
if (runtime->status->state == SNDRV_PCM_STATE_PAUSED)
if (runtime->state == SNDRV_PCM_STATE_PAUSED)
snd_pcm_pause(substream, false);
/* pre-start/stop - all running streams are changed to DRAINING state */
@ -2135,7 +2136,7 @@ static int snd_pcm_drain(struct snd_pcm_substream *substream,
if (s->stream != SNDRV_PCM_STREAM_PLAYBACK)
continue;
runtime = s->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_DRAINING) {
if (runtime->state == SNDRV_PCM_STATE_DRAINING) {
to_check = runtime;
break;
}
@ -2174,7 +2175,7 @@ static int snd_pcm_drain(struct snd_pcm_substream *substream,
break;
}
if (tout == 0) {
if (substream->runtime->status->state == SNDRV_PCM_STATE_SUSPENDED)
if (substream->runtime->state == SNDRV_PCM_STATE_SUSPENDED)
result = -ESTRPIPE;
else {
dev_dbg(substream->pcm->card->dev,
@ -2206,13 +2207,13 @@ static int snd_pcm_drop(struct snd_pcm_substream *substream)
return -ENXIO;
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN ||
runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (runtime->state == SNDRV_PCM_STATE_OPEN ||
runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
snd_pcm_stream_lock_irq(substream);
/* resume pause */
if (runtime->status->state == SNDRV_PCM_STATE_PAUSED)
if (runtime->state == SNDRV_PCM_STATE_PAUSED)
snd_pcm_pause(substream, false);
snd_pcm_stop(substream, SNDRV_PCM_STATE_SETUP);
@ -2275,8 +2276,8 @@ static int snd_pcm_link(struct snd_pcm_substream *substream, int fd)
snd_pcm_group_init(group);
down_write(&snd_pcm_link_rwsem);
if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN ||
substream->runtime->status->state != substream1->runtime->status->state ||
if (substream->runtime->state == SNDRV_PCM_STATE_OPEN ||
substream->runtime->state != substream1->runtime->state ||
substream->pcm->nonatomic != substream1->pcm->nonatomic) {
res = -EBADFD;
goto _end;
@ -2700,7 +2701,7 @@ void snd_pcm_release_substream(struct snd_pcm_substream *substream)
snd_pcm_drop(substream);
if (substream->hw_opened) {
if (substream->runtime->status->state != SNDRV_PCM_STATE_OPEN)
if (substream->runtime->state != SNDRV_PCM_STATE_OPEN)
do_hw_free(substream);
substream->ops->close(substream);
substream->hw_opened = 0;
@ -2904,7 +2905,7 @@ static int snd_pcm_release(struct inode *inode, struct file *file)
*/
static int do_pcm_hwsync(struct snd_pcm_substream *substream)
{
switch (substream->runtime->status->state) {
switch (substream->runtime->state) {
case SNDRV_PCM_STATE_DRAINING:
if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
return -EBADFD;
@ -3203,7 +3204,7 @@ static int snd_pcm_xferi_frames_ioctl(struct snd_pcm_substream *substream,
struct snd_pcm_runtime *runtime = substream->runtime;
snd_pcm_sframes_t result;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN)
if (runtime->state == SNDRV_PCM_STATE_OPEN)
return -EBADFD;
if (put_user(0, &_xferi->result))
return -EFAULT;
@ -3226,7 +3227,7 @@ static int snd_pcm_xfern_frames_ioctl(struct snd_pcm_substream *substream,
void *bufs;
snd_pcm_sframes_t result;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN)
if (runtime->state == SNDRV_PCM_STATE_OPEN)
return -EBADFD;
if (runtime->channels > 128)
return -EINVAL;
@ -3290,7 +3291,7 @@ static int snd_pcm_common_ioctl(struct file *file,
if (PCM_RUNTIME_CHECK(substream))
return -ENXIO;
if (substream->runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (substream->runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
res = snd_power_wait(substream->pcm->card);
@ -3421,7 +3422,7 @@ int snd_pcm_kernel_ioctl(struct snd_pcm_substream *substream,
snd_pcm_uframes_t *frames = arg;
snd_pcm_sframes_t result;
if (substream->runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (substream->runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
switch (cmd) {
@ -3466,8 +3467,8 @@ static ssize_t snd_pcm_read(struct file *file, char __user *buf, size_t count,
if (PCM_RUNTIME_CHECK(substream))
return -ENXIO;
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN ||
runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (runtime->state == SNDRV_PCM_STATE_OPEN ||
runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
if (!frame_aligned(runtime, count))
return -EINVAL;
@ -3491,8 +3492,8 @@ static ssize_t snd_pcm_write(struct file *file, const char __user *buf,
if (PCM_RUNTIME_CHECK(substream))
return -ENXIO;
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN ||
runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (runtime->state == SNDRV_PCM_STATE_OPEN ||
runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
if (!frame_aligned(runtime, count))
return -EINVAL;
@ -3518,8 +3519,8 @@ static ssize_t snd_pcm_readv(struct kiocb *iocb, struct iov_iter *to)
if (PCM_RUNTIME_CHECK(substream))
return -ENXIO;
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN ||
runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (runtime->state == SNDRV_PCM_STATE_OPEN ||
runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
if (!iter_is_iovec(to))
return -EINVAL;
@ -3555,8 +3556,8 @@ static ssize_t snd_pcm_writev(struct kiocb *iocb, struct iov_iter *from)
if (PCM_RUNTIME_CHECK(substream))
return -ENXIO;
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN ||
runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (runtime->state == SNDRV_PCM_STATE_OPEN ||
runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
if (!iter_is_iovec(from))
return -EINVAL;
@ -3595,7 +3596,7 @@ static __poll_t snd_pcm_poll(struct file *file, poll_table *wait)
return ok | EPOLLERR;
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return ok | EPOLLERR;
poll_wait(file, &runtime->sleep, wait);
@ -3603,7 +3604,7 @@ static __poll_t snd_pcm_poll(struct file *file, poll_table *wait)
mask = 0;
snd_pcm_stream_lock_irq(substream);
avail = snd_pcm_avail(substream);
switch (runtime->status->state) {
switch (runtime->state) {
case SNDRV_PCM_STATE_RUNNING:
case SNDRV_PCM_STATE_PREPARED:
case SNDRV_PCM_STATE_PAUSED:
@ -3667,6 +3668,7 @@ static int snd_pcm_mmap_status(struct snd_pcm_substream *substream, struct file
area->vm_ops = &snd_pcm_vm_ops_status;
area->vm_private_data = substream;
area->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
area->vm_flags &= ~(VM_WRITE | VM_MAYWRITE);
return 0;
}
@ -3874,7 +3876,7 @@ int snd_pcm_mmap_data(struct snd_pcm_substream *substream, struct file *file,
return -EINVAL;
}
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_OPEN)
if (runtime->state == SNDRV_PCM_STATE_OPEN)
return -EBADFD;
if (!(runtime->info & SNDRV_PCM_INFO_MMAP))
return -ENXIO;
@ -3911,7 +3913,7 @@ static int snd_pcm_mmap(struct file *file, struct vm_area_struct *area)
substream = pcm_file->substream;
if (PCM_RUNTIME_CHECK(substream))
return -ENXIO;
if (substream->runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (substream->runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
offset = area->vm_pgoff << PAGE_SHIFT;
@ -3949,7 +3951,7 @@ static int snd_pcm_fasync(int fd, struct file * file, int on)
if (PCM_RUNTIME_CHECK(substream))
return -ENXIO;
runtime = substream->runtime;
if (runtime->status->state == SNDRV_PCM_STATE_DISCONNECTED)
if (runtime->state == SNDRV_PCM_STATE_DISCONNECTED)
return -EBADFD;
return snd_fasync_helper(fd, file, on, &runtime->fasync);
}

View File

@ -535,7 +535,7 @@ static void copy_play_buf(struct loopback_pcm *play,
/* check if playback is draining, trim the capture copy size
* when our pointer is at the end of playback ring buffer */
if (runtime->status->state == SNDRV_PCM_STATE_DRAINING &&
if (runtime->state == SNDRV_PCM_STATE_DRAINING &&
snd_pcm_playback_hw_avail(runtime) < runtime->buffer_size) {
snd_pcm_uframes_t appl_ptr, appl_ptr1, diff;
appl_ptr = appl_ptr1 = runtime->control->appl_ptr;
@ -730,7 +730,7 @@ static void loopback_snd_timer_period_elapsed(struct loopback_cable *cable,
if (event == SNDRV_TIMER_EVENT_MSTOP) {
if (!dpcm_play ||
dpcm_play->substream->runtime->status->state !=
dpcm_play->substream->runtime->state !=
SNDRV_PCM_STATE_DRAINING) {
spin_unlock_irqrestore(&cable->lock, flags);
return;

View File

@ -42,6 +42,8 @@ MODULE_LICENSE("GPL");
#define USE_CHANNELS_MAX 2
#define USE_PERIODS_MIN 1
#define USE_PERIODS_MAX 1024
#define USE_MIXER_VOLUME_LEVEL_MIN -50
#define USE_MIXER_VOLUME_LEVEL_MAX 100
static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
@ -50,6 +52,8 @@ static char *model[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = NULL};
static int pcm_devs[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
static int pcm_substreams[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 8};
//static int midi_devs[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
static int mixer_volume_level_min = USE_MIXER_VOLUME_LEVEL_MIN;
static int mixer_volume_level_max = USE_MIXER_VOLUME_LEVEL_MAX;
#ifdef CONFIG_HIGH_RES_TIMERS
static bool hrtimer = 1;
#endif
@ -69,6 +73,10 @@ module_param_array(pcm_substreams, int, NULL, 0444);
MODULE_PARM_DESC(pcm_substreams, "PCM substreams # (1-128) for dummy driver.");
//module_param_array(midi_devs, int, NULL, 0444);
//MODULE_PARM_DESC(midi_devs, "MIDI devices # (0-2) for dummy driver.");
module_param(mixer_volume_level_min, int, 0444);
MODULE_PARM_DESC(mixer_volume_level_min, "Minimum mixer volume level for dummy driver. Default: -50");
module_param(mixer_volume_level_max, int, 0444);
MODULE_PARM_DESC(mixer_volume_level_max, "Maximum mixer volume level for dummy driver. Default: 100");
module_param(fake_buffer, bool, 0444);
MODULE_PARM_DESC(fake_buffer, "Fake buffer allocations.");
#ifdef CONFIG_HIGH_RES_TIMERS
@ -296,7 +304,7 @@ static void dummy_systimer_callback(struct timer_list *t)
struct dummy_systimer_pcm *dpcm = from_timer(dpcm, t, timer);
unsigned long flags;
int elapsed = 0;
spin_lock_irqsave(&dpcm->lock, flags);
dummy_systimer_update(dpcm);
dummy_systimer_rearm(dpcm);
@ -713,11 +721,11 @@ static int snd_dummy_volume_info(struct snd_kcontrol *kcontrol,
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 2;
uinfo->value.integer.min = -50;
uinfo->value.integer.max = 100;
uinfo->value.integer.min = mixer_volume_level_min;
uinfo->value.integer.max = mixer_volume_level_max;
return 0;
}
static int snd_dummy_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
@ -739,15 +747,15 @@ static int snd_dummy_volume_put(struct snd_kcontrol *kcontrol,
int left, right;
left = ucontrol->value.integer.value[0];
if (left < -50)
left = -50;
if (left > 100)
left = 100;
if (left < mixer_volume_level_min)
left = mixer_volume_level_min;
if (left > mixer_volume_level_max)
left = mixer_volume_level_max;
right = ucontrol->value.integer.value[1];
if (right < -50)
right = -50;
if (right > 100)
right = 100;
if (right < mixer_volume_level_min)
right = mixer_volume_level_min;
if (right > mixer_volume_level_max)
right = mixer_volume_level_max;
spin_lock_irq(&dummy->mixer_lock);
change = dummy->mixer_volume[addr][0] != left ||
dummy->mixer_volume[addr][1] != right;
@ -766,7 +774,7 @@ static const DECLARE_TLV_DB_SCALE(db_scale_dummy, -4500, 30, 0);
.private_value = addr }
#define snd_dummy_capsrc_info snd_ctl_boolean_stereo_info
static int snd_dummy_capsrc_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
@ -1076,6 +1084,12 @@ static int snd_dummy_probe(struct platform_device *devptr)
dummy->pcm_hw.channels_max = m->channels_max;
}
if (mixer_volume_level_min > mixer_volume_level_max) {
pr_warn("snd-dummy: Invalid mixer volume level: min=%d, max=%d. Fall back to default value.\n",
mixer_volume_level_min, mixer_volume_level_max);
mixer_volume_level_min = USE_MIXER_VOLUME_LEVEL_MIN;
mixer_volume_level_max = USE_MIXER_VOLUME_LEVEL_MAX;
}
err = snd_card_dummy_new_mixer(dummy);
if (err < 0)
return err;
@ -1100,7 +1114,7 @@ static int snd_dummy_suspend(struct device *pdev)
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
return 0;
}
static int snd_dummy_resume(struct device *pdev)
{
struct snd_card *card = dev_get_drvdata(pdev);

View File

@ -1215,8 +1215,7 @@ int snd_vx_pcm_new(struct vx_core *chip)
if (ins)
snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &vx_pcm_capture_ops);
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_VMALLOC,
snd_dma_continuous_data(GFP_KERNEL | GFP_DMA32),
0, 0);
NULL, 0, 0);
pcm->private_data = chip;
pcm->private_free = snd_vx_pcm_free;

View File

@ -214,7 +214,7 @@ static int pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_bebob *bebob = substream->private_data;
int err = 0;
if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN) {
if (substream->runtime->state == SNDRV_PCM_STATE_OPEN) {
unsigned int rate = params_rate(hw_params);
unsigned int frames_per_period = params_period_size(hw_params);
unsigned int frames_per_buffer = params_buffer_size(hw_params);
@ -236,7 +236,7 @@ static int pcm_hw_free(struct snd_pcm_substream *substream)
mutex_lock(&bebob->mutex);
if (substream->runtime->status->state != SNDRV_PCM_STATE_OPEN)
if (substream->runtime->state != SNDRV_PCM_STATE_OPEN)
bebob->substreams_counter--;
snd_bebob_stream_stop_duplex(bebob);

View File

@ -2,8 +2,6 @@
// dice-harman.c - a part of driver for DICE based devices
//
// Copyright (c) 2021 Takashi Sakamoto
//
// Licensed under the terms of the GNU General Public License, version 2.
#include "dice.h"

View File

@ -266,7 +266,7 @@ static int pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_dice *dice = substream->private_data;
int err = 0;
if (substream->runtime->status->state == SNDRV_PCM_STATE_OPEN) {
if (substream->runtime->state == SNDRV_PCM_STATE_OPEN) {
unsigned int rate = params_rate(hw_params);
unsigned int events_per_period = params_period_size(hw_params);
unsigned int events_per_buffer = params_buffer_size(hw_params);
@ -293,7 +293,7 @@ static int pcm_hw_free(struct snd_pcm_substream *substream)
mutex_lock(&dice->mutex);
if (substream->runtime->status->state != SNDRV_PCM_STATE_OPEN)
if (substream->runtime->state != SNDRV_PCM_STATE_OPEN)
--dice->substreams_counter;
snd_dice_stream_stop_duplex(dice);

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