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pinctrl: mcp23s08: add pinconf support
mcp23xxx device have configurable 100k pullup resistors. This adds support for enabling them using pinctrl's pinconf interface. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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64ac43e6fa
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@ -153,6 +153,7 @@ config PINCTRL_MCP23S08
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select GPIOLIB_IRQCHIP
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select REGMAP_I2C if I2C
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select REGMAP_SPI if SPI_MASTER
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select GENERIC_PINCONF
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help
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SPI/I2C driver for Microchip MCP23S08/MCP23S17/MCP23008/MCP23017
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I/O expanders.
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@ -24,6 +24,9 @@
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#include <linux/of_irq.h>
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#include <linux/of_device.h>
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#include <linux/regmap.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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/**
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* MCP types supported by driver
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@ -77,6 +80,9 @@ struct mcp23s08 {
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struct regmap *regmap;
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struct device *dev;
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struct pinctrl_dev *pctldev;
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struct pinctrl_desc pinctrl_desc;
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};
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static const struct regmap_config mcp23x08_regmap = {
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@ -96,6 +102,158 @@ static const struct regmap_config mcp23x17_regmap = {
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.val_format_endian = REGMAP_ENDIAN_LITTLE,
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};
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static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
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{
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return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
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}
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static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
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{
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return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
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}
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static int mcp_set_bit(struct mcp23s08 *mcp, unsigned int reg,
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unsigned int pin, bool enabled)
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{
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u16 val = enabled ? 0xffff : 0x0000;
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u16 mask = BIT(pin);
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return regmap_update_bits(mcp->regmap, reg << mcp->reg_shift,
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mask, val);
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}
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static int mcp_update_cache(struct mcp23s08 *mcp)
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{
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int ret, reg, i;
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for (i = 0; i < ARRAY_SIZE(mcp->cache); i++) {
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ret = mcp_read(mcp, i, ®);
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if (ret < 0)
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return ret;
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mcp->cache[i] = reg;
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}
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return 0;
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}
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static const struct pinctrl_pin_desc mcp23x08_pins[] = {
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PINCTRL_PIN(0, "gpio0"),
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PINCTRL_PIN(1, "gpio1"),
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PINCTRL_PIN(2, "gpio2"),
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PINCTRL_PIN(3, "gpio3"),
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PINCTRL_PIN(4, "gpio4"),
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PINCTRL_PIN(5, "gpio5"),
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PINCTRL_PIN(6, "gpio6"),
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PINCTRL_PIN(7, "gpio7"),
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};
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static const struct pinctrl_pin_desc mcp23x17_pins[] = {
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PINCTRL_PIN(0, "gpio0"),
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PINCTRL_PIN(1, "gpio1"),
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PINCTRL_PIN(2, "gpio2"),
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PINCTRL_PIN(3, "gpio3"),
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PINCTRL_PIN(4, "gpio4"),
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PINCTRL_PIN(5, "gpio5"),
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PINCTRL_PIN(6, "gpio6"),
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PINCTRL_PIN(7, "gpio7"),
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PINCTRL_PIN(8, "gpio8"),
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PINCTRL_PIN(9, "gpio9"),
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PINCTRL_PIN(10, "gpio10"),
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PINCTRL_PIN(11, "gpio11"),
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PINCTRL_PIN(12, "gpio12"),
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PINCTRL_PIN(13, "gpio13"),
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PINCTRL_PIN(14, "gpio14"),
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PINCTRL_PIN(15, "gpio15"),
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};
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static int mcp_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
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{
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return 0;
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}
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static const char *mcp_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned int group)
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{
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return NULL;
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}
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static int mcp_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned int group,
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const unsigned int **pins,
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unsigned int *num_pins)
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{
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return -ENOTSUPP;
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}
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static const struct pinctrl_ops mcp_pinctrl_ops = {
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.get_groups_count = mcp_pinctrl_get_groups_count,
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.get_group_name = mcp_pinctrl_get_group_name,
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.get_group_pins = mcp_pinctrl_get_group_pins,
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#ifdef CONFIG_OF
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.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
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.dt_free_map = pinconf_generic_dt_free_map,
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#endif
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};
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static int mcp_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *config)
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{
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struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
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enum pin_config_param param = pinconf_to_config_param(*config);
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unsigned int data, status;
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int ret;
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switch (param) {
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case PIN_CONFIG_BIAS_PULL_UP:
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ret = mcp_read(mcp, MCP_GPPU, &data);
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if (ret < 0)
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return ret;
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status = (data & BIT(pin)) ? 1 : 0;
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break;
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default:
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dev_err(mcp->dev, "Invalid config param %04x\n", param);
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return -ENOTSUPP;
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}
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*config = 0;
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return status ? 0 : -EINVAL;
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}
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static int mcp_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
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unsigned long *configs, unsigned int num_configs)
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{
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struct mcp23s08 *mcp = pinctrl_dev_get_drvdata(pctldev);
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enum pin_config_param param;
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u32 arg, mask;
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u16 val;
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int ret = 0;
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int i;
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for (i = 0; i < num_configs; i++) {
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param = pinconf_to_config_param(configs[i]);
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arg = pinconf_to_config_argument(configs[i]);
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switch (param) {
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case PIN_CONFIG_BIAS_PULL_UP:
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val = arg ? 0xFFFF : 0x0000;
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mask = BIT(pin);
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ret = mcp_set_bit(mcp, MCP_GPPU, pin, arg);
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break;
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default:
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dev_err(mcp->dev, "Invalid config param %04x\n", param);
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return -ENOTSUPP;
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}
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}
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return ret;
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}
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static const struct pinconf_ops mcp_pinconf_ops = {
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.pin_config_get = mcp_pinconf_get,
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.pin_config_set = mcp_pinconf_set,
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.is_generic = true,
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};
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/*----------------------------------------------------------------------*/
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#ifdef CONFIG_SPI_MASTER
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@ -158,30 +316,6 @@ static const struct regmap_bus mcp23sxx_spi_regmap = {
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#endif /* CONFIG_SPI_MASTER */
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static int mcp_read(struct mcp23s08 *mcp, unsigned int reg, unsigned int *val)
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{
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return regmap_read(mcp->regmap, reg << mcp->reg_shift, val);
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}
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static int mcp_write(struct mcp23s08 *mcp, unsigned int reg, unsigned int val)
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{
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return regmap_write(mcp->regmap, reg << mcp->reg_shift, val);
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}
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static int mcp_update_cache(struct mcp23s08 *mcp)
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{
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int ret, reg, i;
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for (i = 0; i < ARRAY_SIZE(mcp->cache); i++) {
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ret = mcp_read(mcp, i, ®);
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if (ret < 0)
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return ret;
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mcp->cache[i] = reg;
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}
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return 0;
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}
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/*----------------------------------------------------------------------*/
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/* A given spi_device can represent up to eight mcp23sxx chips
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@ -682,6 +816,23 @@ static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
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if (ret)
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goto fail;
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}
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mcp->pinctrl_desc.name = "mcp23xxx-pinctrl";
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mcp->pinctrl_desc.pctlops = &mcp_pinctrl_ops;
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mcp->pinctrl_desc.confops = &mcp_pinconf_ops;
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mcp->pinctrl_desc.npins = mcp->chip.ngpio;
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if (mcp->pinctrl_desc.npins == 8)
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mcp->pinctrl_desc.pins = mcp23x08_pins;
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else if (mcp->pinctrl_desc.npins == 16)
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mcp->pinctrl_desc.pins = mcp23x17_pins;
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mcp->pinctrl_desc.owner = THIS_MODULE;
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mcp->pctldev = devm_pinctrl_register(dev, &mcp->pinctrl_desc, mcp);
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if (IS_ERR(mcp->pctldev)) {
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ret = PTR_ERR(mcp->pctldev);
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goto fail;
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}
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fail:
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if (ret < 0)
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dev_dbg(dev, "can't setup chip %d, --> %d\n", addr, ret);
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