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PCI: aardvark: Don't rely on jiffies while holding spinlock
advk_pcie_wait_pio() can be called while holding a spinlock (from pci_bus_read_config_dword()), then depends on jiffies in order to timeout while polling on PIO state registers. In the case the PIO transaction failed, the timeout will never happen and will also cause the cpu to stall. This decrements a variable and wait instead of using jiffies. Signed-off-by: Remi Pommarel <repk@triplefau.lt> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
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@ -175,7 +175,8 @@
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(PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \
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PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where))
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#define PIO_TIMEOUT_MS 1
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#define PIO_RETRY_CNT 500
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#define PIO_RETRY_DELAY 2 /* 2 us*/
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#define LINK_WAIT_MAX_RETRIES 10
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#define LINK_WAIT_USLEEP_MIN 90000
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@ -404,17 +405,16 @@ static void advk_pcie_check_pio_status(struct advk_pcie *pcie)
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static int advk_pcie_wait_pio(struct advk_pcie *pcie)
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{
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struct device *dev = &pcie->pdev->dev;
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unsigned long timeout;
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int i;
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timeout = jiffies + msecs_to_jiffies(PIO_TIMEOUT_MS);
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while (time_before(jiffies, timeout)) {
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for (i = 0; i < PIO_RETRY_CNT; i++) {
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u32 start, isr;
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start = advk_readl(pcie, PIO_START);
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isr = advk_readl(pcie, PIO_ISR);
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if (!start && isr)
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return 0;
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udelay(PIO_RETRY_DELAY);
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}
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dev_err(dev, "config read/write timed out\n");
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