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ARM: davinci: unduplicate aemif support
All users now register platform devices using the ti-aemif driver. Remove the handcrafted aemif API. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This commit is contained in:
Bartosz Golaszewski
Sekhar Nori
parent
acc0fb43c6
commit
7f69ae7fad
@ -6,7 +6,7 @@
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# Common objects
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obj-y := time.o serial.o usb.o \
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common.o sram.o aemif.o
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common.o sram.o
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obj-$(CONFIG_DAVINCI_MUX) += mux.o
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@ -1,218 +0,0 @@
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/*
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* AEMIF support for DaVinci SoCs
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*
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* Copyright (C) 2010 Texas Instruments Incorporated. http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <linux/platform_data/mtd-davinci-aemif.h>
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#include <linux/platform_data/mtd-davinci.h>
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/* Timing value configuration */
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#define TA(x) ((x) << 2)
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#define RHOLD(x) ((x) << 4)
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#define RSTROBE(x) ((x) << 7)
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#define RSETUP(x) ((x) << 13)
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#define WHOLD(x) ((x) << 17)
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#define WSTROBE(x) ((x) << 20)
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#define WSETUP(x) ((x) << 26)
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#define TA_MAX 0x3
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#define RHOLD_MAX 0x7
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#define RSTROBE_MAX 0x3f
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#define RSETUP_MAX 0xf
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#define WHOLD_MAX 0x7
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#define WSTROBE_MAX 0x3f
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#define WSETUP_MAX 0xf
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#define TIMING_MASK (TA(TA_MAX) | \
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RHOLD(RHOLD_MAX) | \
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RSTROBE(RSTROBE_MAX) | \
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RSETUP(RSETUP_MAX) | \
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WHOLD(WHOLD_MAX) | \
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WSTROBE(WSTROBE_MAX) | \
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WSETUP(WSETUP_MAX))
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static inline unsigned int davinci_aemif_readl(void __iomem *base, int offset)
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{
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return readl_relaxed(base + offset);
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}
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static inline void davinci_aemif_writel(void __iomem *base,
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int offset, unsigned long value)
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{
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writel_relaxed(value, base + offset);
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}
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/*
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* aemif_calc_rate - calculate timing data.
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* @wanted: The cycle time needed in nanoseconds.
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* @clk: The input clock rate in kHz.
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* @max: The maximum divider value that can be programmed.
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*
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* On success, returns the calculated timing value minus 1 for easy
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* programming into AEMIF timing registers, else negative errno.
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*/
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static int aemif_calc_rate(int wanted, unsigned long clk, int max)
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{
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int result;
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result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;
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pr_debug("%s: result %d from %ld, %d\n", __func__, result, clk, wanted);
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/* It is generally OK to have a more relaxed timing than requested... */
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if (result < 0)
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result = 0;
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/* ... But configuring tighter timings is not an option. */
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else if (result > max)
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result = -EINVAL;
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return result;
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}
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/**
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* davinci_aemif_setup_timing - setup timing values for a given AEMIF interface
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* @t: timing values to be progammed
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* @base: The virtual base address of the AEMIF interface
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* @cs: chip-select to program the timing values for
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* @clkrate: the AEMIF clkrate
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*
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* This function programs the given timing values (in real clock) into the
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* AEMIF registers taking the AEMIF clock into account.
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*
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* This function does not use any locking while programming the AEMIF
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* because it is expected that there is only one user of a given
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* chip-select.
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*
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* Returns 0 on success, else negative errno.
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*/
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static int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
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void __iomem *base, unsigned cs,
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unsigned long clkrate)
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{
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unsigned set, val;
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int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
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unsigned offset = A1CR_OFFSET + cs * 4;
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if (!t)
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return 0; /* Nothing to do */
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clkrate /= 1000; /* turn clock into kHz for ease of use */
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ta = aemif_calc_rate(t->ta, clkrate, TA_MAX);
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rhold = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX);
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rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX);
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rsetup = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX);
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whold = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX);
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wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX);
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wsetup = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX);
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if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
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whold < 0 || wstrobe < 0 || wsetup < 0) {
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pr_err("%s: cannot get suitable timings\n", __func__);
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return -EINVAL;
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}
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set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
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WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);
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val = __raw_readl(base + offset);
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val &= ~TIMING_MASK;
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val |= set;
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__raw_writel(val, base + offset);
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return 0;
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}
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/**
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* davinci_aemif_setup - setup AEMIF interface by davinci_nand_pdata
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* @pdev - link to platform device to setup settings for
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*
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* This function does not use any locking while programming the AEMIF
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* because it is expected that there is only one user of a given
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* chip-select.
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*
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* Returns 0 on success, else negative errno.
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*/
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int davinci_aemif_setup(struct platform_device *pdev)
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{
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struct davinci_nand_pdata *pdata = dev_get_platdata(&pdev->dev);
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uint32_t val;
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unsigned long clkrate;
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struct resource *res;
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void __iomem *base;
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struct clk *clk;
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int ret = 0;
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clk = clk_get(&pdev->dev, "aemif");
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if (IS_ERR(clk)) {
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ret = PTR_ERR(clk);
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dev_dbg(&pdev->dev, "unable to get AEMIF clock, err %d\n", ret);
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return ret;
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}
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ret = clk_prepare_enable(clk);
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if (ret < 0) {
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dev_dbg(&pdev->dev, "unable to enable AEMIF clock, err %d\n",
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ret);
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goto err_put;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
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if (!res) {
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dev_err(&pdev->dev, "cannot get IORESOURCE_MEM\n");
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ret = -ENOMEM;
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goto err;
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}
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base = ioremap(res->start, resource_size(res));
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if (!base) {
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dev_err(&pdev->dev, "ioremap failed for resource %pR\n", res);
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ret = -ENOMEM;
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goto err;
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}
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/*
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* Setup Async configuration register in case we did not boot
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* from NAND and so bootloader did not bother to set it up.
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*/
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val = davinci_aemif_readl(base, A1CR_OFFSET + pdata->core_chipsel * 4);
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/*
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* Extended Wait is not valid and Select Strobe mode is not
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* used
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*/
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val &= ~(ACR_ASIZE_MASK | ACR_EW_MASK | ACR_SS_MASK);
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if (pdata->options & NAND_BUSWIDTH_16)
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val |= 0x1;
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davinci_aemif_writel(base, A1CR_OFFSET + pdata->core_chipsel * 4, val);
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clkrate = clk_get_rate(clk);
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if (pdata->timing)
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ret = davinci_aemif_setup_timing(pdata->timing, base,
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pdata->core_chipsel, clkrate);
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if (ret < 0)
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dev_dbg(&pdev->dev, "NAND timing values setup fail\n");
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iounmap(base);
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err:
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clk_disable_unprepare(clk);
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err_put:
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clk_put(clk);
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return ret;
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}
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@ -33,5 +33,4 @@ struct davinci_aemif_timing {
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u8 ta;
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};
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int davinci_aemif_setup(struct platform_device *pdev);
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#endif
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