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media: verisilicon: fix excessive stack usage
In some configurations, gcc decides not to inline the register accessor
functions, which in turn leads to lots of temporary hantro_reg structures
on the stack that cannot be eliminated because they escape into an
uninlined function:
drivers/media/platform/verisilicon/rockchip_vpu981_hw_av1_dec.c:1022:1: warning: the frame size of 1112 bytes is larger than 1024 bytes [-Wframe-larger-than=]
Mark all of these as __always_inline so the compiler is able to completely
eliminate the temporary structures instead, which brings the stack usage
back down to just the normal local variables.
Closes: https://lore.kernel.org/oe-kbuild-all/202306151506.goHEegOd-lkp@intel.com/
[hverkuil: fix function prototype alignment, wrap commit log]
Reported-by: kernel test robot <lkp@intel.com>
Fixes: 727a400686
("media: verisilicon: Add Rockchip AV1 decoder")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
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@ -370,26 +370,26 @@ extern int hantro_debug;
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pr_err("%s:%d: " fmt, __func__, __LINE__, ##args)
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/* Structure access helpers. */
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static inline struct hantro_ctx *fh_to_ctx(struct v4l2_fh *fh)
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static __always_inline struct hantro_ctx *fh_to_ctx(struct v4l2_fh *fh)
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{
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return container_of(fh, struct hantro_ctx, fh);
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}
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/* Register accessors. */
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static inline void vepu_write_relaxed(struct hantro_dev *vpu,
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u32 val, u32 reg)
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static __always_inline void vepu_write_relaxed(struct hantro_dev *vpu,
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u32 val, u32 reg)
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{
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vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
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writel_relaxed(val, vpu->enc_base + reg);
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}
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static inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
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static __always_inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
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{
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vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
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writel(val, vpu->enc_base + reg);
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}
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static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
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static __always_inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
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{
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u32 val = readl(vpu->enc_base + reg);
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@ -397,27 +397,27 @@ static inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
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return val;
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}
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static inline void vdpu_write_relaxed(struct hantro_dev *vpu,
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u32 val, u32 reg)
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static __always_inline void vdpu_write_relaxed(struct hantro_dev *vpu,
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u32 val, u32 reg)
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{
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vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
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writel_relaxed(val, vpu->dec_base + reg);
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}
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static inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
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static __always_inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
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{
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vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
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writel(val, vpu->dec_base + reg);
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}
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static inline void hantro_write_addr(struct hantro_dev *vpu,
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unsigned long offset,
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dma_addr_t addr)
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static __always_inline void hantro_write_addr(struct hantro_dev *vpu,
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unsigned long offset,
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dma_addr_t addr)
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{
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vdpu_write(vpu, addr & 0xffffffff, offset);
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}
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static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
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static __always_inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
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{
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u32 val = readl(vpu->dec_base + reg);
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@ -425,9 +425,9 @@ static inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
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return val;
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}
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static inline u32 vdpu_read_mask(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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static __always_inline u32 vdpu_read_mask(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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{
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u32 v;
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@ -437,16 +437,16 @@ static inline u32 vdpu_read_mask(struct hantro_dev *vpu,
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return v;
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}
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static inline void hantro_reg_write(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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static __always_inline void hantro_reg_write(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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{
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vdpu_write_relaxed(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
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}
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static inline void hantro_reg_write_s(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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static __always_inline void hantro_reg_write_s(struct hantro_dev *vpu,
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const struct hantro_reg *reg,
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u32 val)
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{
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vdpu_write(vpu, vdpu_read_mask(vpu, reg, val), reg->base);
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}
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