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drm/i915/bmg: Read display register timeout

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Log the address of the register that caused the timeout
interrupt by reading RMTIMEOUTREG_CAPTURE

--v2:
- Update RMTIMEOUTREG_CAPTURE naming (Suraj)

--v3:
- XeLpdp naming convention.
- Use if condition instead of else if

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240807142106.1270213-1-mitulkumar.ajitkumar.golani@intel.com
This commit is contained in:
Mitul Golani 2024-08-07 19:51:05 +05:30 committed by Suraj Kandpal
parent 372f244b01
commit 7d113cce5f
2 changed files with 10 additions and 1 deletions
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9
drivers/gpu/drm/i915/display/intel_display_irq.c
View File

@ -906,6 +906,13 @@ gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv, u32 iir)
intel_pmdemand_irq_handler(dev_priv);
found = true;
}
if (iir & XELPDP_RM_TIMEOUT) {
u32 val = intel_uncore_read(&dev_priv->uncore,
RM_TIMEOUT_REG_CAPTURE);
drm_warn(&dev_priv->drm, "Register Access Timeout = 0x%x\n", val);
found = true;
}
} else if (iir & GEN8_DE_MISC_GSE) {
intel_opregion_asle_intr(dev_priv);
found = true;
@ -1710,7 +1717,7 @@ void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
if (DISPLAY_VER(dev_priv) >= 14) {
de_misc_masked |= XELPDP_PMDEMAND_RSPTOUT_ERR |
XELPDP_PMDEMAND_RSP;
XELPDP_PMDEMAND_RSP | XELPDP_RM_TIMEOUT;
} else if (DISPLAY_VER(dev_priv) >= 11) {
enum port port;

2
drivers/gpu/drm/i915/i915_reg.h
View File

@ -2396,6 +2396,7 @@
/* Display Internal Timeout Register */
#define RM_TIMEOUT _MMIO(0x42060)
#define RM_TIMEOUT_REG_CAPTURE _MMIO(0x420E0)
#define MMIO_TIMEOUT_US(us) ((us) << 0)
/* interrupts */
@ -2574,6 +2575,7 @@
#define GEN8_DE_MISC_IMR _MMIO(0x44464)
#define GEN8_DE_MISC_IIR _MMIO(0x44468)
#define GEN8_DE_MISC_IER _MMIO(0x4446c)
#define XELPDP_RM_TIMEOUT REG_BIT(29)
#define XELPDP_PMDEMAND_RSPTOUT_ERR REG_BIT(27)
#define GEN8_DE_MISC_GSE REG_BIT(27)
#define GEN8_DE_EDP_PSR REG_BIT(19)