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dmaengine: idxd: add configuration for concurrent batch descriptor processing
Add sysfs knob to allow control of the number of batch descriptors that can be concurrently processed by an engine in the group as a fraction of the Maximum Work Descriptors in Progress value specfied in ENGCAP register. This control knob is part of toggle for QoS control. Signed-off-by: Dave Jiang <dave.jiang@intel.com> Co-developed-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Link: https://lore.kernel.org/r/20220917161222.2835172-6-fenghua.yu@intel.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -278,3 +278,15 @@ Description: Allows control of the number of work descriptors that can be
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1 (1/2 of max value), 2 (1/4 of the max value), and 3 (1/8 of
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the max value). It's visible only on platforms that support
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the capability.
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What: /sys/bus/dsa/devices/group<m>.<n>/batch_progress_limit
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Date: Sept 14, 2022
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KernelVersion: 6.0.0
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Contact: dmaengine@vger.kernel.org
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Description: Allows control of the number of batch descriptors that can be
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concurrently processed by an engine in the group as a fraction
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of the Maximum Batch Descriptors in Progress value specified in
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the ENGCAP register. The acceptable values are 0 (default),
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1 (1/2 of max value), 2 (1/4 of the max value), and 3 (1/8 of
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the max value). It's visible only on platforms that support
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the capability.
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@ -710,6 +710,7 @@ static void idxd_groups_clear_state(struct idxd_device *idxd)
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group->tc_b = -1;
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}
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group->desc_progress_limit = 0;
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group->batch_progress_limit = 0;
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}
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}
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@ -932,6 +933,7 @@ static void idxd_group_flags_setup(struct idxd_device *idxd)
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group->grpcfg.flags.rdbufs_allowed = idxd->max_rdbufs;
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group->grpcfg.flags.desc_progress_limit = group->desc_progress_limit;
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group->grpcfg.flags.batch_progress_limit = group->batch_progress_limit;
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}
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}
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@ -97,6 +97,7 @@ struct idxd_group {
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int tc_a;
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int tc_b;
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int desc_progress_limit;
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int batch_progress_limit;
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};
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struct idxd_pmu {
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@ -298,7 +298,9 @@ union group_flags {
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u64 rdbufs_allowed:8;
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u64 rsvd3:4;
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u64 desc_progress_limit:2;
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u64 rsvd4:30;
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u64 rsvd4:2;
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u64 batch_progress_limit:2;
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u64 rsvd5:26;
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};
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u64 bits;
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} __packed;
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@ -474,6 +474,36 @@ static struct device_attribute dev_attr_group_desc_progress_limit =
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__ATTR(desc_progress_limit, 0644, group_desc_progress_limit_show,
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group_desc_progress_limit_store);
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static ssize_t group_batch_progress_limit_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct idxd_group *group = confdev_to_group(dev);
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return sysfs_emit(buf, "%d\n", group->batch_progress_limit);
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}
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static ssize_t group_batch_progress_limit_store(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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struct idxd_group *group = confdev_to_group(dev);
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int val, rc;
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rc = kstrtoint(buf, 10, &val);
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if (rc < 0)
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return -EINVAL;
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if (val & ~GENMASK(1, 0))
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return -EINVAL;
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group->batch_progress_limit = val;
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return count;
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}
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static struct device_attribute dev_attr_group_batch_progress_limit =
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__ATTR(batch_progress_limit, 0644, group_batch_progress_limit_show,
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group_batch_progress_limit_store);
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static struct attribute *idxd_group_attributes[] = {
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&dev_attr_group_work_queues.attr,
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&dev_attr_group_engines.attr,
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@ -486,14 +516,16 @@ static struct attribute *idxd_group_attributes[] = {
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&dev_attr_group_traffic_class_a.attr,
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&dev_attr_group_traffic_class_b.attr,
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&dev_attr_group_desc_progress_limit.attr,
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&dev_attr_group_batch_progress_limit.attr,
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NULL,
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};
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static bool idxd_group_attr_progress_limit_invisible(struct attribute *attr,
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struct idxd_device *idxd)
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{
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return attr == &dev_attr_group_desc_progress_limit.attr &&
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!idxd->hw.group_cap.progress_limit;
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return (attr == &dev_attr_group_desc_progress_limit.attr ||
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attr == &dev_attr_group_batch_progress_limit.attr) &&
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!idxd->hw.group_cap.progress_limit;
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}
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static umode_t idxd_group_attr_visible(struct kobject *kobj,
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