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Merge branch 'for-greg' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-linus

Browse Source 
* 'for-greg' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb:
  usb: musb: omap2430: minor cleanups.
  usb: dwc3: unmap the proper number of sg entries
  usb: musb: fix shutdown while usb gadget is in use
  usb: gadget: f_mass_storage: Use "bool" instead of "int" in fsg_module_parameters
  usb: gadget: check for streams only for SS udcs
  usb: gadget: fsl_udc: fix the usage of udc->max_ep
  drivers: usb: otg: Fix dependencies for some OTG drivers
  usb: renesas: silence uninitialized variable report in usbhsg_recip_run_handle()
  usb: gadget: SS Isoc endpoints use comp_desc->bMaxBurst too
  usb: gadget: storage: endian fix
  usb: dwc3: ep0: fix compile warning
  usb: musb: davinci: fix build breakage
  usb: gadget: langwell: don't call gadget's disconnect()
  usb: gadget: langwell: drop langwell_otg support
  usb: otg: kill langwell_otg driver
  usb: dwc3: ep0: tidy up Pending Request handling
This commit is contained in:
Greg Kroah-Hartman 2012-01-25 07:48:12 -08:00
commit 7c24814f7e
17 changed files with 37 additions and 2636 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
drivers/usb/dwc3/ep0.c
View File

@ -126,7 +126,6 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
struct dwc3_request *req)
{
struct dwc3 *dwc = dep->dwc;
u32 type;
int ret = 0;
req->request.actual = 0;
@ -149,20 +148,14 @@ static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
direction = !!(dep->flags & DWC3_EP0_DIR_IN);
if (dwc->ep0state == EP0_STATUS_PHASE) {
type = dwc->three_stage_setup
? DWC3_TRBCTL_CONTROL_STATUS3
: DWC3_TRBCTL_CONTROL_STATUS2;
} else if (dwc->ep0state == EP0_DATA_PHASE) {
type = DWC3_TRBCTL_CONTROL_DATA;
} else {
/* should never happen */
WARN_ON(1);
if (dwc->ep0state != EP0_DATA_PHASE) {
dev_WARN(dwc->dev, "Unexpected pending request\n");
return 0;
}
ret = dwc3_ep0_start_trans(dwc, direction,
req->request.dma, req->request.length, type);
req->request.dma, req->request.length,
DWC3_TRBCTL_CONTROL_DATA);
dep->flags &= ~(DWC3_EP_PENDING_REQUEST |
DWC3_EP0_DIR_IN);
} else if (dwc->delayed_status) {

2
drivers/usb/dwc3/gadget.c
View File

@ -101,7 +101,7 @@ void dwc3_unmap_buffer_from_dma(struct dwc3_request *req)
if (req->request.num_mapped_sgs) {
req->request.dma = DMA_ADDR_INVALID;
dma_unmap_sg(dwc->dev, req->request.sg,
req->request.num_sgs,
req->request.num_mapped_sgs,
req->direction ? DMA_TO_DEVICE
: DMA_FROM_DEVICE);

7
drivers/usb/gadget/composite.c
View File

@ -175,13 +175,12 @@ ep_found:
_ep->comp_desc = comp_desc;
if (g->speed == USB_SPEED_SUPER) {
switch (usb_endpoint_type(_ep->desc)) {
case USB_ENDPOINT_XFER_BULK:
case USB_ENDPOINT_XFER_INT:
_ep->maxburst = comp_desc->bMaxBurst;
break;
case USB_ENDPOINT_XFER_ISOC:
/* mult: bits 1:0 of bmAttributes */
_ep->mult = comp_desc->bmAttributes & 0x3;
case USB_ENDPOINT_XFER_BULK:
case USB_ENDPOINT_XFER_INT:
_ep->maxburst = comp_desc->bMaxBurst;
break;
default:
/* Do nothing for control endpoints */

2
drivers/usb/gadget/epautoconf.c
View File

@ -126,7 +126,7 @@ ep_matches (
* descriptor and see if the EP matches it
*/
if (usb_endpoint_xfer_bulk(desc)) {
if (ep_comp) {
if (ep_comp && gadget->max_speed >= USB_SPEED_SUPER) {
num_req_streams = ep_comp->bmAttributes & 0x1f;
if (num_req_streams > ep->max_streams)
return 0;

10
drivers/usb/gadget/f_mass_storage.c
View File

@ -3123,15 +3123,15 @@ fsg_add(struct usb_composite_dev *cdev, struct usb_configuration *c,
struct fsg_module_parameters {
char *file[FSG_MAX_LUNS];
int ro[FSG_MAX_LUNS];
int removable[FSG_MAX_LUNS];
int cdrom[FSG_MAX_LUNS];
int nofua[FSG_MAX_LUNS];
bool ro[FSG_MAX_LUNS];
bool removable[FSG_MAX_LUNS];
bool cdrom[FSG_MAX_LUNS];
bool nofua[FSG_MAX_LUNS];
unsigned int file_count, ro_count, removable_count, cdrom_count;
unsigned int nofua_count;
unsigned int luns; /* nluns */
int stall; /* can_stall */
bool stall; /* can_stall */
};
#define _FSG_MODULE_PARAM_ARRAY(prefix, params, name, type, desc) \

4
drivers/usb/gadget/fsl_udc_core.c
View File

@ -1430,7 +1430,7 @@ static void setup_received_irq(struct fsl_udc *udc,
int pipe = get_pipe_by_windex(wIndex);
struct fsl_ep *ep;
if (wValue != 0 || wLength != 0 || pipe > udc->max_ep)
if (wValue != 0 || wLength != 0 || pipe >= udc->max_ep)
break;
ep = get_ep_by_pipe(udc, pipe);
@ -1673,7 +1673,7 @@ static void dtd_complete_irq(struct fsl_udc *udc)
if (!bit_pos)
return;
for (i = 0; i < udc->max_ep * 2; i++) {
for (i = 0; i < udc->max_ep; i++) {
ep_num = i >> 1;
direction = i % 2;

107
drivers/usb/gadget/langwell_udc.c
View File

@ -11,11 +11,6 @@
/* #undef DEBUG */
/* #undef VERBOSE_DEBUG */
#if defined(CONFIG_USB_LANGWELL_OTG)
#define OTG_TRANSCEIVER
#endif
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
@ -1522,8 +1517,7 @@ static void langwell_udc_stop(struct langwell_udc *dev)
/* stop all USB activities */
static void stop_activity(struct langwell_udc *dev,
struct usb_gadget_driver *driver)
static void stop_activity(struct langwell_udc *dev)
{
struct langwell_ep *ep;
dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
@ -1535,9 +1529,9 @@ static void stop_activity(struct langwell_udc *dev,
}
/* report disconnect; the driver is already quiesced */
if (driver) {
if (dev->driver) {
spin_unlock(&dev->lock);
driver->disconnect(&dev->gadget);
dev->driver->disconnect(&dev->gadget);
spin_lock(&dev->lock);
}
@ -1925,11 +1919,10 @@ static int langwell_stop(struct usb_gadget *g,
/* stop all usb activities */
dev->gadget.speed = USB_SPEED_UNKNOWN;
stop_activity(dev, driver);
spin_unlock_irqrestore(&dev->lock, flags);
dev->gadget.dev.driver = NULL;
dev->driver = NULL;
stop_activity(dev);
spin_unlock_irqrestore(&dev->lock, flags);
device_remove_file(&dev->pdev->dev, &dev_attr_function);
@ -2315,13 +2308,9 @@ static void handle_setup_packet(struct langwell_udc *dev,
if (!gadget_is_otg(&dev->gadget))
break;
else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE) {
else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
dev->gadget.b_hnp_enable = 1;
#ifdef OTG_TRANSCEIVER
if (!dev->lotg->otg.default_a)
dev->lotg->hsm.b_hnp_enable = 1;
#endif
} else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
dev->gadget.a_hnp_support = 1;
else if (setup->bRequest ==
USB_DEVICE_A_ALT_HNP_SUPPORT)
@ -2733,7 +2722,7 @@ static void handle_usb_reset(struct langwell_udc *dev)
dev->bus_reset = 1;
/* reset all the queues, stop all USB activities */
stop_activity(dev, dev->driver);
stop_activity(dev);
dev->usb_state = USB_STATE_DEFAULT;
} else {
dev_vdbg(&dev->pdev->dev, "device controller reset\n");
@ -2741,7 +2730,7 @@ static void handle_usb_reset(struct langwell_udc *dev)
langwell_udc_reset(dev);
/* reset all the queues, stop all USB activities */
stop_activity(dev, dev->driver);
stop_activity(dev);
/* reset ep0 dQH and endptctrl */
ep0_reset(dev);
@ -2752,12 +2741,6 @@ static void handle_usb_reset(struct langwell_udc *dev)
dev->usb_state = USB_STATE_ATTACHED;
}
#ifdef OTG_TRANSCEIVER
/* refer to USB OTG 6.6.2.3 b_hnp_en is cleared */
if (!dev->lotg->otg.default_a)
dev->lotg->hsm.b_hnp_enable = 0;
#endif
dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
}
@ -2770,29 +2753,6 @@ static void handle_bus_suspend(struct langwell_udc *dev)
dev->resume_state = dev->usb_state;
dev->usb_state = USB_STATE_SUSPENDED;
#ifdef OTG_TRANSCEIVER
if (dev->lotg->otg.default_a) {
if (dev->lotg->hsm.b_bus_suspend_vld == 1) {
dev->lotg->hsm.b_bus_suspend = 1;
/* notify transceiver the state changes */
if (spin_trylock(&dev->lotg->wq_lock)) {
langwell_update_transceiver();
spin_unlock(&dev->lotg->wq_lock);
}
}
dev->lotg->hsm.b_bus_suspend_vld++;
} else {
if (!dev->lotg->hsm.a_bus_suspend) {
dev->lotg->hsm.a_bus_suspend = 1;
/* notify transceiver the state changes */
if (spin_trylock(&dev->lotg->wq_lock)) {
langwell_update_transceiver();
spin_unlock(&dev->lotg->wq_lock);
}
}
}
#endif
/* report suspend to the driver */
if (dev->driver) {
if (dev->driver->suspend) {
@ -2823,11 +2783,6 @@ static void handle_bus_resume(struct langwell_udc *dev)
if (dev->pdev->device != 0x0829)
langwell_phy_low_power(dev, 0);
#ifdef OTG_TRANSCEIVER
if (dev->lotg->otg.default_a == 0)
dev->lotg->hsm.a_bus_suspend = 0;
#endif
/* report resume to the driver */
if (dev->driver) {
if (dev->driver->resume) {
@ -3020,7 +2975,6 @@ static void langwell_udc_remove(struct pci_dev *pdev)
dev->done = &done;
#ifndef OTG_TRANSCEIVER
/* free dTD dma_pool and dQH */
if (dev->dtd_pool)
dma_pool_destroy(dev->dtd_pool);
@ -3032,7 +2986,6 @@ static void langwell_udc_remove(struct pci_dev *pdev)
/* release SRAM caching */
if (dev->has_sram && dev->got_sram)
sram_deinit(dev);
#endif
if (dev->status_req) {
kfree(dev->status_req->req.buf);
@ -3045,7 +2998,6 @@ static void langwell_udc_remove(struct pci_dev *pdev)
if (dev->got_irq)
free_irq(pdev->irq, dev);
#ifndef OTG_TRANSCEIVER
if (dev->cap_regs)
iounmap(dev->cap_regs);
@ -3055,13 +3007,6 @@ static void langwell_udc_remove(struct pci_dev *pdev)
if (dev->enabled)
pci_disable_device(pdev);
#else
if (dev->transceiver) {
otg_put_transceiver(dev->transceiver);
dev->transceiver = NULL;
dev->lotg = NULL;
}
#endif
dev->cap_regs = NULL;
@ -3072,9 +3017,7 @@ static void langwell_udc_remove(struct pci_dev *pdev)
device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
device_remove_file(&pdev->dev, &dev_attr_remote_wakeup);
#ifndef OTG_TRANSCEIVER
pci_set_drvdata(pdev, NULL);
#endif
/* free dev, wait for the release() finished */
wait_for_completion(&done);
@ -3089,9 +3032,7 @@ static int langwell_udc_probe(struct pci_dev *pdev,
const struct pci_device_id *id)
{
struct langwell_udc *dev;
#ifndef OTG_TRANSCEIVER
unsigned long resource, len;
#endif
void __iomem *base = NULL;
size_t size;
int retval;
@ -3109,16 +3050,6 @@ static int langwell_udc_probe(struct pci_dev *pdev,
dev->pdev = pdev;
dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
#ifdef OTG_TRANSCEIVER
/* PCI device is already enabled by otg_transceiver driver */
dev->enabled = 1;
/* mem region and register base */
dev->region = 1;
dev->transceiver = otg_get_transceiver();
dev->lotg = otg_to_langwell(dev->transceiver);
base = dev->lotg->regs;
#else
pci_set_drvdata(pdev, dev);
/* now all the pci goodies ... */
@ -3139,7 +3070,6 @@ static int langwell_udc_probe(struct pci_dev *pdev,
dev->region = 1;
base = ioremap_nocache(resource, len);
#endif
if (base == NULL) {
dev_err(&dev->pdev->dev, "can't map memory\n");
retval = -EFAULT;
@ -3163,7 +3093,6 @@ static int langwell_udc_probe(struct pci_dev *pdev,
dev->got_sram = 0;
dev_vdbg(&dev->pdev->dev, "dev->has_sram: %d\n", dev->has_sram);
#ifndef OTG_TRANSCEIVER
/* enable SRAM caching if detected */
if (dev->has_sram && !dev->got_sram)
sram_init(dev);
@ -3182,7 +3111,6 @@ static int langwell_udc_probe(struct pci_dev *pdev,
goto error;
}
dev->got_irq = 1;
#endif
/* set stopped bit */
dev->stopped = 1;
@ -3257,10 +3185,8 @@ static int langwell_udc_probe(struct pci_dev *pdev,
dev->remote_wakeup = 0;
dev->dev_status = 1 << USB_DEVICE_SELF_POWERED;
#ifndef OTG_TRANSCEIVER
/* reset device controller */
langwell_udc_reset(dev);
#endif
/* initialize gadget structure */
dev->gadget.ops = &langwell_ops; /* usb_gadget_ops */
@ -3268,9 +3194,6 @@ static int langwell_udc_probe(struct pci_dev *pdev,
INIT_LIST_HEAD(&dev->gadget.ep_list); /* ep_list */
dev->gadget.speed = USB_SPEED_UNKNOWN; /* speed */
dev->gadget.max_speed = USB_SPEED_HIGH; /* support dual speed */
#ifdef OTG_TRANSCEIVER
dev->gadget.is_otg = 1; /* support otg mode */
#endif
/* the "gadget" abstracts/virtualizes the controller */
dev_set_name(&dev->gadget.dev, "gadget");
@ -3282,10 +3205,8 @@ static int langwell_udc_probe(struct pci_dev *pdev,
/* controller endpoints reinit */
eps_reinit(dev);
#ifndef OTG_TRANSCEIVER
/* reset ep0 dQH and endptctrl */
ep0_reset(dev);
#endif
/* create dTD dma_pool resource */
dev->dtd_pool = dma_pool_create("langwell_dtd",
@ -3367,7 +3288,7 @@ static int langwell_udc_suspend(struct pci_dev *pdev, pm_message_t state)
spin_lock_irq(&dev->lock);
/* stop all usb activities */
stop_activity(dev, dev->driver);
stop_activity(dev);
spin_unlock_irq(&dev->lock);
/* free dTD dma_pool and dQH */
@ -3525,22 +3446,14 @@ static struct pci_driver langwell_pci_driver = {
static int __init init(void)
{
#ifdef OTG_TRANSCEIVER
return langwell_register_peripheral(&langwell_pci_driver);
#else
return pci_register_driver(&langwell_pci_driver);
#endif
}
module_init(init);
static void __exit cleanup(void)
{
#ifdef OTG_TRANSCEIVER
return langwell_unregister_peripheral(&langwell_pci_driver);
#else
pci_unregister_driver(&langwell_pci_driver);
#endif
}
module_exit(cleanup);

1
drivers/usb/gadget/langwell_udc.h
View File

@ -8,7 +8,6 @@
*/
#include <linux/usb/langwell_udc.h>
#include <linux/usb/langwell_otg.h>
/*-------------------------------------------------------------------------*/

6
drivers/usb/gadget/storage_common.c
View File

@ -598,16 +598,16 @@ static __maybe_unused struct usb_ss_cap_descriptor fsg_ss_cap_desc = {
| USB_5GBPS_OPERATION),
.bFunctionalitySupport = USB_LOW_SPEED_OPERATION,
.bU1devExitLat = USB_DEFAULT_U1_DEV_EXIT_LAT,
.bU2DevExitLat = USB_DEFAULT_U2_DEV_EXIT_LAT,
.bU2DevExitLat = cpu_to_le16(USB_DEFAULT_U2_DEV_EXIT_LAT),
};
static __maybe_unused struct usb_bos_descriptor fsg_bos_desc = {
.bLength = USB_DT_BOS_SIZE,
.bDescriptorType = USB_DT_BOS,
.wTotalLength = USB_DT_BOS_SIZE
.wTotalLength = cpu_to_le16(USB_DT_BOS_SIZE
+ USB_DT_USB_EXT_CAP_SIZE
+ USB_DT_USB_SS_CAP_SIZE,
+ USB_DT_USB_SS_CAP_SIZE),
.bNumDeviceCaps = 2,
};

3
drivers/usb/musb/davinci.c
View File

@ -33,9 +33,6 @@
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/memory.h>
#include <asm/gpio.h>
#include <mach/cputype.h>
#include <asm/mach-types.h>

5
drivers/usb/musb/musb_core.c
View File

@ -981,6 +981,9 @@ static void musb_shutdown(struct platform_device *pdev)
unsigned long flags;
pm_runtime_get_sync(musb->controller);
musb_gadget_cleanup(musb);
spin_lock_irqsave(&musb->lock, flags);
musb_platform_disable(musb);
musb_generic_disable(musb);
@ -1827,8 +1830,6 @@ static void musb_free(struct musb *musb)
sysfs_remove_group(&musb->controller->kobj, &musb_attr_group);
#endif
musb_gadget_cleanup(musb);
if (musb->nIrq >= 0) {
if (musb->irq_wake)
disable_irq_wake(musb->nIrq);

4
drivers/usb/musb/omap2430.c
View File

@ -222,7 +222,6 @@ static inline void omap2430_low_level_init(struct musb *musb)
musb_writel(musb->mregs, OTG_FORCESTDBY, l);
}
/* blocking notifier support */
static int musb_otg_notifications(struct notifier_block *nb,
unsigned long event, void *unused)
{
@ -231,7 +230,7 @@ static int musb_otg_notifications(struct notifier_block *nb,
musb->xceiv_event = event;
schedule_work(&musb->otg_notifier_work);
return 0;
return NOTIFY_OK;
}
static void musb_otg_notifier_work(struct work_struct *data_notifier_work)
@ -386,6 +385,7 @@ static void omap2430_musb_disable(struct musb *musb)
static int omap2430_musb_exit(struct musb *musb)
{
del_timer_sync(&musb_idle_timer);
cancel_work_sync(&musb->otg_notifier_work);
omap2430_low_level_exit(musb);
otg_put_transceiver(musb->xceiv);

18
drivers/usb/otg/Kconfig
View File

@ -86,20 +86,6 @@ config NOP_USB_XCEIV
built-in with usb ip or which are autonomous and doesn't require any
phy programming such as ISP1x04 etc.
config USB_LANGWELL_OTG
tristate "Intel Langwell USB OTG dual-role support"
depends on USB && PCI && INTEL_SCU_IPC
select USB_OTG
select USB_OTG_UTILS
help
Say Y here if you want to build Intel Langwell USB OTG
transciever driver in kernel. This driver implements role
switch between EHCI host driver and Langwell USB OTG
client driver.
To compile this driver as a module, choose M here: the
module will be called langwell_otg.
config USB_MSM_OTG
tristate "OTG support for Qualcomm on-chip USB controller"
depends on (USB || USB_GADGET) && ARCH_MSM
@ -124,7 +110,7 @@ config AB8500_USB
config FSL_USB2_OTG
bool "Freescale USB OTG Transceiver Driver"
depends on USB_EHCI_FSL && USB_GADGET_FSL_USB2
depends on USB_EHCI_FSL && USB_GADGET_FSL_USB2 && USB_SUSPEND
select USB_OTG
select USB_OTG_UTILS
help
@ -132,7 +118,7 @@ config FSL_USB2_OTG
config USB_MV_OTG
tristate "Marvell USB OTG support"
depends on USB_MV_UDC
depends on USB_MV_UDC && USB_SUSPEND
select USB_OTG
select USB_OTG_UTILS
help

1
drivers/usb/otg/Makefile
View File

@ -13,7 +13,6 @@ obj-$(CONFIG_USB_GPIO_VBUS) += gpio_vbus.o
obj-$(CONFIG_ISP1301_OMAP) += isp1301_omap.o
obj-$(CONFIG_TWL4030_USB) += twl4030-usb.o
obj-$(CONFIG_TWL6030_USB) += twl6030-usb.o
obj-$(CONFIG_USB_LANGWELL_OTG) += langwell_otg.o
obj-$(CONFIG_NOP_USB_XCEIV) += nop-usb-xceiv.o
obj-$(CONFIG_USB_ULPI) += ulpi.o
obj-$(CONFIG_USB_ULPI_VIEWPORT) += ulpi_viewport.o

2347
drivers/usb/otg/langwell_otg.c
View File

File diff suppressed because it is too large Load Diff

2
drivers/usb/renesas_usbhs/mod_gadget.c
View File

@ -425,7 +425,7 @@ static int usbhsg_recip_run_handle(struct usbhs_priv *priv,
struct usbhs_pipe *pipe;
int recip = ctrl->bRequestType & USB_RECIP_MASK;
int nth = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK;
int ret;
int ret = 0;
int (*func)(struct usbhs_priv *priv, struct usbhsg_uep *uep,
struct usb_ctrlrequest *ctrl);
char *msg;

139
include/linux/usb/langwell_otg.h
View File

@ -1,139 +0,0 @@
/*
* Intel Langwell USB OTG transceiver driver
* Copyright (C) 2008 - 2010, Intel Corporation.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
*
*/
#ifndef __LANGWELL_OTG_H
#define __LANGWELL_OTG_H
#include <linux/usb/intel_mid_otg.h>
#define CI_USBCMD 0x30
# define USBCMD_RST BIT(1)
# define USBCMD_RS BIT(0)
#define CI_USBSTS 0x34
# define USBSTS_SLI BIT(8)
# define USBSTS_URI BIT(6)
# define USBSTS_PCI BIT(2)
#define CI_PORTSC1 0x74
# define PORTSC_PP BIT(12)
# define PORTSC_LS (BIT(11) | BIT(10))
# define PORTSC_SUSP BIT(7)
# define PORTSC_CCS BIT(0)
#define CI_HOSTPC1 0xb4
# define HOSTPC1_PHCD BIT(22)
#define CI_OTGSC 0xf4
# define OTGSC_DPIE BIT(30)
# define OTGSC_1MSE BIT(29)
# define OTGSC_BSEIE BIT(28)
# define OTGSC_BSVIE BIT(27)
# define OTGSC_ASVIE BIT(26)
# define OTGSC_AVVIE BIT(25)
# define OTGSC_IDIE BIT(24)
# define OTGSC_DPIS BIT(22)
# define OTGSC_1MSS BIT(21)
# define OTGSC_BSEIS BIT(20)
# define OTGSC_BSVIS BIT(19)
# define OTGSC_ASVIS BIT(18)
# define OTGSC_AVVIS BIT(17)
# define OTGSC_IDIS BIT(16)
# define OTGSC_DPS BIT(14)
# define OTGSC_1MST BIT(13)
# define OTGSC_BSE BIT(12)
# define OTGSC_BSV BIT(11)
# define OTGSC_ASV BIT(10)
# define OTGSC_AVV BIT(9)
# define OTGSC_ID BIT(8)
# define OTGSC_HABA BIT(7)
# define OTGSC_HADP BIT(6)
# define OTGSC_IDPU BIT(5)
# define OTGSC_DP BIT(4)
# define OTGSC_OT BIT(3)
# define OTGSC_HAAR BIT(2)
# define OTGSC_VC BIT(1)
# define OTGSC_VD BIT(0)
# define OTGSC_INTEN_MASK (0x7f << 24)
# define OTGSC_INT_MASK (0x5f << 24)
# define OTGSC_INTSTS_MASK (0x7f << 16)
#define CI_USBMODE 0xf8
# define USBMODE_CM (BIT(1) | BIT(0))
# define USBMODE_IDLE 0
# define USBMODE_DEVICE 0x2
# define USBMODE_HOST 0x3
#define USBCFG_ADDR 0xff10801c
#define USBCFG_LEN 4
# define USBCFG_VBUSVAL BIT(14)
# define USBCFG_AVALID BIT(13)
# define USBCFG_BVALID BIT(12)
# define USBCFG_SESEND BIT(11)
#define INTR_DUMMY_MASK (USBSTS_SLI | USBSTS_URI | USBSTS_PCI)
enum langwell_otg_timer_type {
TA_WAIT_VRISE_TMR,
TA_WAIT_BCON_TMR,
TA_AIDL_BDIS_TMR,
TB_ASE0_BRST_TMR,
TB_SE0_SRP_TMR,
TB_SRP_INIT_TMR,
TB_SRP_FAIL_TMR,
TB_BUS_SUSPEND_TMR
};
#define TA_WAIT_VRISE 100
#define TA_WAIT_BCON 30000
#define TA_AIDL_BDIS 15000
#define TB_ASE0_BRST 5000
#define TB_SE0_SRP 2
#define TB_SRP_INIT 100
#define TB_SRP_FAIL 5500
#define TB_BUS_SUSPEND 500
struct langwell_otg_timer {
unsigned long expires; /* Number of count increase to timeout */
unsigned long count; /* Tick counter */
void (*function)(unsigned long); /* Timeout function */
unsigned long data; /* Data passed to function */
struct list_head list;
};
struct langwell_otg {
struct intel_mid_otg_xceiv iotg;
struct device *dev;
void __iomem *usbcfg; /* SCCBUSB config Reg */
unsigned region;
unsigned cfg_region;
struct work_struct work;
struct workqueue_struct *qwork;
struct timer_list hsm_timer;
spinlock_t lock;
spinlock_t wq_lock;
struct notifier_block iotg_notifier;
};
static inline
struct langwell_otg *mid_xceiv_to_lnw(struct intel_mid_otg_xceiv *iotg)
{
return container_of(iotg, struct langwell_otg, iotg);
}
#endif /* __LANGWELL_OTG_H__ */