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x86: Replace uses of current_cpu_data with this_cpu ops
Replace all uses of current_cpu_data with this_cpu operations on the per cpu structure cpu_info. The scala accesses are replaced with the matching this_cpu ops which results in smaller and more efficient code. In the long run, it might be a good idea to remove cpu_data() macro too and use per_cpu macro directly. tj: updated description Cc: Yinghai Lu <yinghai@kernel.org> Cc: Ingo Molnar <mingo@elte.hu> Acked-by: H. Peter Anvin <hpa@zytor.com> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Christoph Lameter <cl@linux.com> Signed-off-by: Tejun Heo <tj@kernel.org>
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@ -141,10 +141,9 @@ extern __u32 cpu_caps_set[NCAPINTS];
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#ifdef CONFIG_SMP
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DECLARE_PER_CPU_SHARED_ALIGNED(struct cpuinfo_x86, cpu_info);
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#define cpu_data(cpu) per_cpu(cpu_info, cpu)
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#define current_cpu_data __get_cpu_var(cpu_info)
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#else
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#define cpu_info boot_cpu_data
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#define cpu_data(cpu) boot_cpu_data
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#define current_cpu_data boot_cpu_data
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#endif
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extern const struct seq_operations cpuinfo_op;
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@ -516,7 +516,7 @@ static void __cpuinit setup_APIC_timer(void)
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{
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struct clock_event_device *levt = &__get_cpu_var(lapic_events);
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if (cpu_has(¤t_cpu_data, X86_FEATURE_ARAT)) {
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if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_ARAT)) {
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lapic_clockevent.features &= ~CLOCK_EVT_FEAT_C3STOP;
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/* Make LAPIC timer preferrable over percpu HPET */
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lapic_clockevent.rating = 150;
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@ -668,7 +668,7 @@ EXPORT_SYMBOL_GPL(amd_erratum_383);
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bool cpu_has_amd_erratum(const int *erratum)
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{
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struct cpuinfo_x86 *cpu = ¤t_cpu_data;
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struct cpuinfo_x86 *cpu = __this_cpu_ptr(&cpu_info);
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int osvw_id = *erratum++;
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u32 range;
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u32 ms;
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@ -521,7 +521,7 @@ static void check_supported_cpu(void *_rc)
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*rc = -ENODEV;
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if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
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if (__this_cpu_read(cpu_info.x86_vendor) != X86_VENDOR_AMD)
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return;
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eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
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@ -266,7 +266,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
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line_size = l2.line_size;
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lines_per_tag = l2.lines_per_tag;
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/* cpu_data has errata corrections for K7 applied */
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size_in_kb = current_cpu_data.x86_cache_size;
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size_in_kb = __this_cpu_read(cpu_info.x86_cache_size);
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break;
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case 3:
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if (!l3.val)
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@ -288,7 +288,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax,
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eax->split.type = types[leaf];
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eax->split.level = levels[leaf];
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eax->split.num_threads_sharing = 0;
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eax->split.num_cores_on_die = current_cpu_data.x86_max_cores - 1;
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eax->split.num_cores_on_die = __this_cpu_read(cpu_info.x86_max_cores) - 1;
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if (assoc == 0xffff)
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@ -1159,7 +1159,7 @@ static void mce_start_timer(unsigned long data)
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WARN_ON(smp_processor_id() != data);
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if (mce_available(¤t_cpu_data)) {
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if (mce_available(__this_cpu_ptr(&cpu_info))) {
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machine_check_poll(MCP_TIMESTAMP,
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&__get_cpu_var(mce_poll_banks));
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}
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@ -1767,7 +1767,7 @@ static int mce_shutdown(struct sys_device *dev)
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static int mce_resume(struct sys_device *dev)
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{
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__mcheck_cpu_init_generic();
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__mcheck_cpu_init_vendor(¤t_cpu_data);
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__mcheck_cpu_init_vendor(__this_cpu_ptr(&cpu_info));
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return 0;
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}
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@ -1775,7 +1775,7 @@ static int mce_resume(struct sys_device *dev)
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static void mce_cpu_restart(void *data)
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{
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del_timer_sync(&__get_cpu_var(mce_timer));
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if (!mce_available(¤t_cpu_data))
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if (!mce_available(__this_cpu_ptr(&cpu_info)))
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return;
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__mcheck_cpu_init_generic();
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__mcheck_cpu_init_timer();
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@ -1790,7 +1790,7 @@ static void mce_restart(void)
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/* Toggle features for corrected errors */
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static void mce_disable_ce(void *all)
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{
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if (!mce_available(¤t_cpu_data))
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if (!mce_available(__this_cpu_ptr(&cpu_info)))
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return;
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if (all)
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del_timer_sync(&__get_cpu_var(mce_timer));
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@ -1799,7 +1799,7 @@ static void mce_disable_ce(void *all)
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static void mce_enable_ce(void *all)
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{
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if (!mce_available(¤t_cpu_data))
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if (!mce_available(__this_cpu_ptr(&cpu_info)))
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return;
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cmci_reenable();
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cmci_recheck();
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@ -2022,7 +2022,7 @@ static void __cpuinit mce_disable_cpu(void *h)
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unsigned long action = *(unsigned long *)h;
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int i;
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if (!mce_available(¤t_cpu_data))
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if (!mce_available(__this_cpu_ptr(&cpu_info)))
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return;
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if (!(action & CPU_TASKS_FROZEN))
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@ -2040,7 +2040,7 @@ static void __cpuinit mce_reenable_cpu(void *h)
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unsigned long action = *(unsigned long *)h;
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int i;
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if (!mce_available(¤t_cpu_data))
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if (!mce_available(__this_cpu_ptr(&cpu_info)))
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return;
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if (!(action & CPU_TASKS_FROZEN))
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@ -130,7 +130,7 @@ void cmci_recheck(void)
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unsigned long flags;
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int banks;
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if (!mce_available(¤t_cpu_data) || !cmci_supported(&banks))
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if (!mce_available(__this_cpu_ptr(&cpu_info)) || !cmci_supported(&banks))
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return;
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local_irq_save(flags);
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machine_check_poll(MCP_TIMESTAMP, &__get_cpu_var(mce_banks_owned));
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@ -445,7 +445,7 @@ void mwait_idle_with_hints(unsigned long ax, unsigned long cx)
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{
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trace_power_start(POWER_CSTATE, (ax>>4)+1, smp_processor_id());
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if (!need_resched()) {
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if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
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if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
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clflush((void *)¤t_thread_info()->flags);
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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@ -460,7 +460,7 @@ static void mwait_idle(void)
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{
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if (!need_resched()) {
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trace_power_start(POWER_CSTATE, 1, smp_processor_id());
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if (cpu_has(¤t_cpu_data, X86_FEATURE_CLFLUSH_MONITOR))
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if (cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLUSH_MONITOR))
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clflush((void *)¤t_thread_info()->flags);
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__monitor((void *)¤t_thread_info()->flags, 0, 0);
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@ -430,7 +430,7 @@ void __cpuinit set_cpu_sibling_map(int cpu)
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cpumask_set_cpu(cpu, c->llc_shared_map);
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if (current_cpu_data.x86_max_cores == 1) {
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if (__this_cpu_read(cpu_info.x86_max_cores) == 1) {
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cpumask_copy(cpu_core_mask(cpu), cpu_sibling_mask(cpu));
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c->booted_cores = 1;
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return;
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@ -1094,7 +1094,7 @@ void __init native_smp_prepare_cpus(unsigned int max_cpus)
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preempt_disable();
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smp_cpu_index_default();
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current_cpu_data = boot_cpu_data;
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memcpy(__this_cpu_ptr(&cpu_info), &boot_cpu_data, sizeof(cpu_info));
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cpumask_copy(cpu_callin_mask, cpumask_of(0));
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mb();
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/*
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@ -1397,11 +1397,11 @@ static inline void mwait_play_dead(void)
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int i;
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void *mwait_ptr;
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if (!cpu_has(¤t_cpu_data, X86_FEATURE_MWAIT))
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if (!cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_MWAIT))
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return;
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if (!cpu_has(¤t_cpu_data, X86_FEATURE_CLFLSH))
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if (!cpu_has(__this_cpu_ptr(&cpu_info), X86_FEATURE_CLFLSH))
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return;
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if (current_cpu_data.cpuid_level < CPUID_MWAIT_LEAF)
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if (__this_cpu_read(cpu_info.cpuid_level) < CPUID_MWAIT_LEAF)
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return;
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eax = CPUID_MWAIT_LEAF;
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@ -1452,7 +1452,7 @@ static inline void mwait_play_dead(void)
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static inline void hlt_play_dead(void)
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{
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if (current_cpu_data.x86 >= 4)
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if (__this_cpu_read(cpu_info.x86) >= 4)
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wbinvd();
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while (1) {
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@ -95,8 +95,8 @@ static void ppro_setup_ctrs(struct op_x86_model_spec const *model,
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* counter width:
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*/
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if (!(eax.split.version_id == 0 &&
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current_cpu_data.x86 == 6 &&
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current_cpu_data.x86_model == 15)) {
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__this_cpu_read(cpu_info.x86) == 6 &&
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__this_cpu_read(cpu_info.x86_model) == 15)) {
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if (counter_width < eax.split.bit_width)
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counter_width = eax.split.bit_width;
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@ -235,8 +235,8 @@ static void arch_perfmon_setup_counters(void)
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eax.full = cpuid_eax(0xa);
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/* Workaround for BIOS bugs in 6/15. Taken from perfmon2 */
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if (eax.split.version_id == 0 && current_cpu_data.x86 == 6 &&
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current_cpu_data.x86_model == 15) {
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if (eax.split.version_id == 0 && __this_cpu_read(cpu_info.x86) == 6 &&
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__this_cpu_read(cpu_info.x86_model) == 15) {
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eax.split.version_id = 2;
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eax.split.num_counters = 2;
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eax.split.bit_width = 40;
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@ -377,7 +377,7 @@ static int init_timing_params(unsigned int new_duty_cycle,
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duty_cycle = new_duty_cycle;
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freq = new_freq;
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loops_per_sec = current_cpu_data.loops_per_jiffy;
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loops_per_sec = __this_cpu_read(cpu.info.loops_per_jiffy);
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loops_per_sec *= HZ;
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/* How many clocks in a microsecond?, avoiding long long divide */
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@ -398,7 +398,7 @@ static int init_timing_params(unsigned int new_duty_cycle,
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dprintk("in init_timing_params, freq=%d, duty_cycle=%d, "
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"clk/jiffy=%ld, pulse=%ld, space=%ld, "
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"conv_us_to_clocks=%ld\n",
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freq, duty_cycle, current_cpu_data.loops_per_jiffy,
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freq, duty_cycle, __this_cpu_read(cpu_info.loops_per_jiffy),
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pulse_width, space_width, conv_us_to_clocks);
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return 0;
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}
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