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PPC: sg chaining support
This updates the ppc iommu/pci dma mappers to sg chaining. Includes further fixes from FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>. Signed-off-by: Jens Axboe <jens.axboe@oracle.com>
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@ -154,12 +154,13 @@ static void dma_direct_unmap_single(struct device *dev, dma_addr_t dma_addr,
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{
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}
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static int dma_direct_map_sg(struct device *dev, struct scatterlist *sg,
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static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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for (i = 0; i < nents; i++, sg++) {
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for_each_sg(sgl, sg, nents, i) {
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sg->dma_address = (page_to_phys(sg->page) + sg->offset) |
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dma_direct_offset;
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sg->dma_length = sg->length;
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@ -87,15 +87,16 @@ static void ibmebus_unmap_single(struct device *dev,
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}
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static int ibmebus_map_sg(struct device *dev,
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struct scatterlist *sg,
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struct scatterlist *sgl,
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int nents, enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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for (i = 0; i < nents; i++) {
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sg[i].dma_address = (dma_addr_t)page_address(sg[i].page)
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+ sg[i].offset;
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sg[i].dma_length = sg[i].length;
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for_each_sg(sgl, sg, nents, i) {
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sg->dma_address = (dma_addr_t)page_address(sg->page)
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+ sg->offset;
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sg->dma_length = sg->length;
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}
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return nents;
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@ -277,7 +277,7 @@ int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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dma_addr_t dma_next = 0, dma_addr;
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unsigned long flags;
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struct scatterlist *s, *outs, *segstart;
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int outcount, incount;
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int outcount, incount, i;
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unsigned long handle;
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BUG_ON(direction == DMA_NONE);
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@ -297,7 +297,7 @@ int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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spin_lock_irqsave(&(tbl->it_lock), flags);
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for (s = outs; nelems; nelems--, s++) {
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for_each_sg(sglist, s, nelems, i) {
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unsigned long vaddr, npages, entry, slen;
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slen = s->length;
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@ -341,7 +341,8 @@ int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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if (novmerge || (dma_addr != dma_next)) {
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/* Can't merge: create a new segment */
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segstart = s;
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outcount++; outs++;
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outcount++;
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outs = sg_next(outs);
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DBG(" can't merge, new segment.\n");
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} else {
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outs->dma_length += s->length;
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@ -374,7 +375,7 @@ int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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* next entry of the sglist if we didn't fill the list completely
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*/
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if (outcount < incount) {
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outs++;
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outs = sg_next(outs);
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outs->dma_address = DMA_ERROR_CODE;
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outs->dma_length = 0;
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}
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@ -385,7 +386,7 @@ int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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return outcount;
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failure:
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for (s = &sglist[0]; s <= outs; s++) {
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for_each_sg(sglist, s, nelems, i) {
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if (s->dma_length != 0) {
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unsigned long vaddr, npages;
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@ -395,6 +396,8 @@ int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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s->dma_address = DMA_ERROR_CODE;
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s->dma_length = 0;
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}
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if (s == outs)
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break;
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}
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spin_unlock_irqrestore(&(tbl->it_lock), flags);
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return 0;
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@ -404,6 +407,7 @@ int iommu_map_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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int nelems, enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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unsigned long flags;
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BUG_ON(direction == DMA_NONE);
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@ -413,15 +417,16 @@ void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
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spin_lock_irqsave(&(tbl->it_lock), flags);
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sg = sglist;
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while (nelems--) {
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unsigned int npages;
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dma_addr_t dma_handle = sglist->dma_address;
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dma_addr_t dma_handle = sg->dma_address;
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if (sglist->dma_length == 0)
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if (sg->dma_length == 0)
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break;
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npages = iommu_num_pages(dma_handle,sglist->dma_length);
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npages = iommu_num_pages(dma_handle, sg->dma_length);
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__iommu_free(tbl, dma_handle, npages);
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sglist++;
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sg = sg_next(sg);
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}
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/* Flush/invalidate TLBs if necessary. As for iommu_free(), we
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@ -6,149 +6,6 @@
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*/
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#ifndef _ASM_DMA_MAPPING_H
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#define _ASM_DMA_MAPPING_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <linux/cache.h>
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/* need struct page definitions */
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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#include <asm/io.h>
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#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
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#ifdef CONFIG_NOT_COHERENT_CACHE
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/*
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* DMA-consistent mapping functions for PowerPCs that don't support
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* cache snooping. These allocate/free a region of uncached mapped
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* memory space for use with DMA devices. Alternatively, you could
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* allocate the space "normally" and use the cache management functions
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* to ensure it is consistent.
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*/
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extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
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extern void __dma_free_coherent(size_t size, void *vaddr);
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extern void __dma_sync(void *vaddr, size_t size, int direction);
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extern void __dma_sync_page(struct page *page, unsigned long offset,
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size_t size, int direction);
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#else /* ! CONFIG_NOT_COHERENT_CACHE */
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/*
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* Cache coherent cores.
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*/
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#define __dma_alloc_coherent(gfp, size, handle) NULL
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#define __dma_free_coherent(size, addr) ((void)0)
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#define __dma_sync(addr, size, rw) ((void)0)
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#define __dma_sync_page(pg, off, sz, rw) ((void)0)
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#endif /* ! CONFIG_NOT_COHERENT_CACHE */
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#ifdef CONFIG_PPC64
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/*
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* DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
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*/
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struct dma_mapping_ops {
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void * (*alloc_coherent)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag);
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void (*free_coherent)(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle);
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dma_addr_t (*map_single)(struct device *dev, void *ptr,
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size_t size, enum dma_data_direction direction);
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void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
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size_t size, enum dma_data_direction direction);
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int (*map_sg)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction);
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void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction);
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int (*dma_supported)(struct device *dev, u64 mask);
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int (*set_dma_mask)(struct device *dev, u64 dma_mask);
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};
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static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
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{
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/* We don't handle the NULL dev case for ISA for now. We could
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* do it via an out of line call but it is not needed for now. The
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* only ISA DMA device we support is the floppy and we have a hack
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* in the floppy driver directly to get a device for us.
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*/
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if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL))
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return NULL;
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return dev->archdata.dma_ops;
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}
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static inline int dma_supported(struct device *dev, u64 mask)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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if (unlikely(dma_ops == NULL))
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return 0;
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if (dma_ops->dma_supported == NULL)
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return 1;
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return dma_ops->dma_supported(dev, mask);
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}
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static inline int dma_set_mask(struct device *dev, u64 dma_mask)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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if (unlikely(dma_ops == NULL))
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return -EIO;
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if (dma_ops->set_dma_mask != NULL)
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return dma_ops->set_dma_mask(dev, dma_mask);
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if (!dev->dma_mask || !dma_supported(dev, dma_mask))
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return -EIO;
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*dev->dma_mask = dma_mask;
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return 0;
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}
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static inline void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
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}
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static inline void dma_free_coherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t dma_handle)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
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}
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static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
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size_t size,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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return dma_ops->map_single(dev, cpu_addr, size, direction);
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}
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static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
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size_t size,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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dma_ops->unmap_single(dev, dma_addr, size, direction);
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}
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static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
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BUG_ON(!dma_ops);
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return dma_ops->map_single(dev, page_address(page) + offset, size,
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direction);
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}
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static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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size_t size,
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@ -276,14 +133,15 @@ static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
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}
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static inline int
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dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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dma_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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BUG_ON(direction == DMA_NONE);
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for (i = 0; i < nents; i++, sg++) {
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for_each_sg(sgl, sg, nents, i) {
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BUG_ON(!sg->page);
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__dma_sync_page(sg->page, sg->offset, sg->length, direction);
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sg->dma_address = page_to_bus(sg->page) + sg->offset;
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@ -318,26 +176,28 @@ static inline void dma_sync_single_for_device(struct device *dev,
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}
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static inline void dma_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sg, int nents,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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BUG_ON(direction == DMA_NONE);
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for (i = 0; i < nents; i++, sg++)
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for_each_sg(sgl, sg, nents, i)
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__dma_sync_page(sg->page, sg->offset, sg->length, direction);
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}
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static inline void dma_sync_sg_for_device(struct device *dev,
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struct scatterlist *sg, int nents,
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struct scatterlist *sgl, int nents,
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enum dma_data_direction direction)
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{
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struct scatterlist *sg;
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int i;
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BUG_ON(direction == DMA_NONE);
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for (i = 0; i < nents; i++, sg++)
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for_each_sg(sgl, sg, nents, i)
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__dma_sync_page(sg->page, sg->offset, sg->length, direction);
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}
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@ -41,5 +41,7 @@ struct scatterlist {
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#define ISA_DMA_THRESHOLD (~0UL)
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#endif
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#define ARCH_HAS_SG_CHAIN
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_SCATTERLIST_H */
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