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Merge branch kvm-arm64/psci/cpu_on into kvmarm-master/next
PSCI fixes from Oliver Upton: - Plug race on reset - Ensure that a pending reset is applied before userspace accesses - Reject PSCI requests with illegal affinity bits * kvm-arm64/psci/cpu_on: selftests: KVM: Introduce psci_cpu_on_test KVM: arm64: Enforce reserved bits for PSCI target affinities KVM: arm64: Handle PSCI resets before userspace touches vCPU state KVM: arm64: Fix read-side race on updates to vcpu reset state Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
commit
78bc117095
@ -1216,6 +1216,14 @@ long kvm_arch_vcpu_ioctl(struct file *filp,
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if (copy_from_user(®, argp, sizeof(reg)))
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break;
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/*
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* We could owe a reset due to PSCI. Handle the pending reset
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* here to ensure userspace register accesses are ordered after
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* the reset.
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*/
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if (kvm_check_request(KVM_REQ_VCPU_RESET, vcpu))
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kvm_reset_vcpu(vcpu);
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if (ioctl == KVM_SET_ONE_REG)
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r = kvm_arm_set_reg(vcpu, ®);
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else
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@ -59,6 +59,12 @@ static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
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kvm_vcpu_kick(vcpu);
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}
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static inline bool kvm_psci_valid_affinity(struct kvm_vcpu *vcpu,
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unsigned long affinity)
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{
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return !(affinity & ~MPIDR_HWID_BITMASK);
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}
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static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
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{
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struct vcpu_reset_state *reset_state;
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@ -66,9 +72,9 @@ static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
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struct kvm_vcpu *vcpu = NULL;
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unsigned long cpu_id;
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cpu_id = smccc_get_arg1(source_vcpu) & MPIDR_HWID_BITMASK;
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if (vcpu_mode_is_32bit(source_vcpu))
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cpu_id &= ~((u32) 0);
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cpu_id = smccc_get_arg1(source_vcpu);
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if (!kvm_psci_valid_affinity(source_vcpu, cpu_id))
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return PSCI_RET_INVALID_PARAMS;
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vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
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@ -126,6 +132,9 @@ static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
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target_affinity = smccc_get_arg1(vcpu);
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lowest_affinity_level = smccc_get_arg2(vcpu);
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if (!kvm_psci_valid_affinity(vcpu, target_affinity))
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return PSCI_RET_INVALID_PARAMS;
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/* Determine target affinity mask */
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target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
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if (!target_affinity_mask)
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@ -210,10 +210,16 @@ static bool vcpu_allowed_register_width(struct kvm_vcpu *vcpu)
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*/
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int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
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{
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struct vcpu_reset_state reset_state;
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int ret;
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bool loaded;
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u32 pstate;
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mutex_lock(&vcpu->kvm->lock);
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reset_state = vcpu->arch.reset_state;
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WRITE_ONCE(vcpu->arch.reset_state.reset, false);
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mutex_unlock(&vcpu->kvm->lock);
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/* Reset PMU outside of the non-preemptible section */
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kvm_pmu_vcpu_reset(vcpu);
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@ -276,8 +282,8 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
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* Additional reset state handling that PSCI may have imposed on us.
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* Must be done after all the sys_reg reset.
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*/
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if (vcpu->arch.reset_state.reset) {
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unsigned long target_pc = vcpu->arch.reset_state.pc;
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if (reset_state.reset) {
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unsigned long target_pc = reset_state.pc;
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/* Gracefully handle Thumb2 entry point */
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if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
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@ -286,13 +292,11 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu)
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}
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/* Propagate caller endianness */
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if (vcpu->arch.reset_state.be)
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if (reset_state.be)
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kvm_vcpu_set_be(vcpu);
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*vcpu_pc(vcpu) = target_pc;
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vcpu_set_reg(vcpu, 0, vcpu->arch.reset_state.r0);
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vcpu->arch.reset_state.reset = false;
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vcpu_set_reg(vcpu, 0, reset_state.r0);
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}
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/* Reset timer */
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1
tools/testing/selftests/kvm/.gitignore
vendored
1
tools/testing/selftests/kvm/.gitignore
vendored
@ -1,6 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0-only
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/aarch64/debug-exceptions
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/aarch64/get-reg-list
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/aarch64/psci_cpu_on_test
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/aarch64/vgic_init
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/s390x/memop
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/s390x/resets
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@ -86,6 +86,7 @@ TEST_GEN_PROGS_x86_64 += kvm_binary_stats_test
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TEST_GEN_PROGS_aarch64 += aarch64/debug-exceptions
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TEST_GEN_PROGS_aarch64 += aarch64/get-reg-list
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TEST_GEN_PROGS_aarch64 += aarch64/psci_cpu_on_test
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TEST_GEN_PROGS_aarch64 += aarch64/vgic_init
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TEST_GEN_PROGS_aarch64 += demand_paging_test
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TEST_GEN_PROGS_aarch64 += dirty_log_test
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121
tools/testing/selftests/kvm/aarch64/psci_cpu_on_test.c
Normal file
121
tools/testing/selftests/kvm/aarch64/psci_cpu_on_test.c
Normal file
@ -0,0 +1,121 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* psci_cpu_on_test - Test that the observable state of a vCPU targeted by the
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* CPU_ON PSCI call matches what the caller requested.
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*
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* Copyright (c) 2021 Google LLC.
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*
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* This is a regression test for a race between KVM servicing the PSCI call and
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* userspace reading the vCPUs registers.
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*/
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#define _GNU_SOURCE
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#include <linux/psci.h>
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#include "kvm_util.h"
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#include "processor.h"
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#include "test_util.h"
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#define VCPU_ID_SOURCE 0
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#define VCPU_ID_TARGET 1
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#define CPU_ON_ENTRY_ADDR 0xfeedf00dul
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#define CPU_ON_CONTEXT_ID 0xdeadc0deul
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static uint64_t psci_cpu_on(uint64_t target_cpu, uint64_t entry_addr,
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uint64_t context_id)
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{
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register uint64_t x0 asm("x0") = PSCI_0_2_FN64_CPU_ON;
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register uint64_t x1 asm("x1") = target_cpu;
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register uint64_t x2 asm("x2") = entry_addr;
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register uint64_t x3 asm("x3") = context_id;
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asm("hvc #0"
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: "=r"(x0)
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: "r"(x0), "r"(x1), "r"(x2), "r"(x3)
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: "memory");
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return x0;
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}
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static uint64_t psci_affinity_info(uint64_t target_affinity,
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uint64_t lowest_affinity_level)
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{
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register uint64_t x0 asm("x0") = PSCI_0_2_FN64_AFFINITY_INFO;
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register uint64_t x1 asm("x1") = target_affinity;
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register uint64_t x2 asm("x2") = lowest_affinity_level;
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asm("hvc #0"
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: "=r"(x0)
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: "r"(x0), "r"(x1), "r"(x2)
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: "memory");
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return x0;
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}
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static void guest_main(uint64_t target_cpu)
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{
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GUEST_ASSERT(!psci_cpu_on(target_cpu, CPU_ON_ENTRY_ADDR, CPU_ON_CONTEXT_ID));
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uint64_t target_state;
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do {
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target_state = psci_affinity_info(target_cpu, 0);
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GUEST_ASSERT((target_state == PSCI_0_2_AFFINITY_LEVEL_ON) ||
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(target_state == PSCI_0_2_AFFINITY_LEVEL_OFF));
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} while (target_state != PSCI_0_2_AFFINITY_LEVEL_ON);
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GUEST_DONE();
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}
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int main(void)
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{
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uint64_t target_mpidr, obs_pc, obs_x0;
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struct kvm_vcpu_init init;
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struct kvm_vm *vm;
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struct ucall uc;
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vm = vm_create(VM_MODE_DEFAULT, DEFAULT_GUEST_PHY_PAGES, O_RDWR);
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kvm_vm_elf_load(vm, program_invocation_name);
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ucall_init(vm, NULL);
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vm_ioctl(vm, KVM_ARM_PREFERRED_TARGET, &init);
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init.features[0] |= (1 << KVM_ARM_VCPU_PSCI_0_2);
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aarch64_vcpu_add_default(vm, VCPU_ID_SOURCE, &init, guest_main);
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/*
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* make sure the target is already off when executing the test.
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*/
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init.features[0] |= (1 << KVM_ARM_VCPU_POWER_OFF);
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aarch64_vcpu_add_default(vm, VCPU_ID_TARGET, &init, guest_main);
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get_reg(vm, VCPU_ID_TARGET, ARM64_SYS_REG(MPIDR_EL1), &target_mpidr);
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vcpu_args_set(vm, VCPU_ID_SOURCE, 1, target_mpidr & MPIDR_HWID_BITMASK);
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vcpu_run(vm, VCPU_ID_SOURCE);
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switch (get_ucall(vm, VCPU_ID_SOURCE, &uc)) {
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case UCALL_DONE:
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break;
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case UCALL_ABORT:
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TEST_FAIL("%s at %s:%ld", (const char *)uc.args[0], __FILE__,
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uc.args[1]);
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break;
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default:
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TEST_FAIL("Unhandled ucall: %lu", uc.cmd);
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}
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get_reg(vm, VCPU_ID_TARGET, ARM64_CORE_REG(regs.pc), &obs_pc);
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get_reg(vm, VCPU_ID_TARGET, ARM64_CORE_REG(regs.regs[0]), &obs_x0);
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TEST_ASSERT(obs_pc == CPU_ON_ENTRY_ADDR,
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"unexpected target cpu pc: %lx (expected: %lx)",
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obs_pc, CPU_ON_ENTRY_ADDR);
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TEST_ASSERT(obs_x0 == CPU_ON_CONTEXT_ID,
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"unexpected target context id: %lx (expected: %lx)",
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obs_x0, CPU_ON_CONTEXT_ID);
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kvm_vm_free(vm);
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return 0;
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}
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@ -17,6 +17,7 @@
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#define CPACR_EL1 3, 0, 1, 0, 2
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#define TCR_EL1 3, 0, 2, 0, 2
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#define MAIR_EL1 3, 0, 10, 2, 0
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#define MPIDR_EL1 3, 0, 0, 0, 5
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#define TTBR0_EL1 3, 0, 2, 0, 0
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#define SCTLR_EL1 3, 0, 1, 0, 0
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#define VBAR_EL1 3, 0, 12, 0, 0
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@ -40,6 +41,8 @@
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(0xfful << (4 * 8)) | \
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(0xbbul << (5 * 8)))
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#define MPIDR_HWID_BITMASK (0xff00fffffful)
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static inline void get_reg(struct kvm_vm *vm, uint32_t vcpuid, uint64_t id, uint64_t *addr)
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{
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struct kvm_one_reg reg;
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