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net: filter: document internal instruction encoding
This patch adds a description of eBPFs instruction encoding in order to bring the documentation in line with the implementation. Signed-off-by: Alexei Starovoitov <ast@plumgrid.com> Signed-off-by: Daniel Borkmann <dborkman@redhat.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Alexei Starovoitov
David S. Miller
parent
e4ad403269
commit
783e327b69
@ -834,6 +834,167 @@ loops and other CFG validation; second step starts from the first insn and
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descends all possible paths. It simulates execution of every insn and observes
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the state change of registers and stack.
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eBPF opcode encoding
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--------------------
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eBPF is reusing most of the opcode encoding from classic to simplify conversion
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of classic BPF to eBPF. For arithmetic and jump instructions the 8-bit 'code'
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field is divided into three parts:
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+----------------+--------+--------------------+
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| 4 bits | 1 bit | 3 bits |
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| operation code | source | instruction class |
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+----------------+--------+--------------------+
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(MSB) (LSB)
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Three LSB bits store instruction class which is one of:
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Classic BPF classes: eBPF classes:
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BPF_LD 0x00 BPF_LD 0x00
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BPF_LDX 0x01 BPF_LDX 0x01
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BPF_ST 0x02 BPF_ST 0x02
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BPF_STX 0x03 BPF_STX 0x03
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BPF_ALU 0x04 BPF_ALU 0x04
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BPF_JMP 0x05 BPF_JMP 0x05
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BPF_RET 0x06 [ class 6 unused, for future if needed ]
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BPF_MISC 0x07 BPF_ALU64 0x07
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When BPF_CLASS(code) == BPF_ALU or BPF_JMP, 4th bit encodes source operand ...
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BPF_K 0x00
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BPF_X 0x08
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* in classic BPF, this means:
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BPF_SRC(code) == BPF_X - use register X as source operand
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BPF_SRC(code) == BPF_K - use 32-bit immediate as source operand
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* in eBPF, this means:
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BPF_SRC(code) == BPF_X - use 'src_reg' register as source operand
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BPF_SRC(code) == BPF_K - use 32-bit immediate as source operand
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... and four MSB bits store operation code.
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If BPF_CLASS(code) == BPF_ALU or BPF_ALU64 [ in eBPF ], BPF_OP(code) is one of:
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BPF_ADD 0x00
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BPF_SUB 0x10
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BPF_MUL 0x20
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BPF_DIV 0x30
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BPF_OR 0x40
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BPF_AND 0x50
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BPF_LSH 0x60
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BPF_RSH 0x70
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BPF_NEG 0x80
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BPF_MOD 0x90
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BPF_XOR 0xa0
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BPF_MOV 0xb0 /* eBPF only: mov reg to reg */
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BPF_ARSH 0xc0 /* eBPF only: sign extending shift right */
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BPF_END 0xd0 /* eBPF only: endianness conversion */
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If BPF_CLASS(code) == BPF_JMP, BPF_OP(code) is one of:
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BPF_JA 0x00
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BPF_JEQ 0x10
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BPF_JGT 0x20
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BPF_JGE 0x30
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BPF_JSET 0x40
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BPF_JNE 0x50 /* eBPF only: jump != */
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BPF_JSGT 0x60 /* eBPF only: signed '>' */
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BPF_JSGE 0x70 /* eBPF only: signed '>=' */
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BPF_CALL 0x80 /* eBPF only: function call */
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BPF_EXIT 0x90 /* eBPF only: function return */
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So BPF_ADD | BPF_X | BPF_ALU means 32-bit addition in both classic BPF
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and eBPF. There are only two registers in classic BPF, so it means A += X.
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In eBPF it means dst_reg = (u32) dst_reg + (u32) src_reg; similarly,
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BPF_XOR | BPF_K | BPF_ALU means A ^= imm32 in classic BPF and analogous
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src_reg = (u32) src_reg ^ (u32) imm32 in eBPF.
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Classic BPF is using BPF_MISC class to represent A = X and X = A moves.
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eBPF is using BPF_MOV | BPF_X | BPF_ALU code instead. Since there are no
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BPF_MISC operations in eBPF, the class 7 is used as BPF_ALU64 to mean
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exactly the same operations as BPF_ALU, but with 64-bit wide operands
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instead. So BPF_ADD | BPF_X | BPF_ALU64 means 64-bit addition, i.e.:
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dst_reg = dst_reg + src_reg
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Classic BPF wastes the whole BPF_RET class to represent a single 'ret'
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operation. Classic BPF_RET | BPF_K means copy imm32 into return register
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and perform function exit. eBPF is modeled to match CPU, so BPF_JMP | BPF_EXIT
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in eBPF means function exit only. The eBPF program needs to store return
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value into register R0 before doing a BPF_EXIT. Class 6 in eBPF is currently
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unused and reserved for future use.
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For load and store instructions the 8-bit 'code' field is divided as:
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+--------+--------+-------------------+
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| 3 bits | 2 bits | 3 bits |
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| mode | size | instruction class |
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+--------+--------+-------------------+
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(MSB) (LSB)
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Size modifier is one of ...
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BPF_W 0x00 /* word */
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BPF_H 0x08 /* half word */
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BPF_B 0x10 /* byte */
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BPF_DW 0x18 /* eBPF only, double word */
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... which encodes size of load/store operation:
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B - 1 byte
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H - 2 byte
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W - 4 byte
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DW - 8 byte (eBPF only)
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Mode modifier is one of:
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BPF_IMM 0x00 /* classic BPF only, reserved in eBPF */
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BPF_ABS 0x20
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BPF_IND 0x40
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BPF_MEM 0x60
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BPF_LEN 0x80 /* classic BPF only, reserved in eBPF */
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BPF_MSH 0xa0 /* classic BPF only, reserved in eBPF */
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BPF_XADD 0xc0 /* eBPF only, exclusive add */
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eBPF has two non-generic instructions: (BPF_ABS | <size> | BPF_LD) and
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(BPF_IND | <size> | BPF_LD) which are used to access packet data.
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They had to be carried over from classic to have strong performance of
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socket filters running in eBPF interpreter. These instructions can only
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be used when interpreter context is a pointer to 'struct sk_buff' and
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have seven implicit operands. Register R6 is an implicit input that must
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contain pointer to sk_buff. Register R0 is an implicit output which contains
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the data fetched from the packet. Registers R1-R5 are scratch registers
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and must not be used to store the data across BPF_ABS | BPF_LD or
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BPF_IND | BPF_LD instructions.
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These instructions have implicit program exit condition as well. When
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eBPF program is trying to access the data beyond the packet boundary,
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the interpreter will abort the execution of the program. JIT compilers
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therefore must preserve this property. src_reg and imm32 fields are
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explicit inputs to these instructions.
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For example:
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BPF_IND | BPF_W | BPF_LD means:
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R0 = ntohl(*(u32 *) (((struct sk_buff *) R6)->data + src_reg + imm32))
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and R1 - R5 were scratched.
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Unlike classic BPF instruction set, eBPF has generic load/store operations:
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BPF_MEM | <size> | BPF_STX: *(size *) (dst_reg + off) = src_reg
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BPF_MEM | <size> | BPF_ST: *(size *) (dst_reg + off) = imm32
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BPF_MEM | <size> | BPF_LDX: dst_reg = *(size *) (src_reg + off)
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BPF_XADD | BPF_W | BPF_STX: lock xadd *(u32 *)(dst_reg + off16) += src_reg
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BPF_XADD | BPF_DW | BPF_STX: lock xadd *(u64 *)(dst_reg + off16) += src_reg
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Where size is one of: BPF_B or BPF_H or BPF_W or BPF_DW. Note that 1 and
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2 byte atomic increments are not supported.
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Testing
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-------
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