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powerpc: Move mpc83xx_add_bridge to fsl_pci.c
This allows other platforms with the same pci block like MPC5121 to use it. Signed-off-by: John Rigby <jrigby@freescale.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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b500563b22
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76fe1ffce9
@ -3,7 +3,7 @@ menuconfig PPC_83xx
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depends on 6xx && PPC_MULTIPLATFORM
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select PPC_UDBG_16550
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select PPC_PCI_CHOICE
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select PPC_INDIRECT_PCI
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select FSL_PCI if PCI
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select FSL_SOC
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select IPIC
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@ -2,7 +2,6 @@
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# Makefile for the PowerPC 83xx linux kernel.
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#
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obj-y := misc.o usb.o
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obj-$(CONFIG_PCI) += pci.o
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obj-$(CONFIG_SUSPEND) += suspend.o suspend-asm.o
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obj-$(CONFIG_MPC831x_RDB) += mpc831x_rdb.o
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obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
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@ -19,6 +19,7 @@
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#include <asm/time.h>
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#include <asm/ipic.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc83xx.h"
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@ -36,6 +36,7 @@
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include <asm/qe.h>
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#include <asm/qe_ic.h>
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@ -27,6 +27,7 @@
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#include <asm/qe.h>
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#include <asm/qe_ic.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc83xx.h"
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@ -35,6 +35,7 @@
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc83xx.h"
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@ -35,6 +35,7 @@
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc83xx.h"
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@ -42,6 +42,7 @@
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include <asm/qe.h>
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#include <asm/qe_ic.h>
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@ -23,6 +23,7 @@
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#include <asm/qe.h>
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#include <asm/qe_ic.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc83xx.h"
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@ -19,6 +19,7 @@
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#include <asm/ipic.h>
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#include <asm/udbg.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc83xx.h"
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@ -17,6 +17,7 @@
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#include <asm/time.h>
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#include <asm/ipic.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc83xx.h"
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@ -55,7 +55,6 @@
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* mpc83xx_* files. Mostly for use by mpc83xx_setup
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*/
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extern int mpc83xx_add_bridge(struct device_node *dev);
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extern void mpc83xx_restart(char *cmd);
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extern long mpc83xx_time_init(void);
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extern int mpc834x_usb_cfg(void);
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@ -1,91 +0,0 @@
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/*
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* FSL SoC setup code
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/stddef.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/delay.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <asm/system.h>
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#include <asm/atomic.h>
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#include <asm/io.h>
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#include <asm/pci-bridge.h>
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#include <asm/prom.h>
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#include <sysdev/fsl_soc.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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int __init mpc83xx_add_bridge(struct device_node *dev)
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{
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int len;
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struct pci_controller *hose;
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struct resource rsrc;
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const int *bus_range;
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int primary = 1, has_address = 0;
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phys_addr_t immr = get_immrbase();
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DBG("Adding PCI host bridge %s\n", dev->full_name);
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/* Fetch host bridge registers address */
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has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
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/* Get bus range if any */
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bus_range = of_get_property(dev, "bus-range", &len);
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if (bus_range == NULL || len < 2 * sizeof(int)) {
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printk(KERN_WARNING "Can't get bus-range for %s, assume"
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" bus 0\n", dev->full_name);
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}
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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hose = pcibios_alloc_controller(dev);
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if (!hose)
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return -ENOMEM;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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/* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
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* the other at 0x8600, we consider the 0x8500 the primary controller
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*/
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/* PCI 1 */
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if ((rsrc.start & 0xfffff) == 0x8500) {
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setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0);
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}
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/* PCI 2 */
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if ((rsrc.start & 0xfffff) == 0x8600) {
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setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0);
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primary = 0;
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}
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printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
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"Firmware bus number: %d->%d\n",
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(unsigned long long)rsrc.start, hose->first_busno,
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hose->last_busno);
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DBG(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
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hose, hose->cfg_addr, hose->cfg_data);
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/* Interpret the "ranges" property */
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/* This also maps the I/O region and sets isa_io/mem_base */
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pci_process_bridge_OF_ranges(hose, dev, primary);
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return 0;
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}
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@ -37,6 +37,7 @@
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include "mpc83xx.h"
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@ -27,6 +27,7 @@
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
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/* atmu setup for fsl pci/pcie controller */
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void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc)
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{
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@ -248,3 +249,63 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header);
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DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
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DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
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DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
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#endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */
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#if defined(CONFIG_PPC_83xx)
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int __init mpc83xx_add_bridge(struct device_node *dev)
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{
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int len;
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struct pci_controller *hose;
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struct resource rsrc;
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const int *bus_range;
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int primary = 1, has_address = 0;
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phys_addr_t immr = get_immrbase();
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pr_debug("Adding PCI host bridge %s\n", dev->full_name);
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/* Fetch host bridge registers address */
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has_address = (of_address_to_resource(dev, 0, &rsrc) == 0);
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/* Get bus range if any */
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bus_range = of_get_property(dev, "bus-range", &len);
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if (bus_range == NULL || len < 2 * sizeof(int)) {
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printk(KERN_WARNING "Can't get bus-range for %s, assume"
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" bus 0\n", dev->full_name);
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}
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ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
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hose = pcibios_alloc_controller(dev);
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if (!hose)
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return -ENOMEM;
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hose->first_busno = bus_range ? bus_range[0] : 0;
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hose->last_busno = bus_range ? bus_range[1] : 0xff;
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/* MPC83xx supports up to two host controllers one at 0x8500 from immrbar
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* the other at 0x8600, we consider the 0x8500 the primary controller
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*/
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/* PCI 1 */
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if ((rsrc.start & 0xfffff) == 0x8500) {
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setup_indirect_pci(hose, immr + 0x8300, immr + 0x8304, 0);
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}
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/* PCI 2 */
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if ((rsrc.start & 0xfffff) == 0x8600) {
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setup_indirect_pci(hose, immr + 0x8380, immr + 0x8384, 0);
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primary = 0;
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}
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printk(KERN_INFO "Found MPC83xx PCI host bridge at 0x%016llx. "
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"Firmware bus number: %d->%d\n",
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(unsigned long long)rsrc.start, hose->first_busno,
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hose->last_busno);
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pr_debug(" ->Hose at 0x%p, cfg_addr=0x%p,cfg_data=0x%p\n",
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hose, hose->cfg_addr, hose->cfg_data);
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/* Interpret the "ranges" property */
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/* This also maps the I/O region and sets isa_io/mem_base */
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pci_process_bridge_OF_ranges(hose, dev, primary);
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return 0;
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}
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#endif /* CONFIG_PPC_83xx */
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@ -83,6 +83,7 @@ struct ccsr_pci {
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extern int fsl_add_bridge(struct device_node *dev, int is_primary);
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extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
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extern int mpc83xx_add_bridge(struct device_node *dev);
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#endif /* __POWERPC_FSL_PCI_H */
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#endif /* __KERNEL__ */
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