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spi: rspi: Abstract 8/16-bit Data Register access
Add rspi_{write,read}_data(), to abstract 8-bit (QSPI, and RSPI on RZ/A1H) versus 16-bit (RSPI) Data Register access. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
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79d2349542
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@ -192,6 +192,7 @@ struct rspi_data {
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unsigned dma_width_16bit:1;
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unsigned dma_callbacked:1;
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unsigned byte_access:1;
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};
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static void rspi_write8(const struct rspi_data *rspi, u8 data, u16 offset)
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@ -219,10 +220,25 @@ static u16 rspi_read16(const struct rspi_data *rspi, u16 offset)
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return ioread16(rspi->addr + offset);
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}
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static void rspi_write_data(const struct rspi_data *rspi, u16 data)
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{
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if (rspi->byte_access)
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rspi_write8(rspi, data, RSPI_SPDR);
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else /* 16 bit */
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rspi_write16(rspi, data, RSPI_SPDR);
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}
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static u16 rspi_read_data(const struct rspi_data *rspi)
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{
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if (rspi->byte_access)
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return rspi_read8(rspi, RSPI_SPDR);
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else /* 16 bit */
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return rspi_read16(rspi, RSPI_SPDR);
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}
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/* optional functions */
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struct spi_ops {
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int (*set_config_register)(const struct rspi_data *rspi,
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int access_size);
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int (*set_config_register)(struct rspi_data *rspi, int access_size);
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int (*send_pio)(struct rspi_data *rspi, struct spi_transfer *t);
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int (*receive_pio)(struct rspi_data *rspi, struct spi_transfer *t);
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};
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@ -230,8 +246,7 @@ struct spi_ops {
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/*
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* functions for RSPI
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*/
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static int rspi_set_config_register(const struct rspi_data *rspi,
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int access_size)
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static int rspi_set_config_register(struct rspi_data *rspi, int access_size)
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{
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int spbr;
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@ -242,8 +257,9 @@ static int rspi_set_config_register(const struct rspi_data *rspi,
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spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz) - 1;
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rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
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/* Sets number of frames to be used: 1 frame */
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rspi_write8(rspi, 0x00, RSPI_SPDCR);
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/* Disable dummy transmission, set 16-bit word access, 1 frame */
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rspi_write8(rspi, 0, RSPI_SPDCR);
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rspi->byte_access = 0;
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/* Sets RSPCK, SSL, next-access delay value */
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rspi_write8(rspi, 0x00, RSPI_SPCKD);
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@ -266,8 +282,7 @@ static int rspi_set_config_register(const struct rspi_data *rspi,
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/*
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* functions for QSPI
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*/
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static int qspi_set_config_register(const struct rspi_data *rspi,
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int access_size)
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static int qspi_set_config_register(struct rspi_data *rspi, int access_size)
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{
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u16 spcmd;
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int spbr;
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@ -279,8 +294,9 @@ static int qspi_set_config_register(const struct rspi_data *rspi,
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spbr = clk_get_rate(rspi->clk) / (2 * rspi->max_speed_hz);
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rspi_write8(rspi, clamp(spbr, 0, 255), RSPI_SPBR);
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/* Sets number of frames to be used: 1 frame */
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rspi_write8(rspi, 0x00, RSPI_SPDCR);
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/* Disable dummy transmission, set byte access */
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rspi_write8(rspi, 0, RSPI_SPDCR);
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rspi->byte_access = 1;
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/* Sets RSPCK, SSL, next-access delay value */
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rspi_write8(rspi, 0x00, RSPI_SPCKD);
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@ -354,7 +370,7 @@ static int rspi_send_pio(struct rspi_data *rspi, struct spi_transfer *t)
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return -ETIMEDOUT;
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}
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rspi_write16(rspi, *data, RSPI_SPDR);
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rspi_write_data(rspi, *data);
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data++;
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remain--;
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}
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@ -380,14 +396,14 @@ static int qspi_send_pio(struct rspi_data *rspi, struct spi_transfer *t)
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"%s: tx empty timeout\n", __func__);
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return -ETIMEDOUT;
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}
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rspi_write8(rspi, *data++, RSPI_SPDR);
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rspi_write_data(rspi, *data++);
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if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) {
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dev_err(&rspi->master->dev,
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"%s: receive timeout\n", __func__);
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return -ETIMEDOUT;
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}
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rspi_read8(rspi, RSPI_SPDR);
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rspi_read_data(rspi);
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remain--;
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}
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@ -525,7 +541,7 @@ static void rspi_receive_init(const struct rspi_data *rspi)
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spsr = rspi_read8(rspi, RSPI_SPSR);
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if (spsr & SPSR_SPRF)
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rspi_read16(rspi, RSPI_SPDR); /* dummy read */
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rspi_read_data(rspi); /* dummy read */
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if (spsr & SPSR_OVRF)
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rspi_write8(rspi, rspi_read8(rspi, RSPI_SPSR) & ~SPSR_OVRF,
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RSPI_SPSR);
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@ -549,15 +565,14 @@ static int rspi_receive_pio(struct rspi_data *rspi, struct spi_transfer *t)
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return -ETIMEDOUT;
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}
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/* dummy write for generate clock */
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rspi_write16(rspi, DUMMY_DATA, RSPI_SPDR);
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rspi_write_data(rspi, DUMMY_DATA);
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if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) {
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dev_err(&rspi->master->dev,
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"%s: receive timeout\n", __func__);
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return -ETIMEDOUT;
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}
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/* SPDR allows 16 or 32-bit access only */
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*data = (u8)rspi_read16(rspi, RSPI_SPDR);
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*data = rspi_read_data(rspi);
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data++;
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remain--;
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@ -572,7 +587,7 @@ static void qspi_receive_init(const struct rspi_data *rspi)
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spsr = rspi_read8(rspi, RSPI_SPSR);
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if (spsr & SPSR_SPRF)
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rspi_read8(rspi, RSPI_SPDR); /* dummy read */
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rspi_read_data(rspi); /* dummy read */
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rspi_write8(rspi, SPBFCR_TXRST | SPBFCR_RXRST, QSPI_SPBFCR);
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rspi_write8(rspi, 0x00, QSPI_SPBFCR);
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}
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@ -593,15 +608,14 @@ static int qspi_receive_pio(struct rspi_data *rspi, struct spi_transfer *t)
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return -ETIMEDOUT;
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}
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/* dummy write for generate clock */
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rspi_write8(rspi, DUMMY_DATA, RSPI_SPDR);
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rspi_write_data(rspi, DUMMY_DATA);
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if (rspi_wait_for_interrupt(rspi, SPSR_SPRF, SPCR_SPRIE) < 0) {
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dev_err(&rspi->master->dev,
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"%s: receive timeout\n", __func__);
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return -ETIMEDOUT;
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}
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/* SPDR allows 8, 16 or 32-bit access */
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*data++ = rspi_read8(rspi, RSPI_SPDR);
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*data++ = rspi_read_data(rspi);
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remain--;
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}
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