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ASPEED device tree updates for 5.5

Browse Source 
- Lots of work on the AST2600 boards as bringup continues. There's the
  eval board, and two IBM boards called Tacoma and Rainier
 
  - A new flash layout for OpenBMC systems with larger flashes
 
  - Better support for the MAC clocking when talking to a NCSI device,
  making Linux less reliant on u-boot having done the correct thing
 
  - LED fixes for vesin and fp5280g2
 
  - SGPIO support
 
  - Facebook network BMC cleanup with the common hardware moved to a
  shared dtsi
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Merge tag 'aspeed-5.5-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt

ASPEED device tree updates for 5.5

 - Lots of work on the AST2600 boards as bringup continues. There's the
 eval board, and two IBM boards called Tacoma and Rainier

 - A new flash layout for OpenBMC systems with larger flashes

 - Better support for the MAC clocking when talking to a NCSI device,
 making Linux less reliant on u-boot having done the correct thing

 - LED fixes for vesin and fp5280g2

 - SGPIO support

 - Facebook network BMC cleanup with the common hardware moved to a
 shared dtsi

* tag 'aspeed-5.5-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (48 commits)
  ARM: dts: aspeed-g6: Add timer description
  ARM: dts: aspeed: ast2600evb: Enable i2c buses
  ARM: dts: aspeed-g5: Add SGPIO description
  ARM: dts: aspeed: yamp: Use common dtsi
  ARM: dts: aspeed: minipack: Use common dtsi
  ARM: dts: aspeed: cmm: Use common dtsi
  ARM: dts: aspeed: Common dtsi for Facebook AST2500 Network BMCs
  ARM: dts: aspeed: rainier: gpio-keys for PSU presence
  ARM: dts: aspeed: rainier: Fix i2c eeprom size
  ARM: dts: tacoma: Hog LPC pinmux
  ARM: dts: aspeed: rainier: Enable VUART1
  ARM: dts: aspeed: rainier: Add i2c eeproms
  ARM: dts: aspeed: tacoma: Use 64MB for firmware memory
  ARM: dts: aspeed: tacoma: Add host FSI description
  ARM: dts: ast2600evb: Enable UART workaround
  ARM: dts: aspeed: tacoma: Add UART1 and workaround
  ARM: dts: aspeed-g6: Add remaining UARTs
  ARM: dts: aspeed-g6: Fix i2c clock source
  ARM: dts: aspeed: Add RCLK to MAC clocks for RMII interfaces
  ARM: dts: aspeed: tacoma: Enable FMC and SPI devices
  ...

Link: https://lore.kernel.org/r/CACPK8Xe8XiJ+oEp3_AXO5Mox-mXWVrOJKQLJMKJxg1WdYCTzMw@mail.gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2019-11-08 10:32:19 -08:00
commit 743f4e5bc0
32 changed files with 3197 additions and 177 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/Makefile
View File

@ -1298,6 +1298,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-facebook-wedge40.dtb \
aspeed-bmc-facebook-wedge100.dtb \
aspeed-bmc-facebook-yamp.dtb \
aspeed-bmc-ibm-rainier.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-lenovo-hr630.dtb \
@ -1308,6 +1309,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \
aspeed-bmc-opp-swift.dtb \
aspeed-bmc-opp-tacoma.dtb \
aspeed-bmc-opp-vesnin.dtb \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \

2
arch/arm/boot/dts/aspeed-ast2500-evb.dts
View File

@ -40,6 +40,7 @@
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
@ -50,6 +51,7 @@
status = "okay";
m25p,fast-read;
label = "pnor";
spi-max-frequency = <100000000>;
};
};

137
arch/arm/boot/dts/aspeed-ast2600-evb.dts
View File

@ -55,6 +55,9 @@
phy-mode = "rgmii";
phy-handle = <&ethphy1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default>;
};
&mac2 {
@ -62,6 +65,9 @@
phy-mode = "rgmii";
phy-handle = <&ethphy2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii3_default>;
};
&mac3 {
@ -69,12 +75,141 @@
phy-mode = "rgmii";
phy-handle = <&ethphy3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii4_default>;
};
&emmc_controller {
status = "okay";
};
&emmc {
status = "okay";
non-removable;
bus-width = <4>;
max-frequency = <52000000>;
};
&rtc {
status = "okay";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
u-boot@0 {
reg = <0x0 0xe0000>; // 896KB
label = "u-boot";
};
u-boot-env@e0000 {
reg = <0xe0000 0x20000>; // 128KB
label = "u-boot-env";
};
kernel@100000 {
reg = <0x100000 0x900000>; // 9MB
label = "kernel";
};
rofs@a00000 {
reg = <0xa00000 0x2000000>; // 32MB
label = "rofs";
};
rwfs@6000000 {
reg = <0x2a00000 0x1600000>; // 22MB
label = "rwfs";
};
};
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
spi-max-frequency = <100000000>;
};
};
&uart5 {
// Workaround for A0
compatible = "snps,dw-apb-uart";
};
&i2c0 {
status = "okay";
temp@2e {
compatible = "adi,adt7490";
reg = <0x2e>;
};
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&i2c14 {
status = "okay";
};
&i2c15 {
status = "okay";
};

3
arch/arm/boot/dts/aspeed-bmc-arm-stardragon4800-rep2.dts
View File

@ -92,6 +92,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii2_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
<&syscon ASPEED_CLK_MAC2RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

66
arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts
View File

@ -2,7 +2,7 @@
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g5.dtsi"
#include "ast2500-facebook-netbmc-common.dtsi"
/ {
model = "Facebook Backpack CMM BMC";
@ -53,10 +53,6 @@
bootargs = "console=ttyS1,9600n8 root=/dev/ram rw earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
ast-adc-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
@ -64,39 +60,7 @@
};
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
/*
* Update reset type to "system" (full chip) to fix warm reboot hang issue
* when reset type is set to default ("soc", gated by reset mask registers).
*/
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
/*
* wdt2 is not used by Backpack CMM.
*/
&wdt2 {
status = "disabled";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_ncts1_default
@ -107,8 +71,6 @@
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default
&pinctrl_ncts3_default
@ -123,17 +85,6 @@
&pinctrl_rxd4_default>;
};
&uart5 {
status = "okay";
};
&mac1 {
status = "okay";
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
/*
* I2C bus reserved for communication with COM-E.
*/
@ -380,3 +331,18 @@
&ehci1 {
status = "okay";
};
&vhub {
status = "disabled";
};
&sdhci0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd1_default>;
};
&sdhci1 {
status = "disabled";
};

61
arch/arm/boot/dts/aspeed-bmc-facebook-minipack.dts
View File

@ -2,7 +2,7 @@
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g5.dtsi"
#include "ast2500-facebook-netbmc-common.dtsi"
/ {
model = "Facebook Minipack 100 BMC";
@ -76,15 +76,6 @@
stdout-path = &uart1;
bootargs = "debug console=ttyS1,9600n8 root=/dev/ram rw";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
};
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
&wdt2 {
@ -92,19 +83,29 @@
aspeed,reset-type = "system";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "facebook-bmc-flash-layout.dtsi"
/*
* Both firmware flashes are 64MB on Minipack BMC.
*/
&fmc_flash0 {
partitions {
data0@1c00000 {
reg = <0x1c00000 0x2400000>;
};
flash0@0 {
reg = <0x0 0x4000000>;
};
};
};
&fmc_flash1 {
partitions {
flash1@0 {
reg = <0x0 0x4000000>;
};
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_ncts1_default
@ -120,13 +121,6 @@
&pinctrl_rxd2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
@ -134,17 +128,6 @@
&pinctrl_rxd4_default>;
};
&uart5 {
status = "okay";
};
&mac1 {
status = "okay";
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
status = "okay";
bus-frequency = <400000>;
@ -423,7 +406,3 @@
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};

3
arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
View File

@ -126,6 +126,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

65
arch/arm/boot/dts/aspeed-bmc-facebook-yamp.dts
View File

@ -2,7 +2,7 @@
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g5.dtsi"
#include "ast2500-facebook-netbmc-common.dtsi"
/ {
model = "Facebook YAMP 100 BMC";
@ -23,47 +23,6 @@
stdout-path = &uart5;
bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
/*
* Update reset type to "system" (full chip) to fix warm reboot hang issue
* when reset type is set to default ("soc", gated by reset mask registers).
*/
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
/*
* wdt2 is not used by Yamp.
*/
&wdt2 {
status = "disabled";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
@ -73,23 +32,19 @@
&pinctrl_rxd2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
use-ncsi;
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
};
&mac1 {
status = "disabled";
};
&i2c0 {
@ -154,7 +109,3 @@
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};

972
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts Normal file
View File

@ -0,0 +1,972 @@
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright 2019 IBM Corp.
/dts-v1/;
#include "aspeed-g6.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Rainier";
compatible = "ibm,rainier-bmc", "aspeed,ast2600";
aliases {
serial4 = &uart5;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@B8000000 {
no-map;
reg = <0xB8000000 0x04000000>; /* 64M */
};
};
gpio-keys {
compatible = "gpio-keys";
ps0-presence {
label = "ps0-presence";
gpios = <&gpio0 ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(S, 0)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio0 ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(S, 1)>;
};
ps2-presence {
label = "ps2-presence";
gpios = <&gpio0 ASPEED_GPIO(S, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(S, 2)>;
};
ps3-presence {
label = "ps3-presence";
gpios = <&gpio0 ASPEED_GPIO(S, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(S, 3)>;
};
};
};
&emmc_controller {
status = "okay";
};
&emmc {
status = "okay";
};
&ibt {
status = "okay";
};
&i2c0 {
status = "okay";
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
power-supply@68 {
compatible = "ibm,cffps2";
reg = <0x68>;
};
power-supply@69 {
compatible = "ibm,cffps2";
reg = <0x69>;
};
power-supply@6a {
compatible = "ibm,cffps2";
reg = <0x6a>;
};
power-supply@6b {
compatible = "ibm,cffps2";
reg = <0x6b>;
};
};
&i2c4 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@49 {
compatible = "ti,tmp275";
reg = <0x49>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
eeprom@52 {
compatible = "atmel,24c64";
reg = <0x52>;
};
};
&i2c5 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@49 {
compatible = "ti,tmp275";
reg = <0x49>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
};
&i2c6 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
tmp275@4b {
compatible = "ti,tmp275";
reg = <0x4b>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
eeprom@52 {
compatible = "atmel,24c64";
reg = <0x52>;
};
eeprom@53 {
compatible = "atmel,24c64";
reg = <0x53>;
};
};
&i2c7 {
status = "okay";
si7021-a20@20 {
compatible = "silabs,si7020";
reg = <0x20>;
};
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
max31785@52 {
compatible = "maxim,max31785a";
reg = <0x52>;
#address-cells = <1>;
#size-cells = <0>;
fan@0 {
compatible = "pmbus-fan";
reg = <0>;
tach-pulses = <2>;
};
fan@1 {
compatible = "pmbus-fan";
reg = <1>;
tach-pulses = <2>;
};
fan@2 {
compatible = "pmbus-fan";
reg = <2>;
tach-pulses = <2>;
};
fan@3 {
compatible = "pmbus-fan";
reg = <3>;
tach-pulses = <2>;
};
};
pca0: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
};
gpio@1 {
reg = <1>;
};
gpio@2 {
reg = <2>;
};
gpio@3 {
reg = <3>;
};
gpio@4 {
reg = <4>;
};
gpio@5 {
reg = <5>;
};
gpio@6 {
reg = <6>;
};
gpio@7 {
reg = <7>;
};
gpio@8 {
reg = <8>;
};
gpio@9 {
reg = <9>;
};
gpio@10 {
reg = <10>;
};
gpio@11 {
reg = <11>;
};
gpio@12 {
reg = <12>;
};
gpio@13 {
reg = <13>;
};
gpio@14 {
reg = <14>;
};
gpio@15 {
reg = <15>;
};
};
dps: dps310@76 {
compatible = "infineon,dps310";
reg = <0x76>;
#io-channel-cells = <0>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
};
&i2c8 {
status = "okay";
ucd90320@b {
compatible = "ti,ucd90160";
reg = <0x0b>;
};
ucd90320@c {
compatible = "ti,ucd90160";
reg = <0x0c>;
};
ucd90320@11 {
compatible = "ti,ucd90160";
reg = <0x11>;
};
rtc@32 {
compatible = "epson,rx8900";
reg = <0x32>;
};
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
};
&i2c9 {
status = "okay";
ir35221@42 {
compatible = "infineon,ir35221";
reg = <0x42>;
};
ir35221@43 {
compatible = "infineon,ir35221";
reg = <0x43>;
};
ir35221@44 {
compatible = "infineon,ir35221";
reg = <0x44>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
tmp423b@4d {
compatible = "ti,tmp423";
reg = <0x4d>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
ir35221@73 {
compatible = "infineon,ir35221";
reg = <0x73>;
};
ir35221@74 {
compatible = "infineon,ir35221";
reg = <0x74>;
};
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
&i2c10 {
status = "okay";
ir35221@42 {
compatible = "infineon,ir35221";
reg = <0x42>;
};
ir35221@43 {
compatible = "infineon,ir35221";
reg = <0x43>;
};
ir35221@44 {
compatible = "infineon,ir35221";
reg = <0x44>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
tmp423b@4d {
compatible = "ti,tmp423";
reg = <0x4d>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
ir35221@73 {
compatible = "infineon,ir35221";
reg = <0x73>;
};
ir35221@74 {
compatible = "infineon,ir35221";
reg = <0x74>;
};
eeprom@50 {
compatible = "atmel,24c128";
reg = <0x50>;
};
};
&i2c11 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@49 {
compatible = "ti,tmp275";
reg = <0x49>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&i2c14 {
status = "okay";
};
&i2c15 {
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
power-supply@68 {
compatible = "ibm,cffps2";
reg = <0x68>;
};
power-supply@69 {
compatible = "ibm,cffps2";
reg = <0x69>;
};
power-supply@6a {
compatible = "ibm,cffps2";
reg = <0x6a>;
};
power-supply@6b {
compatible = "ibm,cffps2";
reg = <0x6b>;
};
};
&i2c4 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@49 {
compatible = "ti,tmp275";
reg = <0x49>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
};
&i2c5 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@49 {
compatible = "ti,tmp275";
reg = <0x49>;
};
};
&i2c6 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
tmp275@4b {
compatible = "ti,tmp275";
reg = <0x4b>;
};
};
&i2c7 {
status = "okay";
si7021-a20@20 {
compatible = "silabs,si7020";
reg = <0x20>;
};
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
max31785@52 {
compatible = "maxim,max31785a";
reg = <0x52>;
#address-cells = <1>;
#size-cells = <0>;
fan@0 {
compatible = "pmbus-fan";
reg = <0>;
tach-pulses = <2>;
};
fan@1 {
compatible = "pmbus-fan";
reg = <1>;
tach-pulses = <2>;
};
fan@2 {
compatible = "pmbus-fan";
reg = <2>;
tach-pulses = <2>;
};
fan@3 {
compatible = "pmbus-fan";
reg = <3>;
tach-pulses = <2>;
};
};
pca0: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
};
gpio@1 {
reg = <1>;
};
gpio@2 {
reg = <2>;
};
gpio@3 {
reg = <3>;
};
gpio@4 {
reg = <4>;
};
gpio@5 {
reg = <5>;
};
gpio@6 {
reg = <6>;
};
gpio@7 {
reg = <7>;
};
gpio@8 {
reg = <8>;
};
gpio@9 {
reg = <9>;
};
gpio@10 {
reg = <10>;
};
gpio@11 {
reg = <11>;
};
gpio@12 {
reg = <12>;
};
gpio@13 {
reg = <13>;
};
gpio@14 {
reg = <14>;
};
gpio@15 {
reg = <15>;
};
};
dps: dps310@76 {
compatible = "infineon,dps310";
reg = <0x76>;
#io-channel-cells = <0>;
};
};
&i2c8 {
status = "okay";
ucd90320@b {
compatible = "ti,ucd90160";
reg = <0x0b>;
};
ucd90320@c {
compatible = "ti,ucd90160";
reg = <0x0c>;
};
ucd90320@11 {
compatible = "ti,ucd90160";
reg = <0x11>;
};
rtc@32 {
compatible = "epson,rx8900";
reg = <0x32>;
};
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
};
&i2c9 {
status = "okay";
ir35221@42 {
compatible = "infineon,ir35221";
reg = <0x42>;
};
ir35221@43 {
compatible = "infineon,ir35221";
reg = <0x43>;
};
ir35221@44 {
compatible = "infineon,ir35221";
reg = <0x44>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
tmp423b@4d {
compatible = "ti,tmp423";
reg = <0x4d>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
ir35221@73 {
compatible = "infineon,ir35221";
reg = <0x73>;
};
ir35221@74 {
compatible = "infineon,ir35221";
reg = <0x74>;
};
};
&i2c10 {
status = "okay";
ir35221@42 {
compatible = "infineon,ir35221";
reg = <0x42>;
};
ir35221@43 {
compatible = "infineon,ir35221";
reg = <0x43>;
};
ir35221@44 {
compatible = "infineon,ir35221";
reg = <0x44>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
tmp423b@4d {
compatible = "ti,tmp423";
reg = <0x4d>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
ir35221@73 {
compatible = "infineon,ir35221";
reg = <0x73>;
};
ir35221@74 {
compatible = "infineon,ir35221";
reg = <0x74>;
};
};
&i2c11 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@49 {
compatible = "ti,tmp275";
reg = <0x49>;
};
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
};
&i2c14 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
};
&i2c15 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
};
&vuart1 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
};
&mac2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii3_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>,
<&syscon ASPEED_CLK_MAC3RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
&mac3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii4_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>,
<&syscon ASPEED_CLK_MAC4RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout-128.dtsi"
};
flash@1 {
status = "okay";
m25p,fast-read;
label = "alt-bmc";
spi-max-frequency = <50000000>;
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
spi-max-frequency = <100000000>;
};
};

58
arch/arm/boot/dts/aspeed-bmc-inspur-fp5280g2.dts
View File

@ -148,14 +148,48 @@
};
leds {
compatible = "gpio-leds";
compatible = "gpio-leds";
power {
label = "power";
/* TODO: dummy gpio */
gpios = <&gpio ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>;
};
power {
label = "power";
/* TODO: dummy gpio */
gpios = <&gpio ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>;
};
init-ok {
label = "init-ok";
gpios = <&gpio ASPEED_GPIO(B, 7) GPIO_ACTIVE_LOW>;
};
front-memory {
label = "front-memory";
gpios = <&gpio ASPEED_GPIO(F, 4) GPIO_ACTIVE_LOW>;
};
front-syshot {
label = "front-syshot";
gpios = <&gpio ASPEED_GPIO(I, 1) GPIO_ACTIVE_LOW>;
};
front-syshealth {
label = "front-syshealth";
gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
};
front-fan {
label = "front-fan";
gpios = <&gpio ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
};
front-psu {
label = "front-psu";
gpios = <&gpio ASPEED_GPIO(B, 2) GPIO_ACTIVE_LOW>;
};
identify {
label = "identify";
gpios = <&gpio ASPEED_GPIO(Z, 7) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon-battery {
@ -239,6 +273,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};
@ -749,15 +786,6 @@
aspeed,external-nodes = <&gfx &lhc>;
};
&gpio {
pin_gpio_b7 {
gpio-hog;
gpios = <ASPEED_GPIO(B,7) GPIO_ACTIVE_LOW>;
output-high;
line-name = "BMC_INIT_OK";
};
};
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;

3
arch/arm/boot/dts/aspeed-bmc-inspur-on5263m5.dts
View File

@ -77,6 +77,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

3
arch/arm/boot/dts/aspeed-bmc-intel-s2600wf.dts
View File

@ -69,6 +69,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

3
arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
View File

@ -133,6 +133,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

3
arch/arm/boot/dts/aspeed-bmc-lenovo-hr855xg2.dts
View File

@ -139,6 +139,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

3
arch/arm/boot/dts/aspeed-bmc-opp-lanyang.dts
View File

@ -178,6 +178,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

3
arch/arm/boot/dts/aspeed-bmc-opp-mihawk.dts
View File

@ -449,6 +449,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

2
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
View File

@ -87,6 +87,7 @@
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
@ -99,6 +100,7 @@
flash@0 {
status = "okay";
m25p,fast-read;
spi-max-frequency = <50000000>;
label = "pnor";
};
};

5
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
View File

@ -112,6 +112,7 @@
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
@ -125,6 +126,7 @@
status = "okay";
m25p,fast-read;
label = "pnor";
spi-max-frequency = <100000000>;
};
};
@ -160,6 +162,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
};
&i2c1 {

3
arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
View File

@ -322,6 +322,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
};
&i2c2 {

1195
arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts Normal file
View File

File diff suppressed because it is too large Load Diff

4
arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
View File

@ -43,6 +43,10 @@
gpios = <&gpio ASPEED_GPIO(N, 1) GPIO_ACTIVE_LOW>;
};
power_green {
gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
};
id_blue {
gpios = <&gpio ASPEED_GPIO(O, 0) GPIO_ACTIVE_LOW>;
};

7
arch/arm/boot/dts/aspeed-bmc-opp-witherspoon.dts
View File

@ -200,6 +200,7 @@
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
partitions {
#address-cells = < 1 >;
@ -224,6 +225,7 @@
status = "okay";
label = "alt-bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
partitions {
#address-cells = < 1 >;
@ -242,7 +244,6 @@
label = "alt-obmc-ubi";
};
};
};
};
@ -255,6 +256,7 @@
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
@ -293,6 +295,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

5
arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
View File

@ -130,6 +130,7 @@
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
@ -143,6 +144,7 @@
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
@ -187,6 +189,9 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

6
arch/arm/boot/dts/aspeed-bmc-portwell-neptune.dts
View File

@ -80,12 +80,18 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default
&pinctrl_mdio1_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
<&syscon ASPEED_CLK_MAC1RCLK>;
clock-names = "MACCLK", "RCLK";
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii2_default>;
clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>,
<&syscon ASPEED_CLK_MAC2RCLK>;
clock-names = "MACCLK", "RCLK";
use-ncsi;
};

4
arch/arm/boot/dts/aspeed-g4.dtsi
View File

@ -65,6 +65,7 @@
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
@ -100,6 +101,7 @@
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
};
@ -182,7 +184,7 @@
#reset-cells = <1>;
pinctrl: pinctrl {
compatible = "aspeed,g4-pinctrl";
compatible = "aspeed,ast2400-pinctrl";
};
p2a: p2a-control {

26
arch/arm/boot/dts/aspeed-g5.dtsi
View File

@ -72,16 +72,19 @@
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
};
@ -97,11 +100,13 @@
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
};
@ -117,11 +122,13 @@
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
};
@ -215,7 +222,7 @@
#reset-cells = <1>;
pinctrl: pinctrl {
compatible = "aspeed,g5-pinctrl";
compatible = "aspeed,ast2500-pinctrl";
aspeed,external-nodes = <&gfx &lhc>;
};
@ -299,7 +306,7 @@
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2500-gpio";
reg = <0x1e780000 0x1000>;
reg = <0x1e780000 0x200>;
interrupts = <20>;
gpio-ranges = <&pinctrl 0 0 232>;
clocks = <&syscon ASPEED_CLK_APB>;
@ -307,6 +314,21 @@
#interrupt-cells = <2>;
};
sgpio: sgpio@1e780200 {
#gpio-cells = <2>;
compatible = "aspeed,ast2500-sgpio";
gpio-controller;
interrupts = <40>;
reg = <0x1e780200 0x0100>;
clocks = <&syscon ASPEED_CLK_APB>;
interrupt-controller;
ngpios = <8>;
bus-frequency = <12000000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sgpm_default>;
status = "disabled";
};
rtc: rtc@1e781000 {
compatible = "aspeed,ast2500-rtc";
reg = <0x1e781000 0x18>;

9
arch/arm/boot/dts/aspeed-g6-pinctrl.dtsi
View File

@ -852,14 +852,9 @@
groups = "SD2";
};
pinctrl_sd3_default: sd3_default {
function = "SD3";
groups = "SD3";
};
pinctrl_emmc_default: emmc_default {
function = "SD3";
groups = "EMMC";
function = "EMMC";
groups = "EMMCG4";
};
pinctrl_sgpm1_default: sgpm1_default {

587
arch/arm/boot/dts/aspeed-g6.dtsi
View File

@ -12,7 +12,29 @@
interrupt-parent = <&gic>;
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
i2c5 = &i2c5;
i2c6 = &i2c6;
i2c7 = &i2c7;
i2c8 = &i2c8;
i2c9 = &i2c9;
i2c10 = &i2c10;
i2c11 = &i2c11;
i2c12 = &i2c12;
i2c13 = &i2c13;
i2c14 = &i2c14;
i2c15 = &i2c15;
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
serial4 = &uart5;
serial5 = &vuart1;
serial6 = &vuart2;
};
@ -64,12 +86,113 @@
<0x40466000 0x2000>;
};
fmc: spi@1e620000 {
reg = < 0x1e620000 0xc4
0x20000000 0x10000000 >;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-fmc";
clocks = <&syscon ASPEED_CLK_AHB>;
status = "disabled";
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
};
spi1: spi@1e630000 {
reg = < 0x1e630000 0xc4
0x30000000 0x10000000 >;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-spi";
clocks = <&syscon ASPEED_CLK_AHB>;
status = "disabled";
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
};
spi2: spi@1e631000 {
reg = < 0x1e631000 0xc4
0x50000000 0x10000000 >;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-spi";
clocks = <&syscon ASPEED_CLK_AHB>;
status = "disabled";
flash@0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
flash@2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
status = "disabled";
};
fsim0: fsi@1e79b000 {
compatible = "aspeed,ast2600-fsi-master", "fsi-master";
reg = <0x1e79b000 0x94>;
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fsi1_default>;
clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
status = "disabled";
};
fsim1: fsi@1e79b100 {
compatible = "aspeed,ast2600-fsi-master", "fsi-master";
reg = <0x1e79b100 0x94>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fsi2_default>;
clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
status = "disabled";
};
};
mdio0: mdio@1e650000 {
compatible = "aspeed,ast2600-mdio";
reg = <0x1e650000 0x8>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio1_default>;
};
mdio1: mdio@1e650008 {
@ -78,6 +201,8 @@
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio2_default>;
};
mdio2: mdio@1e650010 {
@ -86,6 +211,8 @@
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio3_default>;
};
mdio3: mdio@1e650018 {
@ -94,6 +221,8 @@
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio4_default>;
};
mac0: ftgmac@1e660000 {
@ -168,6 +297,32 @@
quality = <100>;
};
gpio0: gpio@1e780000 {
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2600-gpio";
reg = <0x1e780000 0x800>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 0 208>;
ngpios = <208>;
clocks = <&syscon ASPEED_CLK_APB2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio1: gpio@1e780800 {
#gpio-cells = <2>;
gpio-controller;
compatible = "aspeed,ast2600-gpio";
reg = <0x1e780800 0x800>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
gpio-ranges = <&pinctrl 0 208 36>;
ngpios = <36>;
clocks = <&syscon ASPEED_CLK_APB1>;
interrupt-controller;
#interrupt-cells = <2>;
};
rtc: rtc@1e781000 {
compatible = "aspeed,ast2600-rtc";
reg = <0x1e781000 0x18>;
@ -175,6 +330,35 @@
status = "disabled";
};
timer: timer@1e782000 {
compatible = "aspeed,ast2600-timer";
reg = <0x1e782000 0x90>;
interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_APB1>;
clock-names = "PCLK";
};
uart1: serial@1e783000 {
compatible = "ns16550a";
reg = <0x1e783000 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
resets = <&lpc_reset 4>;
no-loopback-test;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
status = "disabled";
};
uart5: serial@1e784000 {
compatible = "ns16550a";
reg = <0x1e784000 0x1000>;
@ -207,6 +391,93 @@
status = "disabled";
};
lpc: lpc@1e789000 {
compatible = "aspeed,ast2600-lpc", "simple-mfd";
reg = <0x1e789000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1e789000 0x1000>;
lpc_bmc: lpc-bmc@0 {
compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
reg = <0x0 0x80>;
reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x80>;
kcs1: kcs1@0 {
compatible = "aspeed,ast2600-kcs-bmc";
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
kcs_chan = <1>;
status = "disabled";
};
kcs2: kcs2@0 {
compatible = "aspeed,ast2600-kcs-bmc";
interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
kcs_chan = <2>;
status = "disabled";
};
kcs3: kcs3@0 {
compatible = "aspeed,ast2600-kcs-bmc";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
kcs_chan = <3>;
status = "disabled";
};
};
lpc_host: lpc-host@80 {
compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
reg = <0x80 0x1e0>;
reg-io-width = <4>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x80 0x1e0>;
kcs4: kcs4@0 {
compatible = "aspeed,ast2600-kcs-bmc";
interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
kcs_chan = <4>;
status = "disabled";
};
lpc_ctrl: lpc-ctrl@0 {
compatible = "aspeed,ast2600-lpc-ctrl";
reg = <0x0 0x80>;
clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
status = "disabled";
};
lpc_snoop: lpc-snoop@0 {
compatible = "aspeed,ast2600-lpc-snoop";
reg = <0x0 0x80>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
lhc: lhc@20 {
compatible = "aspeed,ast2600-lhc";
reg = <0x20 0x24 0x48 0x8>;
};
lpc_reset: reset-controller@18 {
compatible = "aspeed,ast2600-lpc-reset";
reg = <0x18 0x4>;
#reset-cells = <1>;
};
ibt: ibt@c0 {
compatible = "aspeed,ast2600-ibt-bmc";
reg = <0xc0 0x18>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
};
};
sdc: sdc@1e740000 {
compatible = "aspeed,ast2600-sd-controller";
reg = <0x1e740000 0x100>;
@ -235,7 +506,7 @@
};
};
emmc: sdc@1e750000 {
emmc_controller: sdc@1e750000 {
compatible = "aspeed,ast2600-sd-controller";
reg = <0x1e750000 0x100>;
#address-cells = <1>;
@ -244,7 +515,7 @@
clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
status = "disabled";
sdhci@1e750100 {
emmc: sdhci@1e750100 {
compatible = "aspeed,ast2600-sdhci";
reg = <0x100 0x100>;
sdhci,auto-cmd12;
@ -254,8 +525,320 @@
pinctrl-0 = <&pinctrl_emmc_default>;
};
};
vuart1: serial@1e787000 {
compatible = "aspeed,ast2500-vuart";
reg = <0x1e787000 0x40>;
reg-shift = <2>;
interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_APB1>;
no-loopback-test;
status = "disabled";
};
vuart2: serial@1e788000 {
compatible = "aspeed,ast2500-vuart";
reg = <0x1e788000 0x40>;
reg-shift = <2>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_APB1>;
no-loopback-test;
status = "disabled";
};
uart2: serial@1e78d000 {
compatible = "ns16550a";
reg = <0x1e78d000 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
resets = <&lpc_reset 5>;
no-loopback-test;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
status = "disabled";
};
uart3: serial@1e78e000 {
compatible = "ns16550a";
reg = <0x1e78e000 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
resets = <&lpc_reset 6>;
no-loopback-test;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
status = "disabled";
};
uart4: serial@1e78f000 {
compatible = "ns16550a";
reg = <0x1e78f000 0x20>;
reg-shift = <2>;
reg-io-width = <4>;
interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
resets = <&lpc_reset 7>;
no-loopback-test;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
status = "disabled";
};
i2c: bus@1e78a000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x1e78a000 0x1000>;
};
};
};
};
#include "aspeed-g6-pinctrl.dtsi"
&i2c {
i2c0: i2c-bus@80 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x80 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_default>;
status = "disabled";
};
i2c1: i2c-bus@100 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x100 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_default>;
status = "disabled";
};
i2c2: i2c-bus@180 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x180 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_default>;
status = "disabled";
};
i2c3: i2c-bus@200 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x200 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_default>;
status = "disabled";
};
i2c4: i2c-bus@280 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x280 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_default>;
status = "disabled";
};
i2c5: i2c-bus@300 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x300 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_default>;
status = "disabled";
};
i2c6: i2c-bus@380 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x380 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c7_default>;
status = "disabled";
};
i2c7: i2c-bus@400 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x400 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
status = "disabled";
};
i2c8: i2c-bus@480 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x480 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
status = "disabled";
};
i2c9: i2c-bus@500 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x500 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c10_default>;
status = "disabled";
};
i2c10: i2c-bus@580 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x580 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c11_default>;
status = "disabled";
};
i2c11: i2c-bus@600 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x600 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c12_default>;
status = "disabled";
};
i2c12: i2c-bus@680 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x680 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c13_default>;
status = "disabled";
};
i2c13: i2c-bus@700 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x700 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c14_default>;
status = "disabled";
};
i2c14: i2c-bus@780 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x780 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c15_default>;
status = "disabled";
};
i2c15: i2c-bus@800 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x800 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c16_default>;
status = "disabled";
};
};

96
arch/arm/boot/dts/ast2500-facebook-netbmc-common.dtsi Normal file
View File

@ -0,0 +1,96 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2019 Facebook Inc.
#include "aspeed-g5.dtsi"
/ {
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
};
/*
* Update reset type to "system" (full chip) to fix warm reboot hang issue
* when reset type is set to default ("soc", gated by reset mask registers).
*/
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
&wdt2 {
status = "disabled";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&fmc {
status = "okay";
fmc_flash0: flash@0 {
status = "okay";
m25p,fast-read;
label = "spi0.0";
#include "facebook-bmc-flash-layout.dtsi"
};
fmc_flash1: flash@1 {
status = "okay";
m25p,fast-read;
label = "spi0.1";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
flash1@0 {
reg = <0x0 0x2000000>;
label = "flash1";
};
};
};
};
&mac1 {
status = "okay";
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&rtc {
status = "okay";
};
&vhub {
status = "okay";
};
&sdmmc {
status = "okay";
};
&sdhci1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd2_default>;
};

32
arch/arm/boot/dts/openbmc-flash-layout-128.dtsi Normal file
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@ -0,0 +1,32 @@
// SPDX-License-Identifier: GPL-2.0+
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
u-boot@0 {
reg = <0x0 0xe0000>; // 896KB
label = "u-boot";
};
u-boot-env@e0000 {
reg = <0xe0000 0x20000>; // 128KB
label = "u-boot-env";
};
kernel@100000 {
reg = <0x100000 0x900000>; // 9MB
label = "kernel";
};
rofs@a00000 {
reg = <0xa00000 0x5600000>; // 86MB
label = "rofs";
};
rwfs@6000000 {
reg = <0x6000000 0x2000000>; // 32MB
label = "rwfs";
};
};

2
include/dt-bindings/clock/aspeed-clock.h
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@ -39,6 +39,8 @@
#define ASPEED_CLK_BCLK 33
#define ASPEED_CLK_MPLL 34
#define ASPEED_CLK_24M 35
#define ASPEED_CLK_MAC1RCLK 36
#define ASPEED_CLK_MAC2RCLK 37
#define ASPEED_RESET_XDMA 0
#define ASPEED_RESET_MCTP 1

4
include/dt-bindings/clock/ast2600-clock.h
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@ -83,6 +83,10 @@
#define ASPEED_CLK_MAC12 64
#define ASPEED_CLK_MAC34 65
#define ASPEED_CLK_USBPHY_40M 66
#define ASPEED_CLK_MAC1RCLK 67
#define ASPEED_CLK_MAC2RCLK 68
#define ASPEED_CLK_MAC3RCLK 69
#define ASPEED_CLK_MAC4RCLK 70
/* Only list resets here that are not part of a gate */
#define ASPEED_RESET_ADC 55