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dt-bindings: pinctrl: renesas: Document RZ/G2UL pinctrl

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Document Renesas RZ/G2UL pinctrl bindings. RZ/G2UL GPIO block is
almost identical to RZ/G2L and has lesser pins compared to RZ/G2L.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220315152717.20045-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Biju Das 2022-03-15 15:27:16 +00:00 committed by Geert Uytterhoeven
parent 29af634430
commit 74273035c7
1 changed files with 3 additions and 2 deletions
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5
Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml
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@ -11,8 +11,8 @@ maintainers:
- Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
description:
The Renesas SoCs of the RZ/{G2L,V2L} series feature a combined Pin and GPIO
controller.
The Renesas SoCs of the RZ/{G2L,V2L} alike series feature a combined Pin and
GPIO controller.
Pin multiplexing and GPIO configuration is performed on a per-pin basis.
Each port features up to 8 pins, each of them configurable for GPIO function
(port mode) or in alternate function mode.
@ -23,6 +23,7 @@ properties:
oneOf:
- items:
- enum:
- renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2}
- renesas,r9a07g044-pinctrl # RZ/G2{L,LC}
- items: