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drm/amdgpu: pull topaz gmc bits into gmc_v7
Add the topaz golden settings into the gmc7 module. Reviewed-by: Ken Wang <Qingqing.Wang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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@ -44,8 +44,37 @@ MODULE_FIRMWARE("radeon/bonaire_mc.bin");
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MODULE_FIRMWARE("radeon/hawaii_mc.bin");
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MODULE_FIRMWARE("amdgpu/topaz_mc.bin");
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static const u32 golden_settings_iceland_a11[] =
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{
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mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0x0fffffff,
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mmVM_PRT_APERTURE1_LOW_ADDR, 0x0fffffff, 0x0fffffff,
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mmVM_PRT_APERTURE2_LOW_ADDR, 0x0fffffff, 0x0fffffff,
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mmVM_PRT_APERTURE3_LOW_ADDR, 0x0fffffff, 0x0fffffff
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};
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static const u32 iceland_mgcg_cgcg_init[] =
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{
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mmMC_MEM_POWER_LS, 0xffffffff, 0x00000104
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};
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static void gmc_v7_0_init_golden_registers(struct amdgpu_device *adev)
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{
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switch (adev->asic_type) {
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case CHIP_TOPAZ:
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amdgpu_program_register_sequence(adev,
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iceland_mgcg_cgcg_init,
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(const u32)ARRAY_SIZE(iceland_mgcg_cgcg_init));
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amdgpu_program_register_sequence(adev,
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golden_settings_iceland_a11,
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(const u32)ARRAY_SIZE(golden_settings_iceland_a11));
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break;
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default:
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break;
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}
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}
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/**
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* gmc8_mc_wait_for_idle - wait for MC idle callback.
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* gmc7_mc_wait_for_idle - wait for MC idle callback.
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*
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* @adev: amdgpu_device pointer
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*
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@ -142,7 +171,7 @@ static int gmc_v7_0_init_microcode(struct amdgpu_device *adev)
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default: BUG();
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}
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if(adev->asic_type == CHIP_TOPAZ)
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if (adev->asic_type == CHIP_TOPAZ)
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snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mc.bin", chip_name);
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else
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snprintf(fw_name, sizeof(fw_name), "radeon/%s_mc.bin", chip_name);
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@ -992,6 +1021,8 @@ static int gmc_v7_0_hw_init(void *handle)
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int r;
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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gmc_v7_0_init_golden_registers(adev);
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gmc_v7_0_mc_program(adev);
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if (!(adev->flags & AMD_IS_APU)) {
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