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lib/raid6: Add AVX2 optimized recovery functions
Optimize RAID6 recovery functions to take advantage of the 256-bit YMM integer instructions introduced in AVX2. The patch was tested and benchmarked before submission. However hardware is not yet released so benchmark numbers cannot be reported. Acked-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Jim Kukunas <james.t.kukunas@linux.intel.com> Signed-off-by: NeilBrown <neilb@suse.de>
This commit is contained in:
Jim Kukunas
NeilBrown
parent
54f89341e8
commit
7056741fd9
@ -123,9 +123,10 @@ cfi-sections := $(call as-instr,.cfi_sections .debug_frame,-DCONFIG_AS_CFI_SECTI
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# does binutils support specific instructions?
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asinstr := $(call as-instr,fxsaveq (%rax),-DCONFIG_AS_FXSAVEQ=1)
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avx_instr := $(call as-instr,vxorps %ymm0$(comma)%ymm1$(comma)%ymm2,-DCONFIG_AS_AVX=1)
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avx2_instr :=$(call as-instr,vpbroadcastb %xmm0$(comma)%ymm1,-DCONFIG_AS_AVX2=1)
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KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr)
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KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr)
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KBUILD_AFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr) $(avx2_instr)
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KBUILD_CFLAGS += $(cfi) $(cfi-sigframe) $(cfi-sections) $(asinstr) $(avx_instr) $(avx2_instr)
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LDFLAGS := -m elf_$(UTS_MACHINE)
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@ -109,6 +109,7 @@ struct raid6_recov_calls {
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extern const struct raid6_recov_calls raid6_recov_intx1;
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extern const struct raid6_recov_calls raid6_recov_ssse3;
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extern const struct raid6_recov_calls raid6_recov_avx2;
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/* Algorithm list */
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extern const struct raid6_calls * const raid6_algos[];
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@ -1,6 +1,6 @@
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obj-$(CONFIG_RAID6_PQ) += raid6_pq.o
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raid6_pq-y += algos.o recov.o recov_ssse3.o tables.o int1.o int2.o int4.o \
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raid6_pq-y += algos.o recov.o recov_ssse3.o recov_avx2.o tables.o int1.o int2.o int4.o \
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int8.o int16.o int32.o altivec1.o altivec2.o altivec4.o \
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altivec8.o mmx.o sse1.o sse2.o
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hostprogs-y += mktables
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@ -72,6 +72,9 @@ EXPORT_SYMBOL_GPL(raid6_datap_recov);
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const struct raid6_recov_calls *const raid6_recov_algos[] = {
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#if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__)
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#ifdef CONFIG_AS_AVX2
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&raid6_recov_avx2,
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#endif
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&raid6_recov_ssse3,
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#endif
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&raid6_recov_intx1,
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327
lib/raid6/recov_avx2.c
Normal file
327
lib/raid6/recov_avx2.c
Normal file
@ -0,0 +1,327 @@
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/*
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* Copyright (C) 2012 Intel Corporation
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* Author: Jim Kukunas <james.t.kukunas@linux.intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; version 2
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* of the License.
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*/
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#if (defined(__i386__) || defined(__x86_64__)) && !defined(__arch_um__)
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#if CONFIG_AS_AVX2
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#include <linux/raid/pq.h>
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#include "x86.h"
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static int raid6_has_avx2(void)
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{
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return boot_cpu_has(X86_FEATURE_AVX2) &&
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boot_cpu_has(X86_FEATURE_AVX);
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}
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static void raid6_2data_recov_avx2(int disks, size_t bytes, int faila,
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int failb, void **ptrs)
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{
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u8 *p, *q, *dp, *dq;
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const u8 *pbmul; /* P multiplier table for B data */
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const u8 *qmul; /* Q multiplier table (for both) */
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const u8 x0f = 0x0f;
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p = (u8 *)ptrs[disks-2];
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q = (u8 *)ptrs[disks-1];
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/* Compute syndrome with zero for the missing data pages
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Use the dead data pages as temporary storage for
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delta p and delta q */
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dp = (u8 *)ptrs[faila];
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ptrs[faila] = (void *)raid6_empty_zero_page;
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ptrs[disks-2] = dp;
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dq = (u8 *)ptrs[failb];
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ptrs[failb] = (void *)raid6_empty_zero_page;
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ptrs[disks-1] = dq;
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raid6_call.gen_syndrome(disks, bytes, ptrs);
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/* Restore pointer table */
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ptrs[faila] = dp;
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ptrs[failb] = dq;
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ptrs[disks-2] = p;
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ptrs[disks-1] = q;
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/* Now, pick the proper data tables */
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pbmul = raid6_vgfmul[raid6_gfexi[failb-faila]];
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qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila] ^
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raid6_gfexp[failb]]];
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kernel_fpu_begin();
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/* ymm0 = x0f[16] */
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asm volatile("vpbroadcastb %0, %%ymm7" : : "m" (x0f));
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while (bytes) {
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#ifdef CONFIG_X86_64
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asm volatile("vmovdqa %0, %%ymm1" : : "m" (q[0]));
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asm volatile("vmovdqa %0, %%ymm9" : : "m" (q[32]));
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asm volatile("vmovdqa %0, %%ymm0" : : "m" (p[0]));
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asm volatile("vmovdqa %0, %%ymm8" : : "m" (p[32]));
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asm volatile("vpxor %0, %%ymm1, %%ymm1" : : "m" (dq[0]));
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asm volatile("vpxor %0, %%ymm9, %%ymm9" : : "m" (dq[32]));
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asm volatile("vpxor %0, %%ymm0, %%ymm0" : : "m" (dp[0]));
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asm volatile("vpxor %0, %%ymm8, %%ymm8" : : "m" (dp[32]));
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/*
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* 1 = dq[0] ^ q[0]
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* 9 = dq[32] ^ q[32]
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* 0 = dp[0] ^ p[0]
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* 8 = dp[32] ^ p[32]
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*/
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asm volatile("vbroadcasti128 %0, %%ymm4" : : "m" (qmul[0]));
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asm volatile("vbroadcasti128 %0, %%ymm5" : : "m" (qmul[16]));
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asm volatile("vpsraw $4, %ymm1, %ymm3");
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asm volatile("vpsraw $4, %ymm9, %ymm12");
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asm volatile("vpand %ymm7, %ymm1, %ymm1");
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asm volatile("vpand %ymm7, %ymm9, %ymm9");
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asm volatile("vpand %ymm7, %ymm3, %ymm3");
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asm volatile("vpand %ymm7, %ymm12, %ymm12");
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asm volatile("vpshufb %ymm9, %ymm4, %ymm14");
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asm volatile("vpshufb %ymm1, %ymm4, %ymm4");
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asm volatile("vpshufb %ymm12, %ymm5, %ymm15");
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asm volatile("vpshufb %ymm3, %ymm5, %ymm5");
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asm volatile("vpxor %ymm14, %ymm15, %ymm15");
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asm volatile("vpxor %ymm4, %ymm5, %ymm5");
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/*
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* 5 = qx[0]
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* 15 = qx[32]
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*/
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asm volatile("vbroadcasti128 %0, %%ymm4" : : "m" (pbmul[0]));
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asm volatile("vbroadcasti128 %0, %%ymm1" : : "m" (pbmul[16]));
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asm volatile("vpsraw $4, %ymm0, %ymm2");
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asm volatile("vpsraw $4, %ymm8, %ymm6");
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asm volatile("vpand %ymm7, %ymm0, %ymm3");
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asm volatile("vpand %ymm7, %ymm8, %ymm14");
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asm volatile("vpand %ymm7, %ymm2, %ymm2");
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asm volatile("vpand %ymm7, %ymm6, %ymm6");
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asm volatile("vpshufb %ymm14, %ymm4, %ymm12");
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asm volatile("vpshufb %ymm3, %ymm4, %ymm4");
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asm volatile("vpshufb %ymm6, %ymm1, %ymm13");
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asm volatile("vpshufb %ymm2, %ymm1, %ymm1");
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asm volatile("vpxor %ymm4, %ymm1, %ymm1");
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asm volatile("vpxor %ymm12, %ymm13, %ymm13");
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/*
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* 1 = pbmul[px[0]]
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* 13 = pbmul[px[32]]
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*/
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asm volatile("vpxor %ymm5, %ymm1, %ymm1");
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asm volatile("vpxor %ymm15, %ymm13, %ymm13");
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/*
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* 1 = db = DQ
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* 13 = db[32] = DQ[32]
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*/
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asm volatile("vmovdqa %%ymm1, %0" : "=m" (dq[0]));
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asm volatile("vmovdqa %%ymm13,%0" : "=m" (dq[32]));
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asm volatile("vpxor %ymm1, %ymm0, %ymm0");
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asm volatile("vpxor %ymm13, %ymm8, %ymm8");
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asm volatile("vmovdqa %%ymm0, %0" : "=m" (dp[0]));
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asm volatile("vmovdqa %%ymm8, %0" : "=m" (dp[32]));
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bytes -= 64;
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p += 64;
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q += 64;
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dp += 64;
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dq += 64;
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#else
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asm volatile("vmovdqa %0, %%ymm1" : : "m" (*q));
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asm volatile("vmovdqa %0, %%ymm0" : : "m" (*p));
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asm volatile("vpxor %0, %%ymm1, %%ymm1" : : "m" (*dq));
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asm volatile("vpxor %0, %%ymm0, %%ymm0" : : "m" (*dp));
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/* 1 = dq ^ q; 0 = dp ^ p */
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asm volatile("vbroadcasti128 %0, %%ymm4" : : "m" (qmul[0]));
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asm volatile("vbroadcasti128 %0, %%ymm5" : : "m" (qmul[16]));
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/*
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* 1 = dq ^ q
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* 3 = dq ^ p >> 4
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*/
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asm volatile("vpsraw $4, %ymm1, %ymm3");
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asm volatile("vpand %ymm7, %ymm1, %ymm1");
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asm volatile("vpand %ymm7, %ymm3, %ymm3");
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asm volatile("vpshufb %ymm1, %ymm4, %ymm4");
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asm volatile("vpshufb %ymm3, %ymm5, %ymm5");
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asm volatile("vpxor %ymm4, %ymm5, %ymm5");
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/* 5 = qx */
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asm volatile("vbroadcasti128 %0, %%ymm4" : : "m" (pbmul[0]));
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asm volatile("vbroadcasti128 %0, %%ymm1" : : "m" (pbmul[16]));
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asm volatile("vpsraw $4, %ymm0, %ymm2");
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asm volatile("vpand %ymm7, %ymm0, %ymm3");
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asm volatile("vpand %ymm7, %ymm2, %ymm2");
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asm volatile("vpshufb %ymm3, %ymm4, %ymm4");
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asm volatile("vpshufb %ymm2, %ymm1, %ymm1");
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asm volatile("vpxor %ymm4, %ymm1, %ymm1");
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/* 1 = pbmul[px] */
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asm volatile("vpxor %ymm5, %ymm1, %ymm1");
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/* 1 = db = DQ */
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asm volatile("vmovdqa %%ymm1, %0" : "=m" (dq[0]));
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asm volatile("vpxor %ymm1, %ymm0, %ymm0");
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asm volatile("vmovdqa %%ymm0, %0" : "=m" (dp[0]));
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bytes -= 32;
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p += 32;
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q += 32;
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dp += 32;
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dq += 32;
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#endif
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}
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kernel_fpu_end();
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}
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static void raid6_datap_recov_avx2(int disks, size_t bytes, int faila,
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void **ptrs)
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{
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u8 *p, *q, *dq;
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const u8 *qmul; /* Q multiplier table */
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const u8 x0f = 0x0f;
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p = (u8 *)ptrs[disks-2];
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q = (u8 *)ptrs[disks-1];
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/* Compute syndrome with zero for the missing data page
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Use the dead data page as temporary storage for delta q */
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dq = (u8 *)ptrs[faila];
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ptrs[faila] = (void *)raid6_empty_zero_page;
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ptrs[disks-1] = dq;
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raid6_call.gen_syndrome(disks, bytes, ptrs);
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/* Restore pointer table */
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ptrs[faila] = dq;
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ptrs[disks-1] = q;
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/* Now, pick the proper data tables */
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qmul = raid6_vgfmul[raid6_gfinv[raid6_gfexp[faila]]];
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kernel_fpu_begin();
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asm volatile("vpbroadcastb %0, %%ymm7" : : "m" (x0f));
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while (bytes) {
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#ifdef CONFIG_X86_64
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asm volatile("vmovdqa %0, %%ymm3" : : "m" (dq[0]));
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asm volatile("vmovdqa %0, %%ymm8" : : "m" (dq[32]));
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asm volatile("vpxor %0, %%ymm3, %%ymm3" : : "m" (q[0]));
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asm volatile("vpxor %0, %%ymm8, %%ymm8" : : "m" (q[32]));
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/*
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* 3 = q[0] ^ dq[0]
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* 8 = q[32] ^ dq[32]
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*/
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asm volatile("vbroadcasti128 %0, %%ymm0" : : "m" (qmul[0]));
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asm volatile("vmovapd %ymm0, %ymm13");
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asm volatile("vbroadcasti128 %0, %%ymm1" : : "m" (qmul[16]));
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asm volatile("vmovapd %ymm1, %ymm14");
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asm volatile("vpsraw $4, %ymm3, %ymm6");
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asm volatile("vpsraw $4, %ymm8, %ymm12");
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asm volatile("vpand %ymm7, %ymm3, %ymm3");
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asm volatile("vpand %ymm7, %ymm8, %ymm8");
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asm volatile("vpand %ymm7, %ymm6, %ymm6");
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asm volatile("vpand %ymm7, %ymm12, %ymm12");
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asm volatile("vpshufb %ymm3, %ymm0, %ymm0");
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asm volatile("vpshufb %ymm8, %ymm13, %ymm13");
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asm volatile("vpshufb %ymm6, %ymm1, %ymm1");
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asm volatile("vpshufb %ymm12, %ymm14, %ymm14");
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asm volatile("vpxor %ymm0, %ymm1, %ymm1");
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asm volatile("vpxor %ymm13, %ymm14, %ymm14");
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/*
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* 1 = qmul[q[0] ^ dq[0]]
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* 14 = qmul[q[32] ^ dq[32]]
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*/
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asm volatile("vmovdqa %0, %%ymm2" : : "m" (p[0]));
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asm volatile("vmovdqa %0, %%ymm12" : : "m" (p[32]));
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asm volatile("vpxor %ymm1, %ymm2, %ymm2");
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asm volatile("vpxor %ymm14, %ymm12, %ymm12");
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/*
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* 2 = p[0] ^ qmul[q[0] ^ dq[0]]
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* 12 = p[32] ^ qmul[q[32] ^ dq[32]]
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*/
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asm volatile("vmovdqa %%ymm1, %0" : "=m" (dq[0]));
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asm volatile("vmovdqa %%ymm14, %0" : "=m" (dq[32]));
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asm volatile("vmovdqa %%ymm2, %0" : "=m" (p[0]));
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asm volatile("vmovdqa %%ymm12,%0" : "=m" (p[32]));
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bytes -= 64;
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p += 64;
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q += 64;
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dq += 64;
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#else
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asm volatile("vmovdqa %0, %%ymm3" : : "m" (dq[0]));
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asm volatile("vpxor %0, %%ymm3, %%ymm3" : : "m" (q[0]));
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/* 3 = q ^ dq */
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asm volatile("vbroadcasti128 %0, %%ymm0" : : "m" (qmul[0]));
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asm volatile("vbroadcasti128 %0, %%ymm1" : : "m" (qmul[16]));
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asm volatile("vpsraw $4, %ymm3, %ymm6");
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asm volatile("vpand %ymm7, %ymm3, %ymm3");
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asm volatile("vpand %ymm7, %ymm6, %ymm6");
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asm volatile("vpshufb %ymm3, %ymm0, %ymm0");
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asm volatile("vpshufb %ymm6, %ymm1, %ymm1");
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asm volatile("vpxor %ymm0, %ymm1, %ymm1");
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/* 1 = qmul[q ^ dq] */
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asm volatile("vmovdqa %0, %%ymm2" : : "m" (p[0]));
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asm volatile("vpxor %ymm1, %ymm2, %ymm2");
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/* 2 = p ^ qmul[q ^ dq] */
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asm volatile("vmovdqa %%ymm1, %0" : "=m" (dq[0]));
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asm volatile("vmovdqa %%ymm2, %0" : "=m" (p[0]));
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bytes -= 32;
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p += 32;
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q += 32;
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dq += 32;
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#endif
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}
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kernel_fpu_end();
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}
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const struct raid6_recov_calls raid6_recov_avx2 = {
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.data2 = raid6_2data_recov_avx2,
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.datap = raid6_datap_recov_avx2,
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.valid = raid6_has_avx2,
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#ifdef CONFIG_X86_64
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.name = "avx2x2",
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#else
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.name = "avx2x1",
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#endif
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.priority = 2,
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};
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#else
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#warning "your version of binutils lacks AVX2 support"
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#endif
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#endif
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@ -23,7 +23,7 @@ RANLIB = ranlib
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||||
all: raid6.a raid6test
|
||||
|
||||
raid6.a: int1.o int2.o int4.o int8.o int16.o int32.o mmx.o sse1.o sse2.o \
|
||||
altivec1.o altivec2.o altivec4.o altivec8.o recov.o recov_ssse3.o algos.o \
|
||||
altivec1.o altivec2.o altivec4.o altivec8.o recov.o recov_ssse3.o recov_avx2.o algos.o \
|
||||
tables.o
|
||||
rm -f $@
|
||||
$(AR) cq $@ $^
|
||||
|
||||
@ -45,19 +45,23 @@ static inline void kernel_fpu_end(void)
|
||||
#define X86_FEATURE_XMM3 (4*32+ 0) /* "pni" SSE-3 */
|
||||
#define X86_FEATURE_SSSE3 (4*32+ 9) /* Supplemental SSE-3 */
|
||||
#define X86_FEATURE_AVX (4*32+28) /* Advanced Vector Extensions */
|
||||
#define X86_FEATURE_AVX2 (9*32+ 5) /* AVX2 instructions */
|
||||
#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
|
||||
|
||||
/* Should work well enough on modern CPUs for testing */
|
||||
static inline int boot_cpu_has(int flag)
|
||||
{
|
||||
u32 eax = (flag & 0x20) ? 0x80000001 : 1;
|
||||
u32 ecx, edx;
|
||||
u32 eax, ebx, ecx, edx;
|
||||
|
||||
eax = (flag & 0x100) ? 7 :
|
||||
(flag & 0x20) ? 0x80000001 : 1;
|
||||
ecx = 0;
|
||||
|
||||
asm volatile("cpuid"
|
||||
: "+a" (eax), "=d" (edx), "=c" (ecx)
|
||||
: : "ebx");
|
||||
: "+a" (eax), "=b" (ebx), "=d" (edx), "+c" (ecx));
|
||||
|
||||
return ((flag & 0x80 ? ecx : edx) >> (flag & 31)) & 1;
|
||||
return ((flag & 0x100 ? ebx :
|
||||
(flag & 0x80) ? ecx : edx) >> (flag & 31)) & 1;
|
||||
}
|
||||
|
||||
#endif /* ndef __KERNEL__ */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user