mirror of
https://github.com/torvalds/linux.git
synced 2024-12-26 12:52:30 +00:00
RISC-V updates for v5.5-rc7
Three fixes for RISC-V:
- Don't free and reuse memory containing the code that CPUs parked at
boot reside in.
- Fix rv64 build problems for ubsan and some modules by adding logical
and arithmetic shift helpers for 128-bit values. These are from
libgcc and are similar to what's present for ARM64.
- Fix vDSO builds to clean up their own temporary files.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl4klXMACgkQx4+xDQu9
KkshPhAAiExCAl2JpZxoeuyQmjS7X68au5CWWJa+uB5osAgxJSPk4XJt9QeagOFw
wpKmefQDwPKXQuoD0VmNSdJMioBvgzFLqftoc2D9GAv3A0MB4miSsZkUheVbUifN
jtc3tc3jOCiVNOb0lbX+B6NL+qentvV6CTmujrf79wDBZpGPzKSM2S2OZMvFijVY
B7ijF1bqXBZg6weE8xdefJhBfDmd7vDBKmMJtv1RUbiOgoBGqjM8QtaXVrUz4Px0
NLlTleZL4grZVCepJ4psambm5gcZ8UilAe/ywhhrSFOSNCTYKB3ST+ci9VC4t5Vx
TiR6MnDV1qAl2Uh6aoOhZECpggge9zQOyER7QGbleNplxavhi6jsRgeV9hbqeyBZ
FCanzqO33irRwrtl7lNsPiUv3XWyyGH5yQLxA9wPq/W9dJkO6Z8pl5Fq0kI/oJNj
WtlVIp2EnkXJUmXiMBTHerLoBJAVnu+S2HRIeRqOEUSKT4bFP28kq3T6ctP4QuoT
3F2k9A3DOIZPY8dhXIdFSdcM0IbfRliFy/9hHLt6JdSa35poxGUBpOafDq87n9/3
UtbkLbxJd56EWOSx5l2bLJ/b4FjJX6powfV9cwjrHjrzoiAqc8z0lfQRGlbGjeYb
3XTTXhLIspGMK8acm8/p2I6uwDVGFMveEdsLJ8UWAiYjJkLSFEk=
=SfqL
-----END PGP SIGNATURE-----
Merge tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Paul Walmsley:
"Three fixes for RISC-V:
- Don't free and reuse memory containing the code that CPUs parked at
boot reside in.
- Fix rv64 build problems for ubsan and some modules by adding
logical and arithmetic shift helpers for 128-bit values. These are
from libgcc and are similar to what's present for ARM64.
- Fix vDSO builds to clean up their own temporary files"
* tag 'riscv/for-v5.5-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Less inefficient gcc tishift helpers (and export their symbols)
riscv: delete temporary files
riscv: make sure the cores stay looping in .Lsecondary_park
This commit is contained in:
Linus Torvalds
commit
7008ee1210
@ -5,4 +5,8 @@
|
||||
#include <linux/ftrace.h>
|
||||
#include <asm-generic/asm-prototypes.h>
|
||||
|
||||
long long __lshrti3(long long a, int b);
|
||||
long long __ashrti3(long long a, int b);
|
||||
long long __ashlti3(long long a, int b);
|
||||
|
||||
#endif /* _ASM_RISCV_PROTOTYPES_H */
|
||||
|
||||
@ -80,7 +80,9 @@ _start_kernel:
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
li t0, CONFIG_NR_CPUS
|
||||
bgeu a0, t0, .Lsecondary_park
|
||||
blt a0, t0, .Lgood_cores
|
||||
tail .Lsecondary_park
|
||||
.Lgood_cores:
|
||||
#endif
|
||||
|
||||
/* Pick one hart to run the main boot sequence */
|
||||
@ -209,11 +211,6 @@ relocate:
|
||||
tail smp_callin
|
||||
#endif
|
||||
|
||||
.align 2
|
||||
.Lsecondary_park:
|
||||
/* We lack SMP support or have too many harts, so park this hart */
|
||||
wfi
|
||||
j .Lsecondary_park
|
||||
END(_start)
|
||||
|
||||
#ifdef CONFIG_RISCV_M_MODE
|
||||
@ -295,6 +292,13 @@ ENTRY(reset_regs)
|
||||
END(reset_regs)
|
||||
#endif /* CONFIG_RISCV_M_MODE */
|
||||
|
||||
.section ".text", "ax",@progbits
|
||||
.align 2
|
||||
.Lsecondary_park:
|
||||
/* We lack SMP support or have too many harts, so park this hart */
|
||||
wfi
|
||||
j .Lsecondary_park
|
||||
|
||||
__PAGE_ALIGNED_BSS
|
||||
/* Empty zero page */
|
||||
.balign PAGE_SIZE
|
||||
|
||||
@ -58,7 +58,8 @@ quiet_cmd_vdsold = VDSOLD $@
|
||||
cmd_vdsold = $(CC) $(KBUILD_CFLAGS) $(call cc-option, -no-pie) -nostdlib -nostartfiles $(SYSCFLAGS_$(@F)) \
|
||||
-Wl,-T,$(filter-out FORCE,$^) -o $@.tmp && \
|
||||
$(CROSS_COMPILE)objcopy \
|
||||
$(patsubst %, -G __vdso_%, $(vdso-syms)) $@.tmp $@
|
||||
$(patsubst %, -G __vdso_%, $(vdso-syms)) $@.tmp $@ && \
|
||||
rm $@.tmp
|
||||
|
||||
# install commands for the unstripped file
|
||||
quiet_cmd_vdso_install = INSTALL $@
|
||||
|
||||
@ -4,34 +4,73 @@
|
||||
*/
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <asm-generic/export.h>
|
||||
|
||||
ENTRY(__lshrti3)
|
||||
SYM_FUNC_START(__lshrti3)
|
||||
beqz a2, .L1
|
||||
li a5,64
|
||||
sub a5,a5,a2
|
||||
addi sp,sp,-16
|
||||
sext.w a4,a5
|
||||
blez a5, .L2
|
||||
sext.w a2,a2
|
||||
sll a4,a1,a4
|
||||
srl a0,a0,a2
|
||||
srl a1,a1,a2
|
||||
sll a4,a1,a4
|
||||
srl a2,a1,a2
|
||||
or a0,a0,a4
|
||||
sd a1,8(sp)
|
||||
sd a0,0(sp)
|
||||
ld a0,0(sp)
|
||||
ld a1,8(sp)
|
||||
addi sp,sp,16
|
||||
ret
|
||||
mv a1,a2
|
||||
.L1:
|
||||
ret
|
||||
.L2:
|
||||
negw a4,a4
|
||||
srl a1,a1,a4
|
||||
sd a1,0(sp)
|
||||
sd zero,8(sp)
|
||||
ld a0,0(sp)
|
||||
ld a1,8(sp)
|
||||
addi sp,sp,16
|
||||
negw a0,a4
|
||||
li a2,0
|
||||
srl a0,a1,a0
|
||||
mv a1,a2
|
||||
ret
|
||||
ENDPROC(__lshrti3)
|
||||
SYM_FUNC_END(__lshrti3)
|
||||
EXPORT_SYMBOL(__lshrti3)
|
||||
|
||||
SYM_FUNC_START(__ashrti3)
|
||||
beqz a2, .L3
|
||||
li a5,64
|
||||
sub a5,a5,a2
|
||||
sext.w a4,a5
|
||||
blez a5, .L4
|
||||
sext.w a2,a2
|
||||
srl a0,a0,a2
|
||||
sll a4,a1,a4
|
||||
sra a2,a1,a2
|
||||
or a0,a0,a4
|
||||
mv a1,a2
|
||||
.L3:
|
||||
ret
|
||||
.L4:
|
||||
negw a0,a4
|
||||
srai a2,a1,0x3f
|
||||
sra a0,a1,a0
|
||||
mv a1,a2
|
||||
ret
|
||||
SYM_FUNC_END(__ashrti3)
|
||||
EXPORT_SYMBOL(__ashrti3)
|
||||
|
||||
SYM_FUNC_START(__ashlti3)
|
||||
beqz a2, .L5
|
||||
li a5,64
|
||||
sub a5,a5,a2
|
||||
sext.w a4,a5
|
||||
blez a5, .L6
|
||||
sext.w a2,a2
|
||||
sll a1,a1,a2
|
||||
srl a4,a0,a4
|
||||
sll a2,a0,a2
|
||||
or a1,a1,a4
|
||||
mv a0,a2
|
||||
.L5:
|
||||
ret
|
||||
.L6:
|
||||
negw a1,a4
|
||||
li a2,0
|
||||
sll a1,a0,a1
|
||||
mv a0,a2
|
||||
ret
|
||||
SYM_FUNC_END(__ashlti3)
|
||||
EXPORT_SYMBOL(__ashlti3)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user