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[MTD] NAND modularize ECC
First step of modularizing ECC support. - Move ECC related functionality into a seperate embedded data structure - Get rid of the hardware dependend constants to simplify new ECC models Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Thomas Gleixner
parent
7aa65bfd67
commit
6dfc6d250d
@ -192,7 +192,7 @@ static int __init ams_delta_init(void)
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}
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/* 25 us command delay time */
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this->chip_delay = 30;
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this->eccmode = NAND_ECC_SOFT;
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this->ecc.mode = NAND_ECC_SOFT;
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/* Set chip enabled, but */
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ams_delta_latch2_write(NAND_MASK, AMS_DELTA_LATCH2_NAND_NRE |
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@ -578,7 +578,7 @@ static int __init au1xxx_nand_init(void)
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/* 30 us command delay time */
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this->chip_delay = 30;
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this->eccmode = NAND_ECC_SOFT;
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this->ecc.mode = NAND_ECC_SOFT;
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this->options = NAND_NO_AUTOINCR;
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@ -163,7 +163,7 @@ static int __init autcpu12_init(void)
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this->dev_ready = autcpu12_device_ready;
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/* 20 us command delay time */
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this->chip_delay = 20;
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this->eccmode = NAND_ECC_SOFT;
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this->ecc.mode = NAND_ECC_SOFT;
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/* Enable the following for a flash based bad block table */
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/*
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@ -242,11 +242,13 @@ static int __init cs553x_init_one(int cs, int mmio, unsigned long adr)
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this->chip_delay = 0;
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this->eccmode = NAND_ECC_HW3_256;
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this->enable_hwecc = cs_enable_hwecc;
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this->calculate_ecc = cs_calculate_ecc;
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this->correct_data = nand_correct_data;
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this->ecc.mode = NAND_ECC_HW;
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this->ecc.size = 256;
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this->ecc.bytes = 3;
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this->ecc.hwctl = cs_enable_hwecc;
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this->ecc.calculate = cs_calculate_ecc;
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this->ecc.correct = nand_correct_data;
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/* Enable the following for a flash based bad block table */
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this->options = NAND_USE_FLASH_BBT | NAND_NO_AUTOINCR;
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@ -1674,12 +1674,14 @@ static int __init doc_probe(unsigned long physadr)
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nand->dev_ready = doc200x_dev_ready;
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nand->waitfunc = doc200x_wait;
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nand->block_bad = doc200x_block_bad;
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nand->enable_hwecc = doc200x_enable_hwecc;
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nand->calculate_ecc = doc200x_calculate_ecc;
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nand->correct_data = doc200x_correct_data;
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nand->ecc.hwctl = doc200x_enable_hwecc;
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nand->ecc.calculate = doc200x_calculate_ecc;
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nand->ecc.correct = doc200x_correct_data;
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nand->autooob = &doc200x_oobinfo;
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nand->eccmode = NAND_ECC_HW6_512;
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nand->ecc.mode = NAND_ECC_HW_SYNDROME;
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nand->ecc.size = 512;
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nand->ecc.bytes = 6;
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nand->options = NAND_USE_FLASH_BBT | NAND_HWECC_SYNDROME;
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doc->physadr = physadr;
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@ -149,7 +149,7 @@ static int __init h1910_init(void)
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this->dev_ready = NULL; /* unknown whether that was correct or not so we will just do it like this */
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/* 15 us command delay time */
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this->chip_delay = 50;
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this->eccmode = NAND_ECC_SOFT;
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this->ecc.mode = NAND_ECC_SOFT;
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this->options = NAND_NO_AUTOINCR;
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/* Scan to find existence of the device */
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@ -879,9 +879,9 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int pag
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{
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int i, status;
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uint8_t ecc_code[32];
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int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
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int eccmode = oobsel->useecc ? this->ecc.mode : NAND_ECC_NONE;
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int *oob_config = oobsel->eccpos;
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int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
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int datidx = 0, eccidx = 0, eccsteps = this->ecc.steps;
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int eccbytes = 0;
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/* FIXME: Enable cached programming */
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@ -901,20 +901,20 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int pag
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/* Software ecc 3/256, write all */
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case NAND_ECC_SOFT:
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for (; eccsteps; eccsteps--) {
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this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
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this->ecc.calculate(mtd, &this->data_poi[datidx], ecc_code);
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for (i = 0; i < 3; i++, eccidx++)
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oob_buf[oob_config[eccidx]] = ecc_code[i];
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datidx += this->eccsize;
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datidx += this->ecc.size;
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}
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this->write_buf(mtd, this->data_poi, mtd->oobblock);
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break;
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default:
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eccbytes = this->eccbytes;
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eccbytes = this->ecc.bytes;
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for (; eccsteps; eccsteps--) {
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/* enable hardware ecc logic for write */
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this->enable_hwecc(mtd, NAND_ECC_WRITE);
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this->write_buf(mtd, &this->data_poi[datidx], this->eccsize);
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this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
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this->ecc.hwctl(mtd, NAND_ECC_WRITE);
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this->write_buf(mtd, &this->data_poi[datidx], this->ecc.size);
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this->ecc.calculate(mtd, &this->data_poi[datidx], ecc_code);
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for (i = 0; i < eccbytes; i++, eccidx++)
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oob_buf[oob_config[eccidx]] = ecc_code[i];
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/* If the hardware ecc provides syndromes then
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@ -922,7 +922,7 @@ static int nand_write_page(struct mtd_info *mtd, struct nand_chip *this, int pag
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* the data bytes (words) */
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if (this->options & NAND_HWECC_SYNDROME)
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this->write_buf(mtd, ecc_code, eccbytes);
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datidx += this->eccsize;
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datidx += this->ecc.size;
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}
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break;
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}
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@ -1155,7 +1155,7 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
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if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
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oobsel = this->autooob;
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eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
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eccmode = oobsel->useecc ? this->ecc.mode : NAND_ECC_NONE;
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oob_config = oobsel->eccpos;
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/* Select the NAND device */
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@ -1170,8 +1170,8 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
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col = from & (mtd->oobblock - 1);
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end = mtd->oobblock;
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ecc = this->eccsize;
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eccbytes = this->eccbytes;
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ecc = this->ecc.size;
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eccbytes = this->ecc.bytes;
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if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME))
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compareecc = 0;
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@ -1216,7 +1216,7 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
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oobsel->useecc == MTD_NANDECC_AUTOPL_USR)
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oob_data = &this->data_buf[end];
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eccsteps = this->eccsteps;
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eccsteps = this->ecc.steps;
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switch (eccmode) {
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case NAND_ECC_NONE:{
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@ -1234,12 +1234,12 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
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case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
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this->read_buf(mtd, data_poi, end);
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for (i = 0, datidx = 0; eccsteps; eccsteps--, i += 3, datidx += ecc)
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this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
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this->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]);
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break;
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default:
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for (i = 0, datidx = 0; eccsteps; eccsteps--, i += eccbytes, datidx += ecc) {
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this->enable_hwecc(mtd, NAND_ECC_READ);
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this->ecc.hwctl(mtd, NAND_ECC_READ);
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this->read_buf(mtd, &data_poi[datidx], ecc);
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/* HW ecc with syndrome calculation must read the
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@ -1247,19 +1247,19 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
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if (!compareecc) {
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/* Some hw ecc generators need to know when the
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* syndrome is read from flash */
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this->enable_hwecc(mtd, NAND_ECC_READSYN);
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this->ecc.hwctl(mtd, NAND_ECC_READSYN);
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this->read_buf(mtd, &oob_data[i], eccbytes);
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/* We calc error correction directly, it checks the hw
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* generator for an error, reads back the syndrome and
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* does the error correction on the fly */
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ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
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ecc_status = this->ecc.correct(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
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if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
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DEBUG(MTD_DEBUG_LEVEL0, "nand_read_ecc: "
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"Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
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ecc_failed++;
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}
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} else {
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this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
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this->ecc.calculate(mtd, &data_poi[datidx], &ecc_calc[i]);
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}
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}
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break;
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@ -1277,8 +1277,8 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
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ecc_code[j] = oob_data[oob_config[j]];
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/* correct data, if necessary */
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for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
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ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
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for (i = 0, j = 0, datidx = 0; i < this->ecc.steps; i++, datidx += ecc) {
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ecc_status = this->ecc.correct(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
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/* Get next chunk of ecc bytes */
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j += eccbytes;
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@ -1315,7 +1315,7 @@ int nand_do_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
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break;
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case MTD_NANDECC_PLACE:
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/* YAFFS1 legacy mode */
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oob_data += this->eccsteps * sizeof(int);
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oob_data += this->ecc.steps * sizeof(int);
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default:
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oob_data += mtd->oobsize;
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}
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@ -2648,99 +2648,49 @@ int nand_scan(struct mtd_info *mtd, int maxchips)
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* check ECC mode, default to software if 3byte/512byte hardware ECC is
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* selected and we have 256 byte pagesize fallback to software ECC
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*/
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this->eccsize = 256;
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this->eccbytes = 3;
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switch (this->ecc.mode) {
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case NAND_ECC_HW:
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case NAND_ECC_HW_SYNDROME:
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if (!this->ecc.calculate || !this->ecc.correct ||
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!this->ecc.hwctl) {
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printk(KERN_WARNING "No ECC functions supplied, "
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"Hardware ECC not possible\n");
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BUG();
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}
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if (mtd->oobblock >= this->ecc.size)
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break;
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printk(KERN_WARNING "%d byte HW ECC not possible on "
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"%d byte page size, fallback to SW ECC\n",
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this->ecc.size, mtd->oobblock);
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this->ecc.mode = NAND_ECC_SOFT;
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switch (this->eccmode) {
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case NAND_ECC_HW12_2048:
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if (mtd->oobblock < 2048) {
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printk(KERN_WARNING "2048 byte HW ECC not possible on "
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"%d byte page size, fallback to SW ECC\n",
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mtd->oobblock);
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this->eccmode = NAND_ECC_SOFT;
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this->calculate_ecc = nand_calculate_ecc;
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this->correct_data = nand_correct_data;
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} else
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this->eccsize = 2048;
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break;
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case NAND_ECC_HW3_512:
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case NAND_ECC_HW6_512:
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case NAND_ECC_HW8_512:
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if (mtd->oobblock == 256) {
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printk(KERN_WARNING "512 byte HW ECC not possible on "
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"256 Byte pagesize, fallback to SW ECC \n");
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this->eccmode = NAND_ECC_SOFT;
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this->calculate_ecc = nand_calculate_ecc;
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this->correct_data = nand_correct_data;
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} else
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this->eccsize = 512; /* set eccsize to 512 */
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break;
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case NAND_ECC_HW3_256:
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case NAND_ECC_SOFT:
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this->ecc.calculate = nand_calculate_ecc;
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this->ecc.correct = nand_correct_data;
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this->ecc.size = 256;
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this->ecc.bytes = 3;
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break;
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case NAND_ECC_NONE:
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printk(KERN_WARNING "NAND_ECC_NONE selected by board driver. "
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"This is not recommended !!\n");
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this->eccmode = NAND_ECC_NONE;
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this->ecc.size = mtd->oobblock;
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this->ecc.bytes = 0;
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break;
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case NAND_ECC_SOFT:
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this->calculate_ecc = nand_calculate_ecc;
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this->correct_data = nand_correct_data;
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break;
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default:
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printk(KERN_WARNING "Invalid NAND_ECC_MODE %d\n",
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this->eccmode);
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this->ecc.mode);
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BUG();
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}
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/*
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* Check hardware ecc function availability and adjust number of ecc
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* bytes per calculation step
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*/
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switch (this->eccmode) {
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case NAND_ECC_HW12_2048:
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this->eccbytes += 4;
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case NAND_ECC_HW8_512:
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this->eccbytes += 2;
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case NAND_ECC_HW6_512:
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this->eccbytes += 3;
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case NAND_ECC_HW3_512:
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case NAND_ECC_HW3_256:
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if (this->calculate_ecc && this->correct_data &&
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this->enable_hwecc)
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break;
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printk(KERN_WARNING "No ECC functions supplied, "
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"Hardware ECC not possible\n");
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BUG();
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}
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mtd->eccsize = this->eccsize;
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/*
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* Set the number of read / write steps for one page depending on ECC
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* mode
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*/
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switch (this->eccmode) {
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case NAND_ECC_HW12_2048:
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this->eccsteps = mtd->oobblock / 2048;
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break;
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case NAND_ECC_HW3_512:
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case NAND_ECC_HW6_512:
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case NAND_ECC_HW8_512:
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this->eccsteps = mtd->oobblock / 512;
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break;
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case NAND_ECC_HW3_256:
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case NAND_ECC_SOFT:
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this->eccsteps = mtd->oobblock / 256;
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break;
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case NAND_ECC_NONE:
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this->eccsteps = 1;
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break;
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this->ecc.steps = mtd->oobblock / this->ecc.size;
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if(this->ecc.steps * this->ecc.size != mtd->oobblock) {
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printk(KERN_WARNING "Invalid ecc parameters\n");
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BUG();
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}
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/* Initialize state, waitqueue and spinlock */
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@ -1523,7 +1523,7 @@ static int __init ns_init_module(void)
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chip->verify_buf = ns_nand_verify_buf;
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chip->write_word = ns_nand_write_word;
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chip->read_word = ns_nand_read_word;
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chip->eccmode = NAND_ECC_SOFT;
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chip->ecc.mode = NAND_ECC_SOFT;
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chip->options |= NAND_SKIP_BBTSCAN;
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/*
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@ -168,10 +168,12 @@ static void ndfc_chip_init(struct ndfc_nand_mtd *mtd)
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chip->read_buf = ndfc_read_buf;
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chip->write_buf = ndfc_write_buf;
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chip->verify_buf = ndfc_verify_buf;
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chip->correct_data = nand_correct_data;
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chip->enable_hwecc = ndfc_enable_hwecc;
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chip->calculate_ecc = ndfc_calculate_ecc;
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chip->eccmode = NAND_ECC_HW3_256;
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chip->ecc.correct = nand_correct_data;
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chip->ecc.hwctl = ndfc_enable_hwecc;
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chip->ecc.calculate = ndfc_calculate_ecc;
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chip->ecc.mode = NAND_ECC_HW;
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chip->ecc.size = 256;
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chip->ecc.bytes = 3;
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chip->autooob = mtd->pl_chip->autooob;
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mtd->mtd.priv = chip;
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mtd->mtd.owner = THIS_MODULE;
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@ -257,7 +257,7 @@ static int __init ppchameleonevb_init(void)
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#endif
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this->chip_delay = NAND_BIG_DELAY_US;
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/* ECC mode */
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this->eccmode = NAND_ECC_SOFT;
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this->ecc.mode = NAND_ECC_SOFT;
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/* Scan to find existence of the device (it could not be mounted) */
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if (nand_scan(ppchameleon_mtd, 1)) {
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@ -358,7 +358,7 @@ static int __init ppchameleonevb_init(void)
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this->chip_delay = NAND_SMALL_DELAY_US;
|
||||
|
||||
/* ECC mode */
|
||||
this->eccmode = NAND_ECC_SOFT;
|
||||
this->ecc.mode = NAND_ECC_SOFT;
|
||||
|
||||
/* Scan to find existence of the device */
|
||||
if (nand_scan(ppchameleonevb_mtd, 1)) {
|
||||
|
||||
@ -570,19 +570,21 @@ static int __init rtc_from4_init(void)
|
||||
#ifdef RTC_FROM4_HWECC
|
||||
printk(KERN_INFO "rtc_from4_init: using hardware ECC detection.\n");
|
||||
|
||||
this->eccmode = NAND_ECC_HW8_512;
|
||||
this->ecc.mode = NAND_ECC_HW_SYNDROME;
|
||||
this->ecc.size = 512;
|
||||
this->ecc.bytes = 8;
|
||||
this->options |= NAND_HWECC_SYNDROME;
|
||||
/* return the status of extra status and ECC checks */
|
||||
this->errstat = rtc_from4_errstat;
|
||||
/* set the nand_oobinfo to support FPGA H/W error detection */
|
||||
this->autooob = &rtc_from4_nand_oobinfo;
|
||||
this->enable_hwecc = rtc_from4_enable_hwecc;
|
||||
this->calculate_ecc = rtc_from4_calculate_ecc;
|
||||
this->correct_data = rtc_from4_correct_data;
|
||||
this->ecc.hwctl = rtc_from4_enable_hwecc;
|
||||
this->ecc.calculate = rtc_from4_calculate_ecc;
|
||||
this->ecc.correct = rtc_from4_correct_data;
|
||||
#else
|
||||
printk(KERN_INFO "rtc_from4_init: using software ECC detection.\n");
|
||||
|
||||
this->eccmode = NAND_ECC_SOFT;
|
||||
this->ecc.mode = NAND_ECC_SOFT;
|
||||
#endif
|
||||
|
||||
/* set the bad block tables to support debugging */
|
||||
|
||||
@ -520,18 +520,20 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
|
||||
nmtd->set = set;
|
||||
|
||||
if (hardware_ecc) {
|
||||
chip->correct_data = s3c2410_nand_correct_data;
|
||||
chip->enable_hwecc = s3c2410_nand_enable_hwecc;
|
||||
chip->calculate_ecc = s3c2410_nand_calculate_ecc;
|
||||
chip->eccmode = NAND_ECC_HW3_512;
|
||||
chip->ecc.correct = s3c2410_nand_correct_data;
|
||||
chip->ecc.hwctl = s3c2410_nand_enable_hwecc;
|
||||
chip->ecc.calculate = s3c2410_nand_calculate_ecc;
|
||||
chip->ecc.mode = NAND_ECC_HW;
|
||||
chip->ecc.size = 512;
|
||||
chip->ecc.bytes = 3;
|
||||
chip->autooob = &nand_hw_eccoob;
|
||||
|
||||
if (info->is_s3c2440) {
|
||||
chip->enable_hwecc = s3c2440_nand_enable_hwecc;
|
||||
chip->calculate_ecc = s3c2440_nand_calculate_ecc;
|
||||
chip->ecc.hwctl = s3c2440_nand_enable_hwecc;
|
||||
chip->ecc.calculate = s3c2440_nand_calculate_ecc;
|
||||
}
|
||||
} else {
|
||||
chip->eccmode = NAND_ECC_SOFT;
|
||||
chip->ecc.mode = NAND_ECC_SOFT;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@ -201,15 +201,17 @@ static int __init sharpsl_nand_init(void)
|
||||
/* 15 us command delay time */
|
||||
this->chip_delay = 15;
|
||||
/* set eccmode using hardware ECC */
|
||||
this->eccmode = NAND_ECC_HW3_256;
|
||||
this->ecc.mode = NAND_ECC_HW;
|
||||
this->ecc.size = 256;
|
||||
this->ecc.bytes = 3;
|
||||
this->badblock_pattern = &sharpsl_bbt;
|
||||
if (machine_is_akita() || machine_is_borzoi()) {
|
||||
this->badblock_pattern = &sharpsl_akita_bbt;
|
||||
this->autooob = &akita_oobinfo;
|
||||
}
|
||||
this->enable_hwecc = sharpsl_nand_enable_hwecc;
|
||||
this->calculate_ecc = sharpsl_nand_calculate_ecc;
|
||||
this->correct_data = nand_correct_data;
|
||||
this->ecc.hwctl = sharpsl_nand_enable_hwecc;
|
||||
this->ecc.calculate = sharpsl_nand_calculate_ecc;
|
||||
this->ecc.correct = nand_correct_data;
|
||||
|
||||
/* Scan to find existence of the device */
|
||||
err = nand_scan(sharpsl_mtd, 1);
|
||||
|
||||
@ -146,7 +146,7 @@ static int __init toto_init(void)
|
||||
this->dev_ready = NULL;
|
||||
/* 25 us command delay time */
|
||||
this->chip_delay = 30;
|
||||
this->eccmode = NAND_ECC_SOFT;
|
||||
this->ecc.mode = NAND_ECC_SOFT;
|
||||
|
||||
/* Scan to find existance of the device */
|
||||
if (nand_scan(toto_mtd, 1)) {
|
||||
|
||||
@ -155,7 +155,7 @@ static int __init ts7250_init(void)
|
||||
this->hwcontrol = ts7250_hwcontrol;
|
||||
this->dev_ready = ts7250_device_ready;
|
||||
this->chip_delay = 15;
|
||||
this->eccmode = NAND_ECC_SOFT;
|
||||
this->ecc.mode = NAND_ECC_SOFT;
|
||||
|
||||
printk("Searching for NAND flash...\n");
|
||||
/* Scan to find existence of the device */
|
||||
|
||||
@ -113,21 +113,12 @@ extern int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from,
|
||||
/*
|
||||
* Constants for ECC_MODES
|
||||
*/
|
||||
|
||||
/* No ECC. Usage is not recommended ! */
|
||||
#define NAND_ECC_NONE 0
|
||||
/* Software ECC 3 byte ECC per 256 Byte data */
|
||||
#define NAND_ECC_SOFT 1
|
||||
/* Hardware ECC 3 byte ECC per 256 Byte data */
|
||||
#define NAND_ECC_HW3_256 2
|
||||
/* Hardware ECC 3 byte ECC per 512 Byte data */
|
||||
#define NAND_ECC_HW3_512 3
|
||||
/* Hardware ECC 3 byte ECC per 512 Byte data */
|
||||
#define NAND_ECC_HW6_512 4
|
||||
/* Hardware ECC 8 byte ECC per 512 Byte data */
|
||||
#define NAND_ECC_HW8_512 6
|
||||
/* Hardware ECC 12 byte ECC per 2048 Byte data */
|
||||
#define NAND_ECC_HW12_2048 7
|
||||
typedef enum {
|
||||
NAND_ECC_NONE,
|
||||
NAND_ECC_SOFT,
|
||||
NAND_ECC_HW,
|
||||
NAND_ECC_HW_SYNDROME,
|
||||
} nand_ecc_modes_t;
|
||||
|
||||
/*
|
||||
* Constants for Hardware ECC
|
||||
@ -230,6 +221,31 @@ struct nand_hw_control {
|
||||
wait_queue_head_t wq;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_ecc_ctrl - Control structure for ecc
|
||||
* @mode: ecc mode
|
||||
* @steps: number of ecc steps per page
|
||||
* @size: data bytes per ecc step
|
||||
* @bytes: ecc bytes per step
|
||||
* @hwctl: function to control hardware ecc generator. Must only
|
||||
* be provided if an hardware ECC is available
|
||||
* @calculate: function for ecc calculation or readback from ecc hardware
|
||||
* @correct: function for ecc correction, matching to ecc generator (sw/hw)
|
||||
*/
|
||||
struct nand_ecc_ctrl {
|
||||
nand_ecc_modes_t mode;
|
||||
int steps;
|
||||
int size;
|
||||
int bytes;
|
||||
int (*hwctl)(struct mtd_info *mtd, int mode);
|
||||
int (*calculate)(struct mtd_info *mtd,
|
||||
const uint8_t *dat,
|
||||
uint8_t *ecc_code);
|
||||
int (*correct)(struct mtd_info *mtd, uint8_t *dat,
|
||||
uint8_t *read_ecc,
|
||||
uint8_t *calc_ecc);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_chip - NAND Private Flash Chip Data
|
||||
* @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device
|
||||
@ -250,16 +266,9 @@ struct nand_hw_control {
|
||||
* is read from the chip status register
|
||||
* @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip
|
||||
* @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready
|
||||
* @calculate_ecc: [REPLACEABLE] function for ecc calculation or readback from ecc hardware
|
||||
* @correct_data: [REPLACEABLE] function for ecc correction, matching to ecc generator (sw/hw)
|
||||
* @enable_hwecc: [BOARDSPECIFIC] function to enable (reset) hardware ecc generator. Must only
|
||||
* be provided if a hardware ECC is available
|
||||
* @ecc: [BOARDSPECIFIC] ecc control ctructure
|
||||
* @erase_cmd: [INTERN] erase command write function, selectable due to AND support
|
||||
* @scan_bbt: [REPLACEABLE] function to scan bad block table
|
||||
* @eccmode: [BOARDSPECIFIC] mode of ecc, see defines
|
||||
* @eccsize: [INTERN] databytes used per ecc-calculation
|
||||
* @eccbytes: [INTERN] number of ecc bytes per ecc-calculation step
|
||||
* @eccsteps: [INTERN] number of ecc calculation steps per page
|
||||
* @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR)
|
||||
* @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress
|
||||
* @state: [INTERN] the current state of the NAND device
|
||||
@ -309,15 +318,9 @@ struct nand_chip {
|
||||
int (*dev_ready)(struct mtd_info *mtd);
|
||||
void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr);
|
||||
int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this, int state);
|
||||
int (*calculate_ecc)(struct mtd_info *mtd, const uint8_t *dat, uint8_t *ecc_code);
|
||||
int (*correct_data)(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc);
|
||||
void (*enable_hwecc)(struct mtd_info *mtd, int mode);
|
||||
void (*erase_cmd)(struct mtd_info *mtd, int page);
|
||||
int (*scan_bbt)(struct mtd_info *mtd);
|
||||
int eccmode;
|
||||
int eccsize;
|
||||
int eccbytes;
|
||||
int eccsteps;
|
||||
struct nand_ecc_ctrl ecc;
|
||||
int chip_delay;
|
||||
wait_queue_head_t wq;
|
||||
nand_state_t state;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user