tg3: Add 5784 ASIC rev to earlier PCIe MPS fix

tg3 commit e712699734 entitled
"tg3: Preserve PCIe MPS setting for new devs" attempted to ensure the
PCIe link negotiated Maximum Payload Size (MPS) setting was 128 bytes
for all devices that didn't support higher speeds.  The 5784 device was
mistakenly added to this list when it shouldn't have.  This patch
removes the 5784 ASIC rev devices from that list.

Reviewed-by: Benjamin Li <benli@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Matt Carlson 2010-08-02 11:25:55 +00:00 committed by David S. Miller
parent 83bf2e4089
commit 6de34cb963

View File

@ -7002,8 +7002,7 @@ static int tg3_chip_reset(struct tg3 *tp)
* Older PCIe devices only support the 128 byte
* MPS setting. Enforce the restriction.
*/
if (!(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT) ||
(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784))
if (!(tp->tg3_flags & TG3_FLAG_CPMU_PRESENT))
val16 &= ~PCI_EXP_DEVCTL_PAYLOAD;
pci_write_config_word(tp->pdev,
tp->pcie_cap + PCI_EXP_DEVCTL,