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[media] mt2063: Move data structures to the driver
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Mauro Carvalho Chehab
parent
f867695a0f
commit
6d3d748a62
@ -12,6 +12,534 @@
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static unsigned int verbose;
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module_param(verbose, int, 0644);
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/* Internal structures and types */
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#define DVBFE_TUNER_OPEN 99
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#define DVBFE_TUNER_SOFTWARE_SHUTDOWN 100
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#define DVBFE_TUNER_CLEAR_POWER_MASKBITS 101
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#define MT2063_ERROR (1 << 31)
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#define MT2063_USER_ERROR (1 << 30)
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/* Macro to be used to check for errors */
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#define MT2063_IS_ERROR(s) (((s) >> 30) != 0)
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#define MT2063_NO_ERROR(s) (((s) >> 30) == 0)
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#define MT2063_OK (0x00000000)
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/* Unknown error */
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#define MT2063_UNKNOWN (0x80000001)
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/* Error: Upconverter PLL is not locked */
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#define MT2063_UPC_UNLOCK (0x80000002)
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/* Error: Downconverter PLL is not locked */
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#define MT2063_DNC_UNLOCK (0x80000004)
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/* Error: Two-wire serial bus communications error */
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#define MT2063_COMM_ERR (0x80000008)
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/* Error: Tuner handle passed to function was invalid */
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#define MT2063_INV_HANDLE (0x80000010)
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/* Error: Function argument is invalid (out of range) */
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#define MT2063_ARG_RANGE (0x80000020)
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/* Error: Function argument (ptr to return value) was NULL */
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#define MT2063_ARG_NULL (0x80000040)
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/* Error: Attempt to open more than MT_TUNER_CNT tuners */
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#define MT2063_TUNER_CNT_ERR (0x80000080)
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/* Error: Tuner Part Code / Rev Code mismatches expected value */
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#define MT2063_TUNER_ID_ERR (0x80000100)
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/* Error: Tuner Initialization failure */
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#define MT2063_TUNER_INIT_ERR (0x80000200)
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#define MT2063_TUNER_OPEN_ERR (0x80000400)
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/* User-definable fields (see mt_userdef.h) */
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#define MT2063_USER_DEFINED1 (0x00001000)
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#define MT2063_USER_DEFINED2 (0x00002000)
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#define MT2063_USER_DEFINED3 (0x00004000)
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#define MT2063_USER_DEFINED4 (0x00008000)
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#define MT2063_USER_MASK (0x4000f000)
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#define MT2063_USER_SHIFT (12)
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/* Info: Mask of bits used for # of LO-related spurs that were avoided during tuning */
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#define MT2063_SPUR_CNT_MASK (0x001f0000)
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#define MT2063_SPUR_SHIFT (16)
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/* Info: Tuner timeout waiting for condition */
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#define MT2063_TUNER_TIMEOUT (0x00400000)
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/* Info: Unavoidable LO-related spur may be present in the output */
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#define MT2063_SPUR_PRESENT_ERR (0x00800000)
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/* Info: Tuner input frequency is out of range */
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#define MT2063_FIN_RANGE (0x01000000)
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/* Info: Tuner output frequency is out of range */
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#define MT2063_FOUT_RANGE (0x02000000)
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/* Info: Upconverter frequency is out of range (may be reason for MT_UPC_UNLOCK) */
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#define MT2063_UPC_RANGE (0x04000000)
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/* Info: Downconverter frequency is out of range (may be reason for MT_DPC_UNLOCK) */
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#define MT2063_DNC_RANGE (0x08000000)
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/*
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* Data Types
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*/
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#define MAX_UDATA (4294967295) /* max value storable in u32 */
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/*
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* Define an MTxxxx_CNT macro for each type of tuner that will be built
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* into your application (e.g., MT2121, MT2060). MT_TUNER_CNT
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* must be set to the SUM of all of the MTxxxx_CNT macros.
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*
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* #define MT2050_CNT (1)
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* #define MT2060_CNT (1)
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* #define MT2111_CNT (1)
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* #define MT2121_CNT (3)
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*/
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#define MT2063_TUNER_CNT (1) /* total num of MicroTuner tuners */
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#define MT2063_I2C (0xC0)
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/*
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* Constant defining the version of the following structure
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* and therefore the API for this code.
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*
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* When compiling the tuner driver, the preprocessor will
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* check against this version number to make sure that
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* it matches the version that the tuner driver knows about.
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*/
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/* Version 010201 => 1.21 */
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#define MT2063_AVOID_SPURS_INFO_VERSION 010201
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/* DECT Frequency Avoidance */
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#define MT2063_DECT_AVOID_US_FREQS 0x00000001
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#define MT2063_DECT_AVOID_EURO_FREQS 0x00000002
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#define MT2063_EXCLUDE_US_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_US_FREQS) != 0)
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#define MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_EURO_FREQS) != 0)
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enum MT2063_DECT_Avoid_Type {
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MT2063_NO_DECT_AVOIDANCE = 0, /* Do not create DECT exclusion zones. */
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MT2063_AVOID_US_DECT = MT2063_DECT_AVOID_US_FREQS, /* Avoid US DECT frequencies. */
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MT2063_AVOID_EURO_DECT = MT2063_DECT_AVOID_EURO_FREQS, /* Avoid European DECT frequencies. */
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MT2063_AVOID_BOTH /* Avoid both regions. Not typically used. */
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};
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#define MT2063_MAX_ZONES 48
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struct MT2063_ExclZone_t;
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struct MT2063_ExclZone_t {
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u32 min_;
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u32 max_;
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struct MT2063_ExclZone_t *next_;
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};
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/*
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* Structure of data needed for Spur Avoidance
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*/
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struct MT2063_AvoidSpursData_t {
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u32 nAS_Algorithm;
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u32 f_ref;
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u32 f_in;
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u32 f_LO1;
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u32 f_if1_Center;
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u32 f_if1_Request;
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u32 f_if1_bw;
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u32 f_LO2;
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u32 f_out;
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u32 f_out_bw;
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u32 f_LO1_Step;
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u32 f_LO2_Step;
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u32 f_LO1_FracN_Avoid;
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u32 f_LO2_FracN_Avoid;
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u32 f_zif_bw;
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u32 f_min_LO_Separation;
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u32 maxH1;
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u32 maxH2;
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enum MT2063_DECT_Avoid_Type avoidDECT;
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u32 bSpurPresent;
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u32 bSpurAvoided;
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u32 nSpursFound;
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u32 nZones;
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struct MT2063_ExclZone_t *freeZones;
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struct MT2063_ExclZone_t *usedZones;
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struct MT2063_ExclZone_t MT2063_ExclZones[MT2063_MAX_ZONES];
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};
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/*
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* Values returned by the MT2063's on-chip temperature sensor
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* to be read/written.
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*/
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enum MT2063_Temperature {
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MT2063_T_0C = 0, /* Temperature approx 0C */
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MT2063_T_10C, /* Temperature approx 10C */
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MT2063_T_20C, /* Temperature approx 20C */
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MT2063_T_30C, /* Temperature approx 30C */
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MT2063_T_40C, /* Temperature approx 40C */
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MT2063_T_50C, /* Temperature approx 50C */
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MT2063_T_60C, /* Temperature approx 60C */
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MT2063_T_70C, /* Temperature approx 70C */
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MT2063_T_80C, /* Temperature approx 80C */
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MT2063_T_90C, /* Temperature approx 90C */
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MT2063_T_100C, /* Temperature approx 100C */
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MT2063_T_110C, /* Temperature approx 110C */
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MT2063_T_120C, /* Temperature approx 120C */
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MT2063_T_130C, /* Temperature approx 130C */
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MT2063_T_140C, /* Temperature approx 140C */
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MT2063_T_150C, /* Temperature approx 150C */
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};
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/*
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* Parameters for selecting GPIO bits
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*/
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enum MT2063_GPIO_Attr {
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MT2063_GPIO_IN,
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MT2063_GPIO_DIR,
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MT2063_GPIO_OUT,
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};
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enum MT2063_GPIO_ID {
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MT2063_GPIO0,
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MT2063_GPIO1,
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MT2063_GPIO2,
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};
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/*
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* Parameter for function MT2063_SetExtSRO that specifies the external
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* SRO drive frequency.
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*
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* MT2063_EXT_SRO_OFF is the power-up default value.
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*/
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enum MT2063_Ext_SRO {
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MT2063_EXT_SRO_OFF, /* External SRO drive off */
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MT2063_EXT_SRO_BY_4, /* External SRO drive divide by 4 */
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MT2063_EXT_SRO_BY_2, /* External SRO drive divide by 2 */
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MT2063_EXT_SRO_BY_1 /* External SRO drive divide by 1 */
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};
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/*
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* Parameter for function MT2063_SetPowerMask that specifies the power down
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* of various sections of the MT2063.
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*/
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enum MT2063_Mask_Bits {
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MT2063_REG_SD = 0x0040, /* Shutdown regulator */
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MT2063_SRO_SD = 0x0020, /* Shutdown SRO */
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MT2063_AFC_SD = 0x0010, /* Shutdown AFC A/D */
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MT2063_PD_SD = 0x0002, /* Enable power detector shutdown */
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MT2063_PDADC_SD = 0x0001, /* Enable power detector A/D shutdown */
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MT2063_VCO_SD = 0x8000, /* Enable VCO shutdown */
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MT2063_LTX_SD = 0x4000, /* Enable LTX shutdown */
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MT2063_LT1_SD = 0x2000, /* Enable LT1 shutdown */
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MT2063_LNA_SD = 0x1000, /* Enable LNA shutdown */
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MT2063_UPC_SD = 0x0800, /* Enable upconverter shutdown */
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MT2063_DNC_SD = 0x0400, /* Enable downconverter shutdown */
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MT2063_VGA_SD = 0x0200, /* Enable VGA shutdown */
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MT2063_AMP_SD = 0x0100, /* Enable AMP shutdown */
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MT2063_ALL_SD = 0xFF73, /* All shutdown bits for this tuner */
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MT2063_NONE_SD = 0x0000 /* No shutdown bits */
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};
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/*
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* Parameter for function MT2063_GetParam & MT2063_SetParam that
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* specifies the tuning algorithm parameter to be read/written.
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*/
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enum MT2063_Param {
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/* tuner address set by MT2063_Open() */
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MT2063_IC_ADDR,
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/* max number of MT2063 tuners set by MT_TUNER_CNT in mt_userdef.h */
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MT2063_MAX_OPEN,
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/* current number of open MT2063 tuners set by MT2063_Open() */
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MT2063_NUM_OPEN,
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/* crystal frequency (default: 16000000 Hz) */
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MT2063_SRO_FREQ,
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/* min tuning step size (default: 50000 Hz) */
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MT2063_STEPSIZE,
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/* input center frequency set by MT2063_Tune() */
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MT2063_INPUT_FREQ,
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/* LO1 Frequency set by MT2063_Tune() */
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MT2063_LO1_FREQ,
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/* LO1 minimum step size (default: 250000 Hz) */
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MT2063_LO1_STEPSIZE,
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/* LO1 FracN keep-out region (default: 999999 Hz) */
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MT2063_LO1_FRACN_AVOID_PARAM,
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/* Current 1st IF in use set by MT2063_Tune() */
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MT2063_IF1_ACTUAL,
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/* Requested 1st IF set by MT2063_Tune() */
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MT2063_IF1_REQUEST,
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/* Center of 1st IF SAW filter (default: 1218000000 Hz) */
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MT2063_IF1_CENTER,
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/* Bandwidth of 1st IF SAW filter (default: 20000000 Hz) */
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MT2063_IF1_BW,
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/* zero-IF bandwidth (default: 2000000 Hz) */
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MT2063_ZIF_BW,
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/* LO2 Frequency set by MT2063_Tune() */
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MT2063_LO2_FREQ,
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/* LO2 minimum step size (default: 50000 Hz) */
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MT2063_LO2_STEPSIZE,
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/* LO2 FracN keep-out region (default: 374999 Hz) */
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MT2063_LO2_FRACN_AVOID,
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/* output center frequency set by MT2063_Tune() */
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MT2063_OUTPUT_FREQ,
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/* output bandwidth set by MT2063_Tune() */
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MT2063_OUTPUT_BW,
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/* min inter-tuner LO separation (default: 1000000 Hz) */
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MT2063_LO_SEPARATION,
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/* ID of avoid-spurs algorithm in use compile-time constant */
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MT2063_AS_ALG,
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/* max # of intra-tuner harmonics (default: 15) */
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MT2063_MAX_HARM1,
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/* max # of inter-tuner harmonics (default: 7) */
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MT2063_MAX_HARM2,
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/* # of 1st IF exclusion zones used set by MT2063_Tune() */
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MT2063_EXCL_ZONES,
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/* # of spurs found/avoided set by MT2063_Tune() */
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MT2063_NUM_SPURS,
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/* >0 spurs avoided set by MT2063_Tune() */
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MT2063_SPUR_AVOIDED,
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/* >0 spurs in output (mathematically) set by MT2063_Tune() */
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MT2063_SPUR_PRESENT,
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/* Receiver Mode for some parameters. 1 is DVB-T */
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MT2063_RCVR_MODE,
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/* directly set LNA attenuation, parameter is value to set */
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MT2063_ACLNA,
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/* maximum LNA attenuation, parameter is value to set */
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MT2063_ACLNA_MAX,
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/* directly set ATN attenuation. Paremeter is value to set. */
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MT2063_ACRF,
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/* maxium ATN attenuation. Paremeter is value to set. */
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MT2063_ACRF_MAX,
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/* directly set FIF attenuation. Paremeter is value to set. */
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MT2063_ACFIF,
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/* maxium FIF attenuation. Paremeter is value to set. */
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MT2063_ACFIF_MAX,
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/* LNA Rin */
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MT2063_LNA_RIN,
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/* Power Detector LNA level target */
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MT2063_LNA_TGT,
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/* Power Detector 1 level */
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MT2063_PD1,
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/* Power Detector 1 level target */
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MT2063_PD1_TGT,
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/* Power Detector 2 level */
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MT2063_PD2,
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/* Power Detector 2 level target */
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MT2063_PD2_TGT,
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/* Selects, which DNC is activ */
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MT2063_DNC_OUTPUT_ENABLE,
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/* VGA gain code */
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MT2063_VGAGC,
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/* VGA bias current */
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MT2063_VGAOI,
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/* TAGC, determins the speed of the AGC */
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MT2063_TAGC,
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/* AMP gain code */
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MT2063_AMPGC,
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/* Control setting to avoid DECT freqs (default: MT_AVOID_BOTH) */
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MT2063_AVOID_DECT,
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/* Cleartune filter selection: 0 - by IC (default), 1 - by software */
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MT2063_CTFILT_SW,
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MT2063_EOP /* last entry in enumerated list */
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};
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/*
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* Parameter for selecting tuner mode
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*/
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enum MT2063_RCVR_MODES {
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MT2063_CABLE_QAM = 0, /* Digital cable */
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MT2063_CABLE_ANALOG, /* Analog cable */
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MT2063_OFFAIR_COFDM, /* Digital offair */
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MT2063_OFFAIR_COFDM_SAWLESS, /* Digital offair without SAW */
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MT2063_OFFAIR_ANALOG, /* Analog offair */
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MT2063_OFFAIR_8VSB, /* Analog offair */
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MT2063_NUM_RCVR_MODES
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};
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/*
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* Possible values for MT2063_DNC_OUTPUT
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*/
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enum MT2063_DNC_Output_Enable {
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MT2063_DNC_NONE = 0,
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MT2063_DNC_1,
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MT2063_DNC_2,
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MT2063_DNC_BOTH
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};
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/*
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** Two-wire serial bus subaddresses of the tuner registers.
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** Also known as the tuner's register addresses.
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*/
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enum MT2063_Register_Offsets {
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MT2063_REG_PART_REV = 0, /* 0x00: Part/Rev Code */
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MT2063_REG_LO1CQ_1, /* 0x01: LO1C Queued Byte 1 */
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MT2063_REG_LO1CQ_2, /* 0x02: LO1C Queued Byte 2 */
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MT2063_REG_LO2CQ_1, /* 0x03: LO2C Queued Byte 1 */
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MT2063_REG_LO2CQ_2, /* 0x04: LO2C Queued Byte 2 */
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MT2063_REG_LO2CQ_3, /* 0x05: LO2C Queued Byte 3 */
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MT2063_REG_RSVD_06, /* 0x06: Reserved */
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MT2063_REG_LO_STATUS, /* 0x07: LO Status */
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MT2063_REG_FIFFC, /* 0x08: FIFF Center */
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MT2063_REG_CLEARTUNE, /* 0x09: ClearTune Filter */
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MT2063_REG_ADC_OUT, /* 0x0A: ADC_OUT */
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MT2063_REG_LO1C_1, /* 0x0B: LO1C Byte 1 */
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MT2063_REG_LO1C_2, /* 0x0C: LO1C Byte 2 */
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MT2063_REG_LO2C_1, /* 0x0D: LO2C Byte 1 */
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MT2063_REG_LO2C_2, /* 0x0E: LO2C Byte 2 */
|
||||
MT2063_REG_LO2C_3, /* 0x0F: LO2C Byte 3 */
|
||||
MT2063_REG_RSVD_10, /* 0x10: Reserved */
|
||||
MT2063_REG_PWR_1, /* 0x11: PWR Byte 1 */
|
||||
MT2063_REG_PWR_2, /* 0x12: PWR Byte 2 */
|
||||
MT2063_REG_TEMP_STATUS, /* 0x13: Temp Status */
|
||||
MT2063_REG_XO_STATUS, /* 0x14: Crystal Status */
|
||||
MT2063_REG_RF_STATUS, /* 0x15: RF Attn Status */
|
||||
MT2063_REG_FIF_STATUS, /* 0x16: FIF Attn Status */
|
||||
MT2063_REG_LNA_OV, /* 0x17: LNA Attn Override */
|
||||
MT2063_REG_RF_OV, /* 0x18: RF Attn Override */
|
||||
MT2063_REG_FIF_OV, /* 0x19: FIF Attn Override */
|
||||
MT2063_REG_LNA_TGT, /* 0x1A: Reserved */
|
||||
MT2063_REG_PD1_TGT, /* 0x1B: Pwr Det 1 Target */
|
||||
MT2063_REG_PD2_TGT, /* 0x1C: Pwr Det 2 Target */
|
||||
MT2063_REG_RSVD_1D, /* 0x1D: Reserved */
|
||||
MT2063_REG_RSVD_1E, /* 0x1E: Reserved */
|
||||
MT2063_REG_RSVD_1F, /* 0x1F: Reserved */
|
||||
MT2063_REG_RSVD_20, /* 0x20: Reserved */
|
||||
MT2063_REG_BYP_CTRL, /* 0x21: Bypass Control */
|
||||
MT2063_REG_RSVD_22, /* 0x22: Reserved */
|
||||
MT2063_REG_RSVD_23, /* 0x23: Reserved */
|
||||
MT2063_REG_RSVD_24, /* 0x24: Reserved */
|
||||
MT2063_REG_RSVD_25, /* 0x25: Reserved */
|
||||
MT2063_REG_RSVD_26, /* 0x26: Reserved */
|
||||
MT2063_REG_RSVD_27, /* 0x27: Reserved */
|
||||
MT2063_REG_FIFF_CTRL, /* 0x28: FIFF Control */
|
||||
MT2063_REG_FIFF_OFFSET, /* 0x29: FIFF Offset */
|
||||
MT2063_REG_CTUNE_CTRL, /* 0x2A: Reserved */
|
||||
MT2063_REG_CTUNE_OV, /* 0x2B: Reserved */
|
||||
MT2063_REG_CTRL_2C, /* 0x2C: Reserved */
|
||||
MT2063_REG_FIFF_CTRL2, /* 0x2D: Fiff Control */
|
||||
MT2063_REG_RSVD_2E, /* 0x2E: Reserved */
|
||||
MT2063_REG_DNC_GAIN, /* 0x2F: DNC Control */
|
||||
MT2063_REG_VGA_GAIN, /* 0x30: VGA Gain Ctrl */
|
||||
MT2063_REG_RSVD_31, /* 0x31: Reserved */
|
||||
MT2063_REG_TEMP_SEL, /* 0x32: Temperature Selection */
|
||||
MT2063_REG_RSVD_33, /* 0x33: Reserved */
|
||||
MT2063_REG_RSVD_34, /* 0x34: Reserved */
|
||||
MT2063_REG_RSVD_35, /* 0x35: Reserved */
|
||||
MT2063_REG_RSVD_36, /* 0x36: Reserved */
|
||||
MT2063_REG_RSVD_37, /* 0x37: Reserved */
|
||||
MT2063_REG_RSVD_38, /* 0x38: Reserved */
|
||||
MT2063_REG_RSVD_39, /* 0x39: Reserved */
|
||||
MT2063_REG_RSVD_3A, /* 0x3A: Reserved */
|
||||
MT2063_REG_RSVD_3B, /* 0x3B: Reserved */
|
||||
MT2063_REG_RSVD_3C, /* 0x3C: Reserved */
|
||||
MT2063_REG_END_REGS
|
||||
};
|
||||
|
||||
struct MT2063_Info_t {
|
||||
void *handle;
|
||||
void *hUserData;
|
||||
u32 address;
|
||||
u32 version;
|
||||
u32 tuner_id;
|
||||
struct MT2063_AvoidSpursData_t AS_Data;
|
||||
u32 f_IF1_actual;
|
||||
u32 rcvr_mode;
|
||||
u32 ctfilt_sw;
|
||||
u32 CTFiltMax[31];
|
||||
u32 num_regs;
|
||||
u8 reg[MT2063_REG_END_REGS];
|
||||
};
|
||||
typedef struct MT2063_Info_t *pMT2063_Info_t;
|
||||
|
||||
enum MTTune_atv_standard {
|
||||
MTTUNEA_UNKNOWN = 0,
|
||||
MTTUNEA_PAL_B,
|
||||
MTTUNEA_PAL_G,
|
||||
MTTUNEA_PAL_I,
|
||||
MTTUNEA_PAL_L,
|
||||
MTTUNEA_PAL_MN,
|
||||
MTTUNEA_PAL_DK,
|
||||
MTTUNEA_DIGITAL,
|
||||
MTTUNEA_FMRADIO,
|
||||
MTTUNEA_DVBC,
|
||||
MTTUNEA_DVBT
|
||||
};
|
||||
|
||||
|
||||
struct mt2063_state {
|
||||
struct i2c_adapter *i2c;
|
||||
|
||||
const struct mt2063_config *config;
|
||||
struct dvb_tuner_ops ops;
|
||||
struct dvb_frontend *frontend;
|
||||
struct tuner_state status;
|
||||
struct MT2063_Info_t *MT2063_ht;
|
||||
bool MT2063_init;
|
||||
|
||||
enum MTTune_atv_standard tv_type;
|
||||
u32 frequency;
|
||||
u32 srate;
|
||||
u32 bandwidth;
|
||||
u32 reference;
|
||||
};
|
||||
|
||||
/* Prototypes */
|
||||
static void MT2063_AddExclZone(struct MT2063_AvoidSpursData_t *pAS_Info,
|
||||
@ -150,7 +678,6 @@ unsigned int tuner_MT2063_ClearPowerMaskBits(struct dvb_frontend *fe)
|
||||
|
||||
/*****************/
|
||||
|
||||
|
||||
//i2c operation
|
||||
static int mt2063_writeregs(struct mt2063_state *state, u8 reg1,
|
||||
u8 * data, int len)
|
||||
|
||||
@ -3,537 +3,11 @@
|
||||
|
||||
#include "dvb_frontend.h"
|
||||
|
||||
#define DVBFE_TUNER_OPEN 99
|
||||
#define DVBFE_TUNER_SOFTWARE_SHUTDOWN 100
|
||||
#define DVBFE_TUNER_CLEAR_POWER_MASKBITS 101
|
||||
|
||||
#define MT2063_ERROR (1 << 31)
|
||||
#define MT2063_USER_ERROR (1 << 30)
|
||||
|
||||
/* Macro to be used to check for errors */
|
||||
#define MT2063_IS_ERROR(s) (((s) >> 30) != 0)
|
||||
#define MT2063_NO_ERROR(s) (((s) >> 30) == 0)
|
||||
|
||||
#define MT2063_OK (0x00000000)
|
||||
|
||||
/* Unknown error */
|
||||
#define MT2063_UNKNOWN (0x80000001)
|
||||
|
||||
/* Error: Upconverter PLL is not locked */
|
||||
#define MT2063_UPC_UNLOCK (0x80000002)
|
||||
|
||||
/* Error: Downconverter PLL is not locked */
|
||||
#define MT2063_DNC_UNLOCK (0x80000004)
|
||||
|
||||
/* Error: Two-wire serial bus communications error */
|
||||
#define MT2063_COMM_ERR (0x80000008)
|
||||
|
||||
/* Error: Tuner handle passed to function was invalid */
|
||||
#define MT2063_INV_HANDLE (0x80000010)
|
||||
|
||||
/* Error: Function argument is invalid (out of range) */
|
||||
#define MT2063_ARG_RANGE (0x80000020)
|
||||
|
||||
/* Error: Function argument (ptr to return value) was NULL */
|
||||
#define MT2063_ARG_NULL (0x80000040)
|
||||
|
||||
/* Error: Attempt to open more than MT_TUNER_CNT tuners */
|
||||
#define MT2063_TUNER_CNT_ERR (0x80000080)
|
||||
|
||||
/* Error: Tuner Part Code / Rev Code mismatches expected value */
|
||||
#define MT2063_TUNER_ID_ERR (0x80000100)
|
||||
|
||||
/* Error: Tuner Initialization failure */
|
||||
#define MT2063_TUNER_INIT_ERR (0x80000200)
|
||||
|
||||
#define MT2063_TUNER_OPEN_ERR (0x80000400)
|
||||
|
||||
/* User-definable fields (see mt_userdef.h) */
|
||||
#define MT2063_USER_DEFINED1 (0x00001000)
|
||||
#define MT2063_USER_DEFINED2 (0x00002000)
|
||||
#define MT2063_USER_DEFINED3 (0x00004000)
|
||||
#define MT2063_USER_DEFINED4 (0x00008000)
|
||||
#define MT2063_USER_MASK (0x4000f000)
|
||||
#define MT2063_USER_SHIFT (12)
|
||||
|
||||
/* Info: Mask of bits used for # of LO-related spurs that were avoided during tuning */
|
||||
#define MT2063_SPUR_CNT_MASK (0x001f0000)
|
||||
#define MT2063_SPUR_SHIFT (16)
|
||||
|
||||
/* Info: Tuner timeout waiting for condition */
|
||||
#define MT2063_TUNER_TIMEOUT (0x00400000)
|
||||
|
||||
/* Info: Unavoidable LO-related spur may be present in the output */
|
||||
#define MT2063_SPUR_PRESENT_ERR (0x00800000)
|
||||
|
||||
/* Info: Tuner input frequency is out of range */
|
||||
#define MT2063_FIN_RANGE (0x01000000)
|
||||
|
||||
/* Info: Tuner output frequency is out of range */
|
||||
#define MT2063_FOUT_RANGE (0x02000000)
|
||||
|
||||
/* Info: Upconverter frequency is out of range (may be reason for MT_UPC_UNLOCK) */
|
||||
#define MT2063_UPC_RANGE (0x04000000)
|
||||
|
||||
/* Info: Downconverter frequency is out of range (may be reason for MT_DPC_UNLOCK) */
|
||||
#define MT2063_DNC_RANGE (0x08000000)
|
||||
|
||||
/*
|
||||
* Data Types
|
||||
*/
|
||||
|
||||
#define MAX_UDATA (4294967295) /* max value storable in u32 */
|
||||
|
||||
/*
|
||||
* Define an MTxxxx_CNT macro for each type of tuner that will be built
|
||||
* into your application (e.g., MT2121, MT2060). MT_TUNER_CNT
|
||||
* must be set to the SUM of all of the MTxxxx_CNT macros.
|
||||
*
|
||||
* #define MT2050_CNT (1)
|
||||
* #define MT2060_CNT (1)
|
||||
* #define MT2111_CNT (1)
|
||||
* #define MT2121_CNT (3)
|
||||
*/
|
||||
|
||||
|
||||
#define MT2063_TUNER_CNT (1) /* total num of MicroTuner tuners */
|
||||
#define MT2063_I2C (0xC0)
|
||||
|
||||
/*
|
||||
* Constant defining the version of the following structure
|
||||
* and therefore the API for this code.
|
||||
*
|
||||
* When compiling the tuner driver, the preprocessor will
|
||||
* check against this version number to make sure that
|
||||
* it matches the version that the tuner driver knows about.
|
||||
*/
|
||||
/* Version 010201 => 1.21 */
|
||||
#define MT2063_AVOID_SPURS_INFO_VERSION 010201
|
||||
|
||||
/* DECT Frequency Avoidance */
|
||||
#define MT2063_DECT_AVOID_US_FREQS 0x00000001
|
||||
|
||||
#define MT2063_DECT_AVOID_EURO_FREQS 0x00000002
|
||||
|
||||
#define MT2063_EXCLUDE_US_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_US_FREQS) != 0)
|
||||
|
||||
#define MT2063_EXCLUDE_EURO_DECT_FREQUENCIES(s) (((s) & MT2063_DECT_AVOID_EURO_FREQS) != 0)
|
||||
|
||||
enum MT2063_DECT_Avoid_Type {
|
||||
MT2063_NO_DECT_AVOIDANCE = 0, /* Do not create DECT exclusion zones. */
|
||||
MT2063_AVOID_US_DECT = MT2063_DECT_AVOID_US_FREQS, /* Avoid US DECT frequencies. */
|
||||
MT2063_AVOID_EURO_DECT = MT2063_DECT_AVOID_EURO_FREQS, /* Avoid European DECT frequencies. */
|
||||
MT2063_AVOID_BOTH /* Avoid both regions. Not typically used. */
|
||||
};
|
||||
|
||||
#define MT2063_MAX_ZONES 48
|
||||
|
||||
struct MT2063_ExclZone_t;
|
||||
|
||||
struct MT2063_ExclZone_t {
|
||||
u32 min_;
|
||||
u32 max_;
|
||||
struct MT2063_ExclZone_t *next_;
|
||||
};
|
||||
|
||||
/*
|
||||
* Structure of data needed for Spur Avoidance
|
||||
*/
|
||||
struct MT2063_AvoidSpursData_t {
|
||||
u32 nAS_Algorithm;
|
||||
u32 f_ref;
|
||||
u32 f_in;
|
||||
u32 f_LO1;
|
||||
u32 f_if1_Center;
|
||||
u32 f_if1_Request;
|
||||
u32 f_if1_bw;
|
||||
u32 f_LO2;
|
||||
u32 f_out;
|
||||
u32 f_out_bw;
|
||||
u32 f_LO1_Step;
|
||||
u32 f_LO2_Step;
|
||||
u32 f_LO1_FracN_Avoid;
|
||||
u32 f_LO2_FracN_Avoid;
|
||||
u32 f_zif_bw;
|
||||
u32 f_min_LO_Separation;
|
||||
u32 maxH1;
|
||||
u32 maxH2;
|
||||
enum MT2063_DECT_Avoid_Type avoidDECT;
|
||||
u32 bSpurPresent;
|
||||
u32 bSpurAvoided;
|
||||
u32 nSpursFound;
|
||||
u32 nZones;
|
||||
struct MT2063_ExclZone_t *freeZones;
|
||||
struct MT2063_ExclZone_t *usedZones;
|
||||
struct MT2063_ExclZone_t MT2063_ExclZones[MT2063_MAX_ZONES];
|
||||
};
|
||||
|
||||
/*
|
||||
* Values returned by the MT2063's on-chip temperature sensor
|
||||
* to be read/written.
|
||||
*/
|
||||
enum MT2063_Temperature {
|
||||
MT2063_T_0C = 0, /* Temperature approx 0C */
|
||||
MT2063_T_10C, /* Temperature approx 10C */
|
||||
MT2063_T_20C, /* Temperature approx 20C */
|
||||
MT2063_T_30C, /* Temperature approx 30C */
|
||||
MT2063_T_40C, /* Temperature approx 40C */
|
||||
MT2063_T_50C, /* Temperature approx 50C */
|
||||
MT2063_T_60C, /* Temperature approx 60C */
|
||||
MT2063_T_70C, /* Temperature approx 70C */
|
||||
MT2063_T_80C, /* Temperature approx 80C */
|
||||
MT2063_T_90C, /* Temperature approx 90C */
|
||||
MT2063_T_100C, /* Temperature approx 100C */
|
||||
MT2063_T_110C, /* Temperature approx 110C */
|
||||
MT2063_T_120C, /* Temperature approx 120C */
|
||||
MT2063_T_130C, /* Temperature approx 130C */
|
||||
MT2063_T_140C, /* Temperature approx 140C */
|
||||
MT2063_T_150C, /* Temperature approx 150C */
|
||||
};
|
||||
|
||||
/*
|
||||
* Parameters for selecting GPIO bits
|
||||
*/
|
||||
enum MT2063_GPIO_Attr {
|
||||
MT2063_GPIO_IN,
|
||||
MT2063_GPIO_DIR,
|
||||
MT2063_GPIO_OUT,
|
||||
};
|
||||
|
||||
enum MT2063_GPIO_ID {
|
||||
MT2063_GPIO0,
|
||||
MT2063_GPIO1,
|
||||
MT2063_GPIO2,
|
||||
};
|
||||
|
||||
/*
|
||||
* Parameter for function MT2063_SetExtSRO that specifies the external
|
||||
* SRO drive frequency.
|
||||
*
|
||||
* MT2063_EXT_SRO_OFF is the power-up default value.
|
||||
*/
|
||||
enum MT2063_Ext_SRO {
|
||||
MT2063_EXT_SRO_OFF, /* External SRO drive off */
|
||||
MT2063_EXT_SRO_BY_4, /* External SRO drive divide by 4 */
|
||||
MT2063_EXT_SRO_BY_2, /* External SRO drive divide by 2 */
|
||||
MT2063_EXT_SRO_BY_1 /* External SRO drive divide by 1 */
|
||||
};
|
||||
|
||||
/*
|
||||
* Parameter for function MT2063_SetPowerMask that specifies the power down
|
||||
* of various sections of the MT2063.
|
||||
*/
|
||||
enum MT2063_Mask_Bits {
|
||||
MT2063_REG_SD = 0x0040, /* Shutdown regulator */
|
||||
MT2063_SRO_SD = 0x0020, /* Shutdown SRO */
|
||||
MT2063_AFC_SD = 0x0010, /* Shutdown AFC A/D */
|
||||
MT2063_PD_SD = 0x0002, /* Enable power detector shutdown */
|
||||
MT2063_PDADC_SD = 0x0001, /* Enable power detector A/D shutdown */
|
||||
MT2063_VCO_SD = 0x8000, /* Enable VCO shutdown */
|
||||
MT2063_LTX_SD = 0x4000, /* Enable LTX shutdown */
|
||||
MT2063_LT1_SD = 0x2000, /* Enable LT1 shutdown */
|
||||
MT2063_LNA_SD = 0x1000, /* Enable LNA shutdown */
|
||||
MT2063_UPC_SD = 0x0800, /* Enable upconverter shutdown */
|
||||
MT2063_DNC_SD = 0x0400, /* Enable downconverter shutdown */
|
||||
MT2063_VGA_SD = 0x0200, /* Enable VGA shutdown */
|
||||
MT2063_AMP_SD = 0x0100, /* Enable AMP shutdown */
|
||||
MT2063_ALL_SD = 0xFF73, /* All shutdown bits for this tuner */
|
||||
MT2063_NONE_SD = 0x0000 /* No shutdown bits */
|
||||
};
|
||||
|
||||
/*
|
||||
* Parameter for function MT2063_GetParam & MT2063_SetParam that
|
||||
* specifies the tuning algorithm parameter to be read/written.
|
||||
*/
|
||||
enum MT2063_Param {
|
||||
/* tuner address set by MT2063_Open() */
|
||||
MT2063_IC_ADDR,
|
||||
|
||||
/* max number of MT2063 tuners set by MT_TUNER_CNT in mt_userdef.h */
|
||||
MT2063_MAX_OPEN,
|
||||
|
||||
/* current number of open MT2063 tuners set by MT2063_Open() */
|
||||
MT2063_NUM_OPEN,
|
||||
|
||||
/* crystal frequency (default: 16000000 Hz) */
|
||||
MT2063_SRO_FREQ,
|
||||
|
||||
/* min tuning step size (default: 50000 Hz) */
|
||||
MT2063_STEPSIZE,
|
||||
|
||||
/* input center frequency set by MT2063_Tune() */
|
||||
MT2063_INPUT_FREQ,
|
||||
|
||||
/* LO1 Frequency set by MT2063_Tune() */
|
||||
MT2063_LO1_FREQ,
|
||||
|
||||
/* LO1 minimum step size (default: 250000 Hz) */
|
||||
MT2063_LO1_STEPSIZE,
|
||||
|
||||
/* LO1 FracN keep-out region (default: 999999 Hz) */
|
||||
MT2063_LO1_FRACN_AVOID_PARAM,
|
||||
|
||||
/* Current 1st IF in use set by MT2063_Tune() */
|
||||
MT2063_IF1_ACTUAL,
|
||||
|
||||
/* Requested 1st IF set by MT2063_Tune() */
|
||||
MT2063_IF1_REQUEST,
|
||||
|
||||
/* Center of 1st IF SAW filter (default: 1218000000 Hz) */
|
||||
MT2063_IF1_CENTER,
|
||||
|
||||
/* Bandwidth of 1st IF SAW filter (default: 20000000 Hz) */
|
||||
MT2063_IF1_BW,
|
||||
|
||||
/* zero-IF bandwidth (default: 2000000 Hz) */
|
||||
MT2063_ZIF_BW,
|
||||
|
||||
/* LO2 Frequency set by MT2063_Tune() */
|
||||
MT2063_LO2_FREQ,
|
||||
|
||||
/* LO2 minimum step size (default: 50000 Hz) */
|
||||
MT2063_LO2_STEPSIZE,
|
||||
|
||||
/* LO2 FracN keep-out region (default: 374999 Hz) */
|
||||
MT2063_LO2_FRACN_AVOID,
|
||||
|
||||
/* output center frequency set by MT2063_Tune() */
|
||||
MT2063_OUTPUT_FREQ,
|
||||
|
||||
/* output bandwidth set by MT2063_Tune() */
|
||||
MT2063_OUTPUT_BW,
|
||||
|
||||
/* min inter-tuner LO separation (default: 1000000 Hz) */
|
||||
MT2063_LO_SEPARATION,
|
||||
|
||||
/* ID of avoid-spurs algorithm in use compile-time constant */
|
||||
MT2063_AS_ALG,
|
||||
|
||||
/* max # of intra-tuner harmonics (default: 15) */
|
||||
MT2063_MAX_HARM1,
|
||||
|
||||
/* max # of inter-tuner harmonics (default: 7) */
|
||||
MT2063_MAX_HARM2,
|
||||
|
||||
/* # of 1st IF exclusion zones used set by MT2063_Tune() */
|
||||
MT2063_EXCL_ZONES,
|
||||
|
||||
/* # of spurs found/avoided set by MT2063_Tune() */
|
||||
MT2063_NUM_SPURS,
|
||||
|
||||
/* >0 spurs avoided set by MT2063_Tune() */
|
||||
MT2063_SPUR_AVOIDED,
|
||||
|
||||
/* >0 spurs in output (mathematically) set by MT2063_Tune() */
|
||||
MT2063_SPUR_PRESENT,
|
||||
|
||||
/* Receiver Mode for some parameters. 1 is DVB-T */
|
||||
MT2063_RCVR_MODE,
|
||||
|
||||
/* directly set LNA attenuation, parameter is value to set */
|
||||
MT2063_ACLNA,
|
||||
|
||||
/* maximum LNA attenuation, parameter is value to set */
|
||||
MT2063_ACLNA_MAX,
|
||||
|
||||
/* directly set ATN attenuation. Paremeter is value to set. */
|
||||
MT2063_ACRF,
|
||||
|
||||
/* maxium ATN attenuation. Paremeter is value to set. */
|
||||
MT2063_ACRF_MAX,
|
||||
|
||||
/* directly set FIF attenuation. Paremeter is value to set. */
|
||||
MT2063_ACFIF,
|
||||
|
||||
/* maxium FIF attenuation. Paremeter is value to set. */
|
||||
MT2063_ACFIF_MAX,
|
||||
|
||||
/* LNA Rin */
|
||||
MT2063_LNA_RIN,
|
||||
|
||||
/* Power Detector LNA level target */
|
||||
MT2063_LNA_TGT,
|
||||
|
||||
/* Power Detector 1 level */
|
||||
MT2063_PD1,
|
||||
|
||||
/* Power Detector 1 level target */
|
||||
MT2063_PD1_TGT,
|
||||
|
||||
/* Power Detector 2 level */
|
||||
MT2063_PD2,
|
||||
|
||||
/* Power Detector 2 level target */
|
||||
MT2063_PD2_TGT,
|
||||
|
||||
/* Selects, which DNC is activ */
|
||||
MT2063_DNC_OUTPUT_ENABLE,
|
||||
|
||||
/* VGA gain code */
|
||||
MT2063_VGAGC,
|
||||
|
||||
/* VGA bias current */
|
||||
MT2063_VGAOI,
|
||||
|
||||
/* TAGC, determins the speed of the AGC */
|
||||
MT2063_TAGC,
|
||||
|
||||
/* AMP gain code */
|
||||
MT2063_AMPGC,
|
||||
|
||||
/* Control setting to avoid DECT freqs (default: MT_AVOID_BOTH) */
|
||||
MT2063_AVOID_DECT,
|
||||
|
||||
/* Cleartune filter selection: 0 - by IC (default), 1 - by software */
|
||||
MT2063_CTFILT_SW,
|
||||
|
||||
MT2063_EOP /* last entry in enumerated list */
|
||||
};
|
||||
|
||||
/*
|
||||
* Parameter for selecting tuner mode
|
||||
*/
|
||||
enum MT2063_RCVR_MODES {
|
||||
MT2063_CABLE_QAM = 0, /* Digital cable */
|
||||
MT2063_CABLE_ANALOG, /* Analog cable */
|
||||
MT2063_OFFAIR_COFDM, /* Digital offair */
|
||||
MT2063_OFFAIR_COFDM_SAWLESS, /* Digital offair without SAW */
|
||||
MT2063_OFFAIR_ANALOG, /* Analog offair */
|
||||
MT2063_OFFAIR_8VSB, /* Analog offair */
|
||||
MT2063_NUM_RCVR_MODES
|
||||
};
|
||||
|
||||
/*
|
||||
* Possible values for MT2063_DNC_OUTPUT
|
||||
*/
|
||||
enum MT2063_DNC_Output_Enable {
|
||||
MT2063_DNC_NONE = 0,
|
||||
MT2063_DNC_1,
|
||||
MT2063_DNC_2,
|
||||
MT2063_DNC_BOTH
|
||||
};
|
||||
|
||||
/*
|
||||
** Two-wire serial bus subaddresses of the tuner registers.
|
||||
** Also known as the tuner's register addresses.
|
||||
*/
|
||||
enum MT2063_Register_Offsets {
|
||||
MT2063_REG_PART_REV = 0, /* 0x00: Part/Rev Code */
|
||||
MT2063_REG_LO1CQ_1, /* 0x01: LO1C Queued Byte 1 */
|
||||
MT2063_REG_LO1CQ_2, /* 0x02: LO1C Queued Byte 2 */
|
||||
MT2063_REG_LO2CQ_1, /* 0x03: LO2C Queued Byte 1 */
|
||||
MT2063_REG_LO2CQ_2, /* 0x04: LO2C Queued Byte 2 */
|
||||
MT2063_REG_LO2CQ_3, /* 0x05: LO2C Queued Byte 3 */
|
||||
MT2063_REG_RSVD_06, /* 0x06: Reserved */
|
||||
MT2063_REG_LO_STATUS, /* 0x07: LO Status */
|
||||
MT2063_REG_FIFFC, /* 0x08: FIFF Center */
|
||||
MT2063_REG_CLEARTUNE, /* 0x09: ClearTune Filter */
|
||||
MT2063_REG_ADC_OUT, /* 0x0A: ADC_OUT */
|
||||
MT2063_REG_LO1C_1, /* 0x0B: LO1C Byte 1 */
|
||||
MT2063_REG_LO1C_2, /* 0x0C: LO1C Byte 2 */
|
||||
MT2063_REG_LO2C_1, /* 0x0D: LO2C Byte 1 */
|
||||
MT2063_REG_LO2C_2, /* 0x0E: LO2C Byte 2 */
|
||||
MT2063_REG_LO2C_3, /* 0x0F: LO2C Byte 3 */
|
||||
MT2063_REG_RSVD_10, /* 0x10: Reserved */
|
||||
MT2063_REG_PWR_1, /* 0x11: PWR Byte 1 */
|
||||
MT2063_REG_PWR_2, /* 0x12: PWR Byte 2 */
|
||||
MT2063_REG_TEMP_STATUS, /* 0x13: Temp Status */
|
||||
MT2063_REG_XO_STATUS, /* 0x14: Crystal Status */
|
||||
MT2063_REG_RF_STATUS, /* 0x15: RF Attn Status */
|
||||
MT2063_REG_FIF_STATUS, /* 0x16: FIF Attn Status */
|
||||
MT2063_REG_LNA_OV, /* 0x17: LNA Attn Override */
|
||||
MT2063_REG_RF_OV, /* 0x18: RF Attn Override */
|
||||
MT2063_REG_FIF_OV, /* 0x19: FIF Attn Override */
|
||||
MT2063_REG_LNA_TGT, /* 0x1A: Reserved */
|
||||
MT2063_REG_PD1_TGT, /* 0x1B: Pwr Det 1 Target */
|
||||
MT2063_REG_PD2_TGT, /* 0x1C: Pwr Det 2 Target */
|
||||
MT2063_REG_RSVD_1D, /* 0x1D: Reserved */
|
||||
MT2063_REG_RSVD_1E, /* 0x1E: Reserved */
|
||||
MT2063_REG_RSVD_1F, /* 0x1F: Reserved */
|
||||
MT2063_REG_RSVD_20, /* 0x20: Reserved */
|
||||
MT2063_REG_BYP_CTRL, /* 0x21: Bypass Control */
|
||||
MT2063_REG_RSVD_22, /* 0x22: Reserved */
|
||||
MT2063_REG_RSVD_23, /* 0x23: Reserved */
|
||||
MT2063_REG_RSVD_24, /* 0x24: Reserved */
|
||||
MT2063_REG_RSVD_25, /* 0x25: Reserved */
|
||||
MT2063_REG_RSVD_26, /* 0x26: Reserved */
|
||||
MT2063_REG_RSVD_27, /* 0x27: Reserved */
|
||||
MT2063_REG_FIFF_CTRL, /* 0x28: FIFF Control */
|
||||
MT2063_REG_FIFF_OFFSET, /* 0x29: FIFF Offset */
|
||||
MT2063_REG_CTUNE_CTRL, /* 0x2A: Reserved */
|
||||
MT2063_REG_CTUNE_OV, /* 0x2B: Reserved */
|
||||
MT2063_REG_CTRL_2C, /* 0x2C: Reserved */
|
||||
MT2063_REG_FIFF_CTRL2, /* 0x2D: Fiff Control */
|
||||
MT2063_REG_RSVD_2E, /* 0x2E: Reserved */
|
||||
MT2063_REG_DNC_GAIN, /* 0x2F: DNC Control */
|
||||
MT2063_REG_VGA_GAIN, /* 0x30: VGA Gain Ctrl */
|
||||
MT2063_REG_RSVD_31, /* 0x31: Reserved */
|
||||
MT2063_REG_TEMP_SEL, /* 0x32: Temperature Selection */
|
||||
MT2063_REG_RSVD_33, /* 0x33: Reserved */
|
||||
MT2063_REG_RSVD_34, /* 0x34: Reserved */
|
||||
MT2063_REG_RSVD_35, /* 0x35: Reserved */
|
||||
MT2063_REG_RSVD_36, /* 0x36: Reserved */
|
||||
MT2063_REG_RSVD_37, /* 0x37: Reserved */
|
||||
MT2063_REG_RSVD_38, /* 0x38: Reserved */
|
||||
MT2063_REG_RSVD_39, /* 0x39: Reserved */
|
||||
MT2063_REG_RSVD_3A, /* 0x3A: Reserved */
|
||||
MT2063_REG_RSVD_3B, /* 0x3B: Reserved */
|
||||
MT2063_REG_RSVD_3C, /* 0x3C: Reserved */
|
||||
MT2063_REG_END_REGS
|
||||
};
|
||||
|
||||
struct MT2063_Info_t {
|
||||
void *handle;
|
||||
void *hUserData;
|
||||
u32 address;
|
||||
u32 version;
|
||||
u32 tuner_id;
|
||||
struct MT2063_AvoidSpursData_t AS_Data;
|
||||
u32 f_IF1_actual;
|
||||
u32 rcvr_mode;
|
||||
u32 ctfilt_sw;
|
||||
u32 CTFiltMax[31];
|
||||
u32 num_regs;
|
||||
u8 reg[MT2063_REG_END_REGS];
|
||||
};
|
||||
typedef struct MT2063_Info_t *pMT2063_Info_t;
|
||||
|
||||
enum MTTune_atv_standard {
|
||||
MTTUNEA_UNKNOWN = 0,
|
||||
MTTUNEA_PAL_B,
|
||||
MTTUNEA_PAL_G,
|
||||
MTTUNEA_PAL_I,
|
||||
MTTUNEA_PAL_L,
|
||||
MTTUNEA_PAL_MN,
|
||||
MTTUNEA_PAL_DK,
|
||||
MTTUNEA_DIGITAL,
|
||||
MTTUNEA_FMRADIO,
|
||||
MTTUNEA_DVBC,
|
||||
MTTUNEA_DVBT
|
||||
};
|
||||
|
||||
struct mt2063_config {
|
||||
u8 tuner_address;
|
||||
u32 refclock;
|
||||
};
|
||||
|
||||
struct mt2063_state {
|
||||
struct i2c_adapter *i2c;
|
||||
|
||||
const struct mt2063_config *config;
|
||||
struct dvb_tuner_ops ops;
|
||||
struct dvb_frontend *frontend;
|
||||
struct tuner_state status;
|
||||
struct MT2063_Info_t *MT2063_ht;
|
||||
bool MT2063_init;
|
||||
|
||||
enum MTTune_atv_standard tv_type;
|
||||
u32 frequency;
|
||||
u32 srate;
|
||||
u32 bandwidth;
|
||||
u32 reference;
|
||||
};
|
||||
|
||||
#if defined(CONFIG_MEDIA_TUNER_MT2063) || (defined(CONFIG_MEDIA_TUNER_MT2063_MODULE) && defined(MODULE))
|
||||
struct dvb_frontend *mt2063_attach(struct dvb_frontend *fe,
|
||||
struct mt2063_config *config,
|
||||
|
||||
Loading…
Reference in New Issue
Block a user